brintos

brintos / linux-shallow public Read only

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1/* SPDX-License-Identifier: GPL-2.0-only */2/*3 * Copyright (C) 2017 Impinj, Inc.4 *5 * Author: Andrey Smirnov <andrew.smirnov@gmail.com>6 */7 8#ifndef DT_BINDING_RESET_IMX7_H9#define DT_BINDING_RESET_IMX7_H10 11#define IMX7_RESET_A7_CORE_POR_RESET0	012#define IMX7_RESET_A7_CORE_POR_RESET1	113#define IMX7_RESET_A7_CORE_RESET0	214#define IMX7_RESET_A7_CORE_RESET1	315#define IMX7_RESET_A7_DBG_RESET0	416#define IMX7_RESET_A7_DBG_RESET1	517#define IMX7_RESET_A7_ETM_RESET0	618#define IMX7_RESET_A7_ETM_RESET1	719#define IMX7_RESET_A7_SOC_DBG_RESET	820#define IMX7_RESET_A7_L2RESET		921#define IMX7_RESET_SW_M4C_RST		1022#define IMX7_RESET_SW_M4P_RST		1123#define IMX7_RESET_EIM_RST		1224#define IMX7_RESET_HSICPHY_PORT_RST	1325#define IMX7_RESET_USBPHY1_POR		1426#define IMX7_RESET_USBPHY1_PORT_RST	1527#define IMX7_RESET_USBPHY2_POR		1628#define IMX7_RESET_USBPHY2_PORT_RST	1729#define IMX7_RESET_MIPI_PHY_MRST	1830#define IMX7_RESET_MIPI_PHY_SRST	1931 32/*33 * IMX7_RESET_PCIEPHY is a logical reset line combining PCIEPHY_BTN34 * and PCIEPHY_G_RST35 */36#define IMX7_RESET_PCIEPHY		2037#define IMX7_RESET_PCIEPHY_PERST	2138 39/*40 * IMX7_RESET_PCIE_CTRL_APPS_EN is not strictly a reset line, but it41 * can be used to inhibit PCIe LTTSM, so, in a way, it can be thoguht42 * of as one43 */44#define IMX7_RESET_PCIE_CTRL_APPS_EN	2245#define IMX7_RESET_DDRC_PRST		2346#define IMX7_RESET_DDRC_CORE_RST	2447 48#define IMX7_RESET_PCIE_CTRL_APPS_TURNOFF 2549 50#define IMX7_RESET_NUM			2651 52#endif53 54