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1/* SPDX-License-Identifier: GPL-2.0-only */2/*3 * Copyright 2021 NXP4 */5 6#ifndef DT_BINDING_PCC_RESET_IMX8ULP_H7#define DT_BINDING_PCC_RESET_IMX8ULP_H8 9/* PCC3 */10#define PCC3_WDOG3_SWRST 011#define PCC3_WDOG4_SWRST 112#define PCC3_LPIT1_SWRST 213#define PCC3_TPM4_SWRST 314#define PCC3_TPM5_SWRST 415#define PCC3_FLEXIO1_SWRST 516#define PCC3_I3C2_SWRST 617#define PCC3_LPI2C4_SWRST 718#define PCC3_LPI2C5_SWRST 819#define PCC3_LPUART4_SWRST 920#define PCC3_LPUART5_SWRST 1021#define PCC3_LPSPI4_SWRST 1122#define PCC3_LPSPI5_SWRST 1223 24/* PCC4 */25#define PCC4_FLEXSPI2_SWRST 026#define PCC4_TPM6_SWRST 127#define PCC4_TPM7_SWRST 228#define PCC4_LPI2C6_SWRST 329#define PCC4_LPI2C7_SWRST 430#define PCC4_LPUART6_SWRST 531#define PCC4_LPUART7_SWRST 632#define PCC4_SAI4_SWRST 733#define PCC4_SAI5_SWRST 834#define PCC4_USDHC0_SWRST 935#define PCC4_USDHC1_SWRST 1036#define PCC4_USDHC2_SWRST 1137#define PCC4_USB0_SWRST 1238#define PCC4_USB0_PHY_SWRST 1339#define PCC4_USB1_SWRST 1440#define PCC4_USB1_PHY_SWRST 1541#define PCC4_ENET_SWRST 1642 43/* PCC5 */44#define PCC5_TPM8_SWRST 045#define PCC5_SAI6_SWRST 146#define PCC5_SAI7_SWRST 247#define PCC5_SPDIF_SWRST 348#define PCC5_ISI_SWRST 449#define PCC5_CSI_REGS_SWRST 550#define PCC5_CSI_SWRST 651#define PCC5_DSI_SWRST 752#define PCC5_WDOG5_SWRST 853#define PCC5_EPDC_SWRST 954#define PCC5_PXP_SWRST 1055#define PCC5_GPU2D_SWRST 1156#define PCC5_GPU3D_SWRST 1257#define PCC5_DC_NANO_SWRST 1358 59#endif /*DT_BINDING_RESET_IMX8ULP_H */60