123 lines · c
1/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */2/*3 * Copyright (c) 2023, The Linux Foundation. All rights reserved.4 */5 6#ifndef _DT_BINDINGS_RESET_IPQ_GCC_5018_H7#define _DT_BINDINGS_RESET_IPQ_GCC_5018_H8 9#define GCC_APC0_VOLTAGE_DROOP_DETECTOR_BCR 010#define GCC_BLSP1_BCR 111#define GCC_BLSP1_QUP1_BCR 212#define GCC_BLSP1_QUP2_BCR 313#define GCC_BLSP1_QUP3_BCR 414#define GCC_BLSP1_UART1_BCR 515#define GCC_BLSP1_UART2_BCR 616#define GCC_BOOT_ROM_BCR 717#define GCC_BTSS_BCR 818#define GCC_CMN_BLK_BCR 919#define GCC_CMN_LDO_BCR 1020#define GCC_CE_BCR 1121#define GCC_CRYPTO_BCR 1222#define GCC_DCC_BCR 1323#define GCC_DCD_BCR 1424#define GCC_DDRSS_BCR 1525#define GCC_EDPD_BCR 1626#define GCC_GEPHY_BCR 1727#define GCC_GEPHY_MDC_SW_ARES 1828#define GCC_GEPHY_DSP_HW_ARES 1929#define GCC_GEPHY_RX_ARES 2030#define GCC_GEPHY_TX_ARES 2131#define GCC_GMAC0_BCR 2232#define GCC_GMAC0_CFG_ARES 2333#define GCC_GMAC0_SYS_ARES 2434#define GCC_GMAC1_BCR 2535#define GCC_GMAC1_CFG_ARES 2636#define GCC_GMAC1_SYS_ARES 2737#define GCC_IMEM_BCR 2838#define GCC_LPASS_BCR 2939#define GCC_MDIO0_BCR 3040#define GCC_MDIO1_BCR 3141#define GCC_MPM_BCR 3242#define GCC_PCIE0_BCR 3343#define GCC_PCIE0_LINK_DOWN_BCR 3444#define GCC_PCIE0_PHY_BCR 3545#define GCC_PCIE0PHY_PHY_BCR 3646#define GCC_PCIE0_PIPE_ARES 3747#define GCC_PCIE0_SLEEP_ARES 3848#define GCC_PCIE0_CORE_STICKY_ARES 3949#define GCC_PCIE0_AXI_MASTER_ARES 4050#define GCC_PCIE0_AXI_SLAVE_ARES 4151#define GCC_PCIE0_AHB_ARES 4252#define GCC_PCIE0_AXI_MASTER_STICKY_ARES 4353#define GCC_PCIE0_AXI_SLAVE_STICKY_ARES 4454#define GCC_PCIE1_BCR 4555#define GCC_PCIE1_LINK_DOWN_BCR 4656#define GCC_PCIE1_PHY_BCR 4757#define GCC_PCIE1PHY_PHY_BCR 4858#define GCC_PCIE1_PIPE_ARES 4959#define GCC_PCIE1_SLEEP_ARES 5060#define GCC_PCIE1_CORE_STICKY_ARES 5161#define GCC_PCIE1_AXI_MASTER_ARES 5262#define GCC_PCIE1_AXI_SLAVE_ARES 5363#define GCC_PCIE1_AHB_ARES 5464#define GCC_PCIE1_AXI_MASTER_STICKY_ARES 5565#define GCC_PCIE1_AXI_SLAVE_STICKY_ARES 5666#define GCC_PCNOC_BCR 5767#define GCC_PCNOC_BUS_TIMEOUT0_BCR 5868#define GCC_PCNOC_BUS_TIMEOUT1_BCR 5969#define GCC_PCNOC_BUS_TIMEOUT2_BCR 6070#define GCC_PCNOC_BUS_TIMEOUT3_BCR 6171#define GCC_PCNOC_BUS_TIMEOUT4_BCR 6272#define GCC_PCNOC_BUS_TIMEOUT5_BCR 6373#define GCC_PCNOC_BUS_TIMEOUT6_BCR 6474#define GCC_PCNOC_BUS_TIMEOUT7_BCR 6575#define GCC_PCNOC_BUS_TIMEOUT8_BCR 6676#define GCC_PCNOC_BUS_TIMEOUT9_BCR 6777#define GCC_PCNOC_BUS_TIMEOUT10_BCR 6878#define GCC_PCNOC_BUS_TIMEOUT11_BCR 6979#define GCC_PRNG_BCR 7080#define GCC_Q6SS_DBG_ARES 7181#define GCC_Q6_AHB_S_ARES 7282#define GCC_Q6_AHB_ARES 7383#define GCC_Q6_AXIM2_ARES 7484#define GCC_Q6_AXIM_ARES 7585#define GCC_Q6_AXIS_ARES 7686#define GCC_QDSS_BCR 7787#define GCC_QPIC_BCR 7888#define GCC_QUSB2_0_PHY_BCR 7989#define GCC_SDCC1_BCR 8090#define GCC_SEC_CTRL_BCR 8191#define GCC_SPDM_BCR 8292#define GCC_SYSTEM_NOC_BCR 8393#define GCC_TCSR_BCR 8494#define GCC_TLMM_BCR 8595#define GCC_UBI0_AXI_ARES 8696#define GCC_UBI0_AHB_ARES 8797#define GCC_UBI0_NC_AXI_ARES 8898#define GCC_UBI0_DBG_ARES 8999#define GCC_UBI0_UTCM_ARES 90100#define GCC_UBI0_CORE_ARES 91101#define GCC_UBI32_BCR 92102#define GCC_UNIPHY_BCR 93103#define GCC_UNIPHY_AHB_ARES 94104#define GCC_UNIPHY_SYS_ARES 95105#define GCC_UNIPHY_RX_ARES 96106#define GCC_UNIPHY_TX_ARES 97107#define GCC_USB0_BCR 98108#define GCC_USB0_PHY_BCR 99109#define GCC_WCSS_BCR 100110#define GCC_WCSS_DBG_ARES 101111#define GCC_WCSS_ECAHB_ARES 102112#define GCC_WCSS_ACMT_ARES 103113#define GCC_WCSS_DBG_BDG_ARES 104114#define GCC_WCSS_AHB_S_ARES 105115#define GCC_WCSS_AXI_M_ARES 106116#define GCC_WCSS_AXI_S_ARES 107117#define GCC_WCSS_Q6_BCR 108118#define GCC_WCSSAON_RESET 109119#define GCC_UNIPHY_SOFT_RESET 110120#define GCC_GEPHY_MISC_ARES 111121 122#endif123