166 lines · c
1/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */2/*3 * Copyright (c) 2018-2023, The Linux Foundation. All rights reserved.4 */5 6#ifndef _DT_BINDINGS_RESET_IPQ_GCC_9574_H7#define _DT_BINDINGS_RESET_IPQ_GCC_9574_H8 9#define GCC_ADSS_BCR 010#define GCC_APC0_VOLTAGE_DROOP_DETECTOR_BCR 111#define GCC_BLSP1_BCR 212#define GCC_BLSP1_QUP1_BCR 313#define GCC_BLSP1_QUP2_BCR 414#define GCC_BLSP1_QUP3_BCR 515#define GCC_BLSP1_QUP4_BCR 616#define GCC_BLSP1_QUP5_BCR 717#define GCC_BLSP1_QUP6_BCR 818#define GCC_BLSP1_UART1_BCR 919#define GCC_BLSP1_UART2_BCR 1020#define GCC_BLSP1_UART3_BCR 1121#define GCC_BLSP1_UART4_BCR 1222#define GCC_BLSP1_UART5_BCR 1323#define GCC_BLSP1_UART6_BCR 1424#define GCC_BOOT_ROM_BCR 1525#define GCC_MDIO_BCR 1626#define GCC_NSS_BCR 1727#define GCC_NSS_TBU_BCR 1828#define GCC_PCIE0_BCR 1929#define GCC_PCIE0_LINK_DOWN_BCR 2030#define GCC_PCIE0_PHY_BCR 2131#define GCC_PCIE0PHY_PHY_BCR 2232#define GCC_PCIE1_BCR 2333#define GCC_PCIE1_LINK_DOWN_BCR 2434#define GCC_PCIE1_PHY_BCR 2535#define GCC_PCIE1PHY_PHY_BCR 2636#define GCC_PCIE2_BCR 2737#define GCC_PCIE2_LINK_DOWN_BCR 2838#define GCC_PCIE2_PHY_BCR 2939#define GCC_PCIE2PHY_PHY_BCR 3040#define GCC_PCIE3_BCR 3141#define GCC_PCIE3_LINK_DOWN_BCR 3242#define GCC_PCIE3_PHY_BCR 3343#define GCC_PCIE3PHY_PHY_BCR 3444#define GCC_PRNG_BCR 3545#define GCC_QUSB2_0_PHY_BCR 3646#define GCC_SDCC_BCR 3747#define GCC_TLMM_BCR 3848#define GCC_UNIPHY0_BCR 3949#define GCC_UNIPHY1_BCR 4050#define GCC_UNIPHY2_BCR 4151#define GCC_USB0_PHY_BCR 4252#define GCC_USB3PHY_0_PHY_BCR 4353#define GCC_USB_BCR 4454#define GCC_ANOC0_TBU_BCR 4555#define GCC_ANOC1_TBU_BCR 4656#define GCC_ANOC_BCR 4757#define GCC_APSS_TCU_BCR 4858#define GCC_CMN_BLK_BCR 4959#define GCC_CMN_BLK_AHB_ARES 5060#define GCC_CMN_BLK_SYS_ARES 5161#define GCC_CMN_BLK_APU_ARES 5262#define GCC_DCC_BCR 5363#define GCC_DDRSS_BCR 5464#define GCC_IMEM_BCR 5565#define GCC_LPASS_BCR 5666#define GCC_MPM_BCR 5767#define GCC_MSG_RAM_BCR 5868#define GCC_NSSNOC_MEMNOC_1_ARES 5969#define GCC_NSSNOC_PCNOC_1_ARES 6070#define GCC_NSSNOC_SNOC_1_ARES 6171#define GCC_NSSNOC_XO_DCD_ARES 6272#define GCC_NSSNOC_TS_ARES 6373#define GCC_NSSCC_ARES 6474#define GCC_NSSNOC_NSSCC_ARES 6575#define GCC_NSSNOC_ATB_ARES 6676#define GCC_NSSNOC_MEMNOC_ARES 6777#define GCC_NSSNOC_QOSGEN_REF_ARES 6878#define GCC_NSSNOC_SNOC_ARES 6979#define GCC_NSSNOC_TIMEOUT_REF_ARES 7080#define GCC_NSS_CFG_ARES 7181#define GCC_UBI0_DBG_ARES 7282#define GCC_PCIE0_AHB_ARES 7383#define GCC_PCIE0_AUX_ARES 7484#define GCC_PCIE0_AXI_M_ARES 7585#define GCC_PCIE0_AXI_M_STICKY_ARES 7686#define GCC_PCIE0_AXI_S_ARES 7787#define GCC_PCIE0_AXI_S_STICKY_ARES 7888#define GCC_PCIE0_CORE_STICKY_ARES 7989#define GCC_PCIE0_PIPE_ARES 8090#define GCC_PCIE1_AHB_ARES 8191#define GCC_PCIE1_AUX_ARES 8292#define GCC_PCIE1_AXI_M_ARES 8393#define GCC_PCIE1_AXI_M_STICKY_ARES 8494#define GCC_PCIE1_AXI_S_ARES 8595#define GCC_PCIE1_AXI_S_STICKY_ARES 8696#define GCC_PCIE1_CORE_STICKY_ARES 8797#define GCC_PCIE1_PIPE_ARES 8898#define GCC_PCIE2_AHB_ARES 8999#define GCC_PCIE2_AUX_ARES 90100#define GCC_PCIE2_AXI_M_ARES 91101#define GCC_PCIE2_AXI_M_STICKY_ARES 92102#define GCC_PCIE2_AXI_S_ARES 93103#define GCC_PCIE2_AXI_S_STICKY_ARES 94104#define GCC_PCIE2_CORE_STICKY_ARES 95105#define GCC_PCIE2_PIPE_ARES 96106#define GCC_PCIE3_AHB_ARES 97107#define GCC_PCIE3_AUX_ARES 98108#define GCC_PCIE3_AXI_M_ARES 99109#define GCC_PCIE3_AXI_M_STICKY_ARES 100110#define GCC_PCIE3_AXI_S_ARES 101111#define GCC_PCIE3_AXI_S_STICKY_ARES 102112#define GCC_PCIE3_CORE_STICKY_ARES 103113#define GCC_PCIE3_PIPE_ARES 104114#define GCC_PCNOC_BCR 105115#define GCC_PCNOC_BUS_TIMEOUT0_BCR 106116#define GCC_PCNOC_BUS_TIMEOUT1_BCR 107117#define GCC_PCNOC_BUS_TIMEOUT2_BCR 108118#define GCC_PCNOC_BUS_TIMEOUT3_BCR 109119#define GCC_PCNOC_BUS_TIMEOUT4_BCR 110120#define GCC_PCNOC_BUS_TIMEOUT5_BCR 111121#define GCC_PCNOC_BUS_TIMEOUT6_BCR 112122#define GCC_PCNOC_BUS_TIMEOUT7_BCR 113123#define GCC_PCNOC_BUS_TIMEOUT8_BCR 114124#define GCC_PCNOC_BUS_TIMEOUT9_BCR 115125#define GCC_PCNOC_TBU_BCR 116126#define GCC_Q6SS_DBG_ARES 117127#define GCC_Q6_AHB_ARES 118128#define GCC_Q6_AHB_S_ARES 119129#define GCC_Q6_AXIM2_ARES 120130#define GCC_Q6_AXIM_ARES 121131#define GCC_QDSS_BCR 122132#define GCC_QPIC_BCR 123133#define GCC_QPIC_AHB_ARES 124134#define GCC_QPIC_ARES 125135#define GCC_RBCPR_BCR 126136#define GCC_RBCPR_MX_BCR 127137#define GCC_SEC_CTRL_BCR 128138#define GCC_SMMU_CFG_BCR 129139#define GCC_SNOC_BCR 130140#define GCC_SPDM_BCR 131141#define GCC_TME_BCR 132142#define GCC_UNIPHY0_SYS_RESET 133143#define GCC_UNIPHY0_AHB_RESET 134144#define GCC_UNIPHY0_XPCS_RESET 135145#define GCC_UNIPHY1_SYS_RESET 136146#define GCC_UNIPHY1_AHB_RESET 137147#define GCC_UNIPHY1_XPCS_RESET 138148#define GCC_UNIPHY2_SYS_RESET 139149#define GCC_UNIPHY2_AHB_RESET 140150#define GCC_UNIPHY2_XPCS_RESET 141151#define GCC_USB_MISC_RESET 142152#define GCC_WCSSAON_RESET 143153#define GCC_WCSS_ACMT_ARES 144154#define GCC_WCSS_AHB_S_ARES 145155#define GCC_WCSS_AXI_M_ARES 146156#define GCC_WCSS_BCR 147157#define GCC_WCSS_DBG_ARES 148158#define GCC_WCSS_DBG_BDG_ARES 149159#define GCC_WCSS_ECAHB_ARES 150160#define GCC_WCSS_Q6_BCR 151161#define GCC_WCSS_Q6_TBU_BCR 152162#define GCC_TCSR_BCR 153163#define GCC_CRYPTO_BCR 154164 165#endif166