101 lines · c
1/* SPDX-License-Identifier: GPL-2.0-only OR BSD-3-Clause */2/*3 * Copyright (C) STMicroelectronics 2018 - All Rights Reserved4 * Author: Gabriel Fernandez <gabriel.fernandez@foss.st.com> for STMicroelectronics.5 */6 7#ifndef _DT_BINDINGS_STM32MP13_RESET_H_8#define _DT_BINDINGS_STM32MP13_RESET_H_9 10#define TIM2_R 1356811#define TIM3_R 1356912#define TIM4_R 1357013#define TIM5_R 1357114#define TIM6_R 1357215#define TIM7_R 1357316#define LPTIM1_R 1357717#define SPI2_R 1357918#define SPI3_R 1358019#define USART3_R 1358320#define UART4_R 1358421#define UART5_R 1358522#define UART7_R 1358623#define UART8_R 1358724#define I2C1_R 1358925#define I2C2_R 1359026#define SPDIF_R 1359427#define TIM1_R 1363228#define TIM8_R 1363329#define SPI1_R 1364030#define USART6_R 1364531#define SAI1_R 1364832#define SAI2_R 1364933#define DFSDM_R 1365234#define FDCAN_R 1365635#define LPTIM2_R 1369636#define LPTIM3_R 1369737#define LPTIM4_R 1369838#define LPTIM5_R 1369939#define SYSCFG_R 1370740#define VREF_R 1370941#define DTS_R 1371242#define PMBCTRL_R 1371343#define LTDC_R 1376044#define DCMIPP_R 1376145#define DDRPERFM_R 1376846#define USBPHY_R 1377647#define STGEN_R 1384448#define USART1_R 1388849#define USART2_R 1388950#define SPI4_R 1389051#define SPI5_R 1389152#define I2C3_R 1389253#define I2C4_R 1389354#define I2C5_R 1389455#define TIM12_R 1389556#define TIM13_R 1389657#define TIM14_R 1389758#define TIM15_R 1389859#define TIM16_R 1389960#define TIM17_R 1390061#define DMA1_R 1395262#define DMA2_R 1395363#define DMAMUX1_R 1395464#define DMA3_R 1395565#define DMAMUX2_R 1395666#define ADC1_R 1395767#define ADC2_R 1395868#define USBO_R 1396069#define GPIOA_R 1408070#define GPIOB_R 1408171#define GPIOC_R 1408272#define GPIOD_R 1408373#define GPIOE_R 1408474#define GPIOF_R 1408575#define GPIOG_R 1408676#define GPIOH_R 1408777#define GPIOI_R 1408878#define TSC_R 1409579#define PKA_R 1414680#define SAES_R 1414781#define CRYP1_R 1414882#define HASH1_R 1414983#define RNG1_R 1415084#define AXIMC_R 1416085#define MDMA_R 1420886#define MCE_R 1420987#define ETH1MAC_R 1421888#define FMC_R 1422089#define QSPI_R 1422290#define SDMMC1_R 1422491#define SDMMC2_R 1422592#define CRC1_R 1422893#define USBH_R 1423294#define ETH2MAC_R 1423895 96/* SCMI reset domain identifiers */97#define RST_SCMI_LTDC 098#define RST_SCMI_MDMA 199 100#endif /* _DT_BINDINGS_STM32MP13_RESET_H_ */101