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1/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */2/*3 * Copyright (c) 2023 MediaTek Inc.4 * Author: Balsam CHIHI <bchihi@baylibre.com>5 */6 7#ifndef __MEDIATEK_LVTS_DT_H8#define __MEDIATEK_LVTS_DT_H9 10#define MT7988_CPU_0 011#define MT7988_CPU_1 112#define MT7988_ETH2P5G_0 213#define MT7988_ETH2P5G_1 314#define MT7988_TOPS_0 415#define MT7988_TOPS_1 516#define MT7988_ETHWARP_0 617#define MT7988_ETHWARP_1 718 19#define MT8186_LITTLE_CPU0 020#define MT8186_LITTLE_CPU1 121#define MT8186_LITTLE_CPU2 222#define MT8186_CAM 323#define MT8186_BIG_CPU0 424#define MT8186_BIG_CPU1 525#define MT8186_NNA 626#define MT8186_ADSP 727#define MT8186_GPU 828 29#define MT8188_MCU_LITTLE_CPU0 030#define MT8188_MCU_LITTLE_CPU1 131#define MT8188_MCU_LITTLE_CPU2 232#define MT8188_MCU_LITTLE_CPU3 333#define MT8188_MCU_BIG_CPU0 434#define MT8188_MCU_BIG_CPU1 535 36#define MT8188_AP_APU 037#define MT8188_AP_GPU0 138#define MT8188_AP_GPU1 239#define MT8188_AP_ADSP 340#define MT8188_AP_VDO 441#define MT8188_AP_INFRA 542#define MT8188_AP_CAM1 643#define MT8188_AP_CAM2 744 45#define MT8195_MCU_BIG_CPU0 046#define MT8195_MCU_BIG_CPU1 147#define MT8195_MCU_BIG_CPU2 248#define MT8195_MCU_BIG_CPU3 349#define MT8195_MCU_LITTLE_CPU0 450#define MT8195_MCU_LITTLE_CPU1 551#define MT8195_MCU_LITTLE_CPU2 652#define MT8195_MCU_LITTLE_CPU3 753 54#define MT8195_AP_VPU0 855#define MT8195_AP_VPU1 956#define MT8195_AP_GPU0 1057#define MT8195_AP_GPU1 1158#define MT8195_AP_VDEC 1259#define MT8195_AP_IMG 1360#define MT8195_AP_INFRA 1461#define MT8195_AP_CAM0 1562#define MT8195_AP_CAM1 1663 64#define MT8192_MCU_BIG_CPU0 065#define MT8192_MCU_BIG_CPU1 166#define MT8192_MCU_BIG_CPU2 267#define MT8192_MCU_BIG_CPU3 368#define MT8192_MCU_LITTLE_CPU0 469#define MT8192_MCU_LITTLE_CPU1 570#define MT8192_MCU_LITTLE_CPU2 671#define MT8192_MCU_LITTLE_CPU3 772 73#define MT8192_AP_VPU0 874#define MT8192_AP_VPU1 975#define MT8192_AP_GPU0 1076#define MT8192_AP_GPU1 1177#define MT8192_AP_INFRA 1278#define MT8192_AP_CAM 1379#define MT8192_AP_MD0 1480#define MT8192_AP_MD1 1581#define MT8192_AP_MD2 1682 83#endif /* __MEDIATEK_LVTS_DT_H */84