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1/* SPDX-License-Identifier: GPL-2.0 */2#ifndef LINUX_BCMA_DRIVER_GMAC_CMN_H_3#define LINUX_BCMA_DRIVER_GMAC_CMN_H_4 5#include <linux/types.h>6 7#define BCMA_GMAC_CMN_STAG0 0x0008#define BCMA_GMAC_CMN_STAG1 0x0049#define BCMA_GMAC_CMN_STAG2 0x00810#define BCMA_GMAC_CMN_STAG3 0x00C11#define BCMA_GMAC_CMN_PARSER_CTL 0x02012#define BCMA_GMAC_CMN_MIB_MAX_LEN 0x02413#define BCMA_GMAC_CMN_PHY_ACCESS 0x10014#define BCMA_GMAC_CMN_PA_DATA_MASK 0x0000ffff15#define BCMA_GMAC_CMN_PA_ADDR_MASK 0x001f000016#define BCMA_GMAC_CMN_PA_ADDR_SHIFT 1617#define BCMA_GMAC_CMN_PA_REG_MASK 0x1f00000018#define BCMA_GMAC_CMN_PA_REG_SHIFT 2419#define BCMA_GMAC_CMN_PA_WRITE 0x2000000020#define BCMA_GMAC_CMN_PA_START 0x4000000021#define BCMA_GMAC_CMN_PHY_CTL 0x10422#define BCMA_GMAC_CMN_PC_EPA_MASK 0x0000001f23#define BCMA_GMAC_CMN_PC_MCT_MASK 0x007f000024#define BCMA_GMAC_CMN_PC_MCT_SHIFT 1625#define BCMA_GMAC_CMN_PC_MTE 0x0080000026#define BCMA_GMAC_CMN_GMAC0_RGMII_CTL 0x11027#define BCMA_GMAC_CMN_CFP_ACCESS 0x20028#define BCMA_GMAC_CMN_CFP_TCAM_DATA0 0x21029#define BCMA_GMAC_CMN_CFP_TCAM_DATA1 0x21430#define BCMA_GMAC_CMN_CFP_TCAM_DATA2 0x21831#define BCMA_GMAC_CMN_CFP_TCAM_DATA3 0x21C32#define BCMA_GMAC_CMN_CFP_TCAM_DATA4 0x22033#define BCMA_GMAC_CMN_CFP_TCAM_DATA5 0x22434#define BCMA_GMAC_CMN_CFP_TCAM_DATA6 0x22835#define BCMA_GMAC_CMN_CFP_TCAM_DATA7 0x22C36#define BCMA_GMAC_CMN_CFP_TCAM_MASK0 0x23037#define BCMA_GMAC_CMN_CFP_TCAM_MASK1 0x23438#define BCMA_GMAC_CMN_CFP_TCAM_MASK2 0x23839#define BCMA_GMAC_CMN_CFP_TCAM_MASK3 0x23C40#define BCMA_GMAC_CMN_CFP_TCAM_MASK4 0x24041#define BCMA_GMAC_CMN_CFP_TCAM_MASK5 0x24442#define BCMA_GMAC_CMN_CFP_TCAM_MASK6 0x24843#define BCMA_GMAC_CMN_CFP_TCAM_MASK7 0x24C44#define BCMA_GMAC_CMN_CFP_ACTION_DATA 0x25045#define BCMA_GMAC_CMN_TCAM_BIST_CTL 0x2A046#define BCMA_GMAC_CMN_TCAM_BIST_STATUS 0x2A447#define BCMA_GMAC_CMN_TCAM_CMP_STATUS 0x2A848#define BCMA_GMAC_CMN_TCAM_DISABLE 0x2AC49#define BCMA_GMAC_CMN_TCAM_TEST_CTL 0x2F050#define BCMA_GMAC_CMN_UDF_0_A3_A0 0x30051#define BCMA_GMAC_CMN_UDF_0_A7_A4 0x30452#define BCMA_GMAC_CMN_UDF_0_A8 0x30853#define BCMA_GMAC_CMN_UDF_1_A3_A0 0x31054#define BCMA_GMAC_CMN_UDF_1_A7_A4 0x31455#define BCMA_GMAC_CMN_UDF_1_A8 0x31856#define BCMA_GMAC_CMN_UDF_2_A3_A0 0x32057#define BCMA_GMAC_CMN_UDF_2_A7_A4 0x32458#define BCMA_GMAC_CMN_UDF_2_A8 0x32859#define BCMA_GMAC_CMN_UDF_0_B3_B0 0x33060#define BCMA_GMAC_CMN_UDF_0_B7_B4 0x33461#define BCMA_GMAC_CMN_UDF_0_B8 0x33862#define BCMA_GMAC_CMN_UDF_1_B3_B0 0x34063#define BCMA_GMAC_CMN_UDF_1_B7_B4 0x34464#define BCMA_GMAC_CMN_UDF_1_B8 0x34865#define BCMA_GMAC_CMN_UDF_2_B3_B0 0x35066#define BCMA_GMAC_CMN_UDF_2_B7_B4 0x35467#define BCMA_GMAC_CMN_UDF_2_B8 0x35868#define BCMA_GMAC_CMN_UDF_0_C3_C0 0x36069#define BCMA_GMAC_CMN_UDF_0_C7_C4 0x36470#define BCMA_GMAC_CMN_UDF_0_C8 0x36871#define BCMA_GMAC_CMN_UDF_1_C3_C0 0x37072#define BCMA_GMAC_CMN_UDF_1_C7_C4 0x37473#define BCMA_GMAC_CMN_UDF_1_C8 0x37874#define BCMA_GMAC_CMN_UDF_2_C3_C0 0x38075#define BCMA_GMAC_CMN_UDF_2_C7_C4 0x38476#define BCMA_GMAC_CMN_UDF_2_C8 0x38877#define BCMA_GMAC_CMN_UDF_0_D3_D0 0x39078#define BCMA_GMAC_CMN_UDF_0_D7_D4 0x39479#define BCMA_GMAC_CMN_UDF_0_D11_D8 0x39480 81struct bcma_drv_gmac_cmn {82 struct bcma_device *core;83 84 /* Drivers accessing BCMA_GMAC_CMN_PHY_ACCESS and85 * BCMA_GMAC_CMN_PHY_CTL need to take that mutex first. */86 struct mutex phy_mutex;87};88 89/* Register access */90#define gmac_cmn_read16(gc, offset) bcma_read16((gc)->core, offset)91#define gmac_cmn_read32(gc, offset) bcma_read32((gc)->core, offset)92#define gmac_cmn_write16(gc, offset, val) bcma_write16((gc)->core, offset, val)93#define gmac_cmn_write32(gc, offset, val) bcma_write32((gc)->core, offset, val)94 95#endif /* LINUX_BCMA_DRIVER_GMAC_CMN_H_ */96