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1/* SPDX-License-Identifier: GPL-2.0-only */2/*3 * Common definitions for Cirrus Logic CS35L56 smart amp4 *5 * Copyright (C) 2023 Cirrus Logic, Inc. and6 * Cirrus Logic International Semiconductor Ltd.7 */8 9#ifndef __CS35L56_H10#define __CS35L56_H11 12#include <linux/firmware/cirrus/cs_dsp.h>13#include <linux/regulator/consumer.h>14#include <linux/regmap.h>15#include <sound/cs-amp-lib.h>16 17#define CS35L56_DEVID 0x000000018#define CS35L56_REVID 0x000000419#define CS35L56_RELID 0x000000C20#define CS35L56_OTPID 0x000001021#define CS35L56_SFT_RESET 0x000002022#define CS35L56_GLOBAL_ENABLES 0x000201423#define CS35L56_BLOCK_ENABLES 0x000201824#define CS35L56_BLOCK_ENABLES2 0x000201C25#define CS35L56_REFCLK_INPUT 0x0002C0426#define CS35L56_GLOBAL_SAMPLE_RATE 0x0002C0C27#define CS35L56_OTP_MEM_53 0x00300D428#define CS35L56_OTP_MEM_54 0x00300D829#define CS35L56_OTP_MEM_55 0x00300DC30#define CS35L56_ASP1_ENABLES1 0x000480031#define CS35L56_ASP1_CONTROL1 0x000480432#define CS35L56_ASP1_CONTROL2 0x000480833#define CS35L56_ASP1_CONTROL3 0x000480C34#define CS35L56_ASP1_FRAME_CONTROL1 0x000481035#define CS35L56_ASP1_FRAME_CONTROL5 0x000482036#define CS35L56_ASP1_DATA_CONTROL1 0x000483037#define CS35L56_ASP1_DATA_CONTROL5 0x000484038#define CS35L56_DACPCM1_INPUT 0x0004C0039#define CS35L56_DACPCM2_INPUT 0x0004C0840#define CS35L56_ASP1TX1_INPUT 0x0004C2041#define CS35L56_ASP1TX2_INPUT 0x0004C2442#define CS35L56_ASP1TX3_INPUT 0x0004C2843#define CS35L56_ASP1TX4_INPUT 0x0004C2C44#define CS35L56_DSP1RX1_INPUT 0x0004C4045#define CS35L56_DSP1RX2_INPUT 0x0004C4446#define CS35L56_SWIRE_DP3_CH1_INPUT 0x0004C7047#define CS35L56_SWIRE_DP3_CH2_INPUT 0x0004C7448#define CS35L56_SWIRE_DP3_CH3_INPUT 0x0004C7849#define CS35L56_SWIRE_DP3_CH4_INPUT 0x0004C7C50#define CS35L56_IRQ1_CFG 0x000E00051#define CS35L56_IRQ1_STATUS 0x000E00452#define CS35L56_IRQ1_EINT_1 0x000E01053#define CS35L56_IRQ1_EINT_2 0x000E01454#define CS35L56_IRQ1_EINT_4 0x000E01C55#define CS35L56_IRQ1_EINT_8 0x000E02C56#define CS35L56_IRQ1_EINT_18 0x000E05457#define CS35L56_IRQ1_EINT_20 0x000E05C58#define CS35L56_IRQ1_MASK_1 0x000E09059#define CS35L56_IRQ1_MASK_2 0x000E09460#define CS35L56_IRQ1_MASK_4 0x000E09C61#define CS35L56_IRQ1_MASK_8 0x000E0AC62#define CS35L56_IRQ1_MASK_18 0x000E0D463#define CS35L56_IRQ1_MASK_20 0x000E0DC64#define CS35L56_DSP_VIRTUAL1_MBOX_1 0x001102065#define CS35L56_DSP_VIRTUAL1_MBOX_2 0x001102466#define CS35L56_DSP_VIRTUAL1_MBOX_3 0x001102867#define CS35L56_DSP_VIRTUAL1_MBOX_4 0x001102C68#define CS35L56_DSP_VIRTUAL1_MBOX_5 0x001103069#define CS35L56_DSP_VIRTUAL1_MBOX_6 0x001103470#define CS35L56_DSP_VIRTUAL1_MBOX_7 0x001103871#define CS35L56_DSP_VIRTUAL1_MBOX_8 0x001103C72#define CS35L56_DSP_RESTRICT_STS1 0x00190F073#define CS35L56_DSP1_XMEM_PACKED_0 0x200000074#define CS35L56_DSP1_XMEM_PACKED_6143 0x2005FFC75#define CS35L56_DSP1_XMEM_UNPACKED32_0 0x240000076#define CS35L56_DSP1_XMEM_UNPACKED32_4095 0x2403FFC77#define CS35L56_DSP1_SYS_INFO_ID 0x25E000078#define CS35L56_DSP1_SYS_INFO_END 0x25E004C79#define CS35L56_DSP1_AHBM_WINDOW_DEBUG_0 0x25E204080#define CS35L56_DSP1_AHBM_WINDOW_DEBUG_1 0x25E204481#define CS35L56_DSP1_XMEM_UNPACKED24_0 0x280000082#define CS35L56_DSP1_FW_VER 0x280001083#define CS35L56_DSP1_HALO_STATE 0x28021E084#define CS35L56_DSP1_PM_CUR_STATE 0x280430885#define CS35L56_DSP1_XMEM_UNPACKED24_8191 0x2807FFC86#define CS35L56_DSP1_CORE_BASE 0x2B8000087#define CS35L56_DSP1_SCRATCH1 0x2B805C088#define CS35L56_DSP1_SCRATCH2 0x2B805C889#define CS35L56_DSP1_SCRATCH3 0x2B805D090#define CS35L56_DSP1_SCRATCH4 0x2B805D891#define CS35L56_DSP1_YMEM_PACKED_0 0x2C0000092#define CS35L56_DSP1_YMEM_PACKED_4604 0x2C047F093#define CS35L56_DSP1_YMEM_UNPACKED32_0 0x300000094#define CS35L56_DSP1_YMEM_UNPACKED32_3070 0x3002FF895#define CS35L56_DSP1_YMEM_UNPACKED24_0 0x340000096#define CS35L56_MAIN_RENDER_USER_MUTE 0x340002497#define CS35L56_MAIN_RENDER_USER_VOLUME 0x340002C98#define CS35L56_MAIN_POSTURE_NUMBER 0x340009499#define CS35L56_PROTECTION_STATUS 0x34000D8100#define CS35L56_TRANSDUCER_ACTUAL_PS 0x3400150101#define CS35L56_DSP1_YMEM_UNPACKED24_6141 0x3405FF4102#define CS35L56_DSP1_PMEM_0 0x3800000103#define CS35L56_DSP1_PMEM_5114 0x3804FE8104 105/* DEVID */106#define CS35L56_DEVID_MASK 0x00FFFFFF107 108/* REVID */109#define CS35L56_AREVID_MASK 0x000000F0110#define CS35L56_MTLREVID_MASK 0x0000000F111#define CS35L56_REVID_B0 0x000000B0112 113/* ASP_ENABLES1 */114#define CS35L56_ASP_RX2_EN_SHIFT 17115#define CS35L56_ASP_RX1_EN_SHIFT 16116#define CS35L56_ASP_TX4_EN_SHIFT 3117#define CS35L56_ASP_TX3_EN_SHIFT 2118#define CS35L56_ASP_TX2_EN_SHIFT 1119#define CS35L56_ASP_TX1_EN_SHIFT 0120 121/* ASP_CONTROL1 */122#define CS35L56_ASP_BCLK_FREQ_MASK 0x0000003F123#define CS35L56_ASP_BCLK_FREQ_SHIFT 0124 125/* ASP_CONTROL2 */126#define CS35L56_ASP_RX_WIDTH_MASK 0xFF000000127#define CS35L56_ASP_RX_WIDTH_SHIFT 24128#define CS35L56_ASP_TX_WIDTH_MASK 0x00FF0000129#define CS35L56_ASP_TX_WIDTH_SHIFT 16130#define CS35L56_ASP_FMT_MASK 0x00000700131#define CS35L56_ASP_FMT_SHIFT 8132#define CS35L56_ASP_BCLK_INV_MASK 0x00000040133#define CS35L56_ASP_FSYNC_INV_MASK 0x00000004134 135/* ASP_CONTROL3 */136#define CS35L56_ASP1_DOUT_HIZ_CTRL_MASK 0x00000003137 138/* ASP_DATA_CONTROL1 */139#define CS35L56_ASP_TX_WL_MASK 0x0000003F140 141/* ASP_DATA_CONTROL5 */142#define CS35L56_ASP_RX_WL_MASK 0x0000003F143 144/* ASPTXn_INPUT */145#define CS35L56_ASP_TXn_SRC_MASK 0x0000007F146 147/* SWIRETX[1..7]_SRC SDWTXn INPUT */148#define CS35L56_SWIRETXn_SRC_MASK 0x0000007F149 150/* IRQ1_STATUS */151#define CS35L56_IRQ1_STS_MASK 0x00000001152 153/* IRQ1_EINT_1 */154#define CS35L56_AMP_SHORT_ERR_EINT1_MASK 0x80000000155 156/* IRQ1_EINT_2 */157#define CS35L56_DSP_VIRTUAL2_MBOX_WR_EINT1_MASK 0x00200000158 159/* IRQ1_EINT_4 */160#define CS35L56_OTP_BOOT_DONE_MASK 0x00000002161 162/* IRQ1_EINT_8 */163#define CS35L56_TEMP_ERR_EINT1_MASK 0x80000000164 165/* Mixer input sources */166#define CS35L56_INPUT_SRC_NONE 0x00167#define CS35L56_INPUT_SRC_ASP1RX1 0x08168#define CS35L56_INPUT_SRC_ASP1RX2 0x09169#define CS35L56_INPUT_SRC_VMON 0x18170#define CS35L56_INPUT_SRC_IMON 0x19171#define CS35L56_INPUT_SRC_ERR_VOL 0x20172#define CS35L56_INPUT_SRC_CLASSH 0x21173#define CS35L56_INPUT_SRC_VDDBMON 0x28174#define CS35L56_INPUT_SRC_VBSTMON 0x29175#define CS35L56_INPUT_SRC_DSP1TX1 0x32176#define CS35L56_INPUT_SRC_DSP1TX2 0x33177#define CS35L56_INPUT_SRC_DSP1TX3 0x34178#define CS35L56_INPUT_SRC_DSP1TX4 0x35179#define CS35L56_INPUT_SRC_DSP1TX5 0x36180#define CS35L56_INPUT_SRC_DSP1TX6 0x37181#define CS35L56_INPUT_SRC_DSP1TX7 0x38182#define CS35L56_INPUT_SRC_DSP1TX8 0x39183#define CS35L56_INPUT_SRC_TEMPMON 0x3A184#define CS35L56_INPUT_SRC_INTERPOLATOR 0x40185#define CS35L56_INPUT_SRC_SWIRE_DP1_CHANNEL1 0x44186#define CS35L56_INPUT_SRC_SWIRE_DP1_CHANNEL2 0x45187#define CS35L56_INPUT_MASK 0x7F188 189#define CS35L56_NUM_INPUT_SRC 21190 191/* ASP formats */192#define CS35L56_ASP_FMT_DSP_A 0193#define CS35L56_ASP_FMT_I2S 2194 195/* ASP HiZ modes */196#define CS35L56_ASP_UNUSED_HIZ_OFF_HIZ 3197 198/* MAIN_RENDER_ACTUAL_PS */199#define CS35L56_PS0 0200#define CS35L56_PS3 3201 202/* CS35L56_DSP_RESTRICT_STS1 */203#define CS35L56_RESTRICTED_MASK 0x7204 205/* CS35L56_MAIN_RENDER_USER_MUTE */206#define CS35L56_MAIN_RENDER_USER_MUTE_MASK 1207 208/* CS35L56_MAIN_RENDER_USER_VOLUME */209#define CS35L56_MAIN_RENDER_USER_VOLUME_MIN -400210#define CS35L56_MAIN_RENDER_USER_VOLUME_MAX 48211#define CS35L56_MAIN_RENDER_USER_VOLUME_MASK 0x0000FFC0212#define CS35L56_MAIN_RENDER_USER_VOLUME_SHIFT 6213#define CS35L56_MAIN_RENDER_USER_VOLUME_SIGNBIT 9214 215/* CS35L56_MAIN_POSTURE_NUMBER */216#define CS35L56_MAIN_POSTURE_MIN 0217#define CS35L56_MAIN_POSTURE_MAX 255218#define CS35L56_MAIN_POSTURE_MASK CS35L56_MAIN_POSTURE_MAX219 220/* CS35L56_PROTECTION_STATUS */221#define CS35L56_FIRMWARE_MISSING BIT(0)222 223/* Software Values */224#define CS35L56_HALO_STATE_SHUTDOWN 1225#define CS35L56_HALO_STATE_BOOT_DONE 2226 227#define CS35L56_MBOX_CMD_AUDIO_PLAY 0x0B000001228#define CS35L56_MBOX_CMD_AUDIO_PAUSE 0x0B000002229#define CS35L56_MBOX_CMD_AUDIO_REINIT 0x0B000003230#define CS35L56_MBOX_CMD_HIBERNATE_NOW 0x02000001231#define CS35L56_MBOX_CMD_WAKEUP 0x02000002232#define CS35L56_MBOX_CMD_PREVENT_AUTO_HIBERNATE 0x02000003233#define CS35L56_MBOX_CMD_ALLOW_AUTO_HIBERNATE 0x02000004234#define CS35L56_MBOX_CMD_SHUTDOWN 0x02000005235#define CS35L56_MBOX_CMD_SYSTEM_RESET 0x02000007236 237#define CS35L56_MBOX_TIMEOUT_US 5000238#define CS35L56_MBOX_POLL_US 250239 240#define CS35L56_PS0_POLL_US 500241#define CS35L56_PS0_TIMEOUT_US 50000242#define CS35L56_PS3_POLL_US 500243#define CS35L56_PS3_TIMEOUT_US 300000244 245#define CS35L56_CONTROL_PORT_READY_US 2200246#define CS35L56_HALO_STATE_POLL_US 1000247#define CS35L56_HALO_STATE_TIMEOUT_US 250000248#define CS35L56_RESET_PULSE_MIN_US 1100249#define CS35L56_WAKE_HOLD_TIME_US 1000250 251#define CS35L56_SDW1_PLAYBACK_PORT 1252#define CS35L56_SDW1_CAPTURE_PORT 3253 254#define CS35L56_NUM_BULK_SUPPLIES 3255#define CS35L56_NUM_DSP_REGIONS 5256 257struct cs35l56_base {258 struct device *dev;259 struct regmap *regmap;260 int irq;261 struct mutex irq_lock;262 u8 type;263 u8 rev;264 bool init_done;265 bool fw_patched;266 bool secured;267 bool can_hibernate;268 bool cal_data_valid;269 s8 cal_index;270 struct cirrus_amp_cal_data cal_data;271 struct gpio_desc *reset_gpio;272};273 274/* Temporary to avoid a build break with the HDA driver */275static inline int cs35l56_force_sync_asp1_registers_from_cache(struct cs35l56_base *cs35l56_base)276{277 return 0;278}279 280static inline bool cs35l56_is_otp_register(unsigned int reg)281{282 return (reg >> 16) == 3;283}284 285extern const struct regmap_config cs35l56_regmap_i2c;286extern const struct regmap_config cs35l56_regmap_spi;287extern const struct regmap_config cs35l56_regmap_sdw;288 289extern const struct cirrus_amp_cal_controls cs35l56_calibration_controls;290 291extern const char * const cs35l56_tx_input_texts[CS35L56_NUM_INPUT_SRC];292extern const unsigned int cs35l56_tx_input_values[CS35L56_NUM_INPUT_SRC];293 294int cs35l56_set_patch(struct cs35l56_base *cs35l56_base);295int cs35l56_mbox_send(struct cs35l56_base *cs35l56_base, unsigned int command);296int cs35l56_firmware_shutdown(struct cs35l56_base *cs35l56_base);297int cs35l56_wait_for_firmware_boot(struct cs35l56_base *cs35l56_base);298void cs35l56_wait_control_port_ready(void);299void cs35l56_wait_min_reset_pulse(void);300void cs35l56_system_reset(struct cs35l56_base *cs35l56_base, bool is_soundwire);301int cs35l56_irq_request(struct cs35l56_base *cs35l56_base, int irq);302irqreturn_t cs35l56_irq(int irq, void *data);303int cs35l56_is_fw_reload_needed(struct cs35l56_base *cs35l56_base);304int cs35l56_runtime_suspend_common(struct cs35l56_base *cs35l56_base);305int cs35l56_runtime_resume_common(struct cs35l56_base *cs35l56_base, bool is_soundwire);306void cs35l56_init_cs_dsp(struct cs35l56_base *cs35l56_base, struct cs_dsp *cs_dsp);307int cs35l56_get_calibration(struct cs35l56_base *cs35l56_base);308int cs35l56_read_prot_status(struct cs35l56_base *cs35l56_base,309 bool *fw_missing, unsigned int *fw_version);310int cs35l56_hw_init(struct cs35l56_base *cs35l56_base);311int cs35l56_get_speaker_id(struct cs35l56_base *cs35l56_base);312int cs35l56_get_bclk_freq_id(unsigned int freq);313void cs35l56_fill_supply_names(struct regulator_bulk_data *data);314 315#endif /* ifndef __CS35L56_H */316