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1/* SPDX-License-Identifier: GPL-2.0-or-later */2/*3 * Copyright (ST) 2012 Rajeev Kumar (rajeevkumar.linux@gmail.com)4 */5 6#ifndef __SOUND_DESIGNWARE_I2S_H7#define __SOUND_DESIGNWARE_I2S_H8 9#include <linux/dmaengine.h>10#include <linux/types.h>11 12/*13 * struct i2s_clk_config_data - represent i2s clk configuration data14 * @chan_nr: number of channel15 * @data_width: number of bits per sample (8/16/24/32 bit)16 * @sample_rate: sampling frequency (8Khz, 16Khz, 32Khz, 44Khz, 48Khz)17 */18struct i2s_clk_config_data {19 int chan_nr;20 u32 data_width;21 u32 sample_rate;22};23 24struct dw_i2s_dev;25 26struct i2s_platform_data {27 #define DWC_I2S_PLAY (1 << 0)28 #define DWC_I2S_RECORD (1 << 1)29 #define DW_I2S_SLAVE (1 << 2)30 #define DW_I2S_MASTER (1 << 3)31 unsigned int cap;32 int channel;33 u32 snd_fmts;34 u32 snd_rates;35 36 #define DW_I2S_QUIRK_COMP_REG_OFFSET (1 << 0)37 #define DW_I2S_QUIRK_COMP_PARAM1 (1 << 1)38 #define DW_I2S_QUIRK_16BIT_IDX_OVERRIDE (1 << 2)39 unsigned int quirks;40 unsigned int i2s_reg_comp1;41 unsigned int i2s_reg_comp2;42 43 void *play_dma_data;44 void *capture_dma_data;45 bool (*filter)(struct dma_chan *chan, void *slave);46 int (*i2s_clk_cfg)(struct i2s_clk_config_data *config);47 int (*i2s_pd_init)(struct dw_i2s_dev *dev);48};49 50struct i2s_dma_data {51 void *data;52 dma_addr_t addr;53 u32 max_burst;54 enum dma_slave_buswidth addr_width;55 bool (*filter)(struct dma_chan *chan, void *slave);56};57 58/* I2S DMA registers */59#define I2S_RXDMA 0x01C060#define I2S_TXDMA 0x01C861 62#define TWO_CHANNEL_SUPPORT 2 /* up to 2.0 */63#define FOUR_CHANNEL_SUPPORT 4 /* up to 3.1 */64#define SIX_CHANNEL_SUPPORT 6 /* up to 5.1 */65#define EIGHT_CHANNEL_SUPPORT 8 /* up to 7.1 */66 67#endif /* __SOUND_DESIGNWARE_I2S_H */68