125 lines · c
1/* SPDX-License-Identifier: (GPL-2.0 WITH Linux-syscall-note) OR MIT */2/*3 * Copyright 2021 Advanced Micro Devices, Inc.4 *5 * Permission is hereby granted, free of charge, to any person obtaining a6 * copy of this software and associated documentation files (the "Software"),7 * to deal in the Software without restriction, including without limitation8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,9 * and/or sell copies of the Software, and to permit persons to whom the10 * Software is furnished to do so, subject to the following conditions:11 *12 * The above copyright notice and this permission notice shall be included in13 * all copies or substantial portions of the Software.14 *15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL18 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR19 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,20 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR21 * OTHER DEALINGS IN THE SOFTWARE.22 */23 24#ifndef KFD_SYSFS_H_INCLUDED25#define KFD_SYSFS_H_INCLUDED26 27/* Capability bits in node properties */28#define HSA_CAP_HOT_PLUGGABLE 0x0000000129#define HSA_CAP_ATS_PRESENT 0x0000000230#define HSA_CAP_SHARED_WITH_GRAPHICS 0x0000000431#define HSA_CAP_QUEUE_SIZE_POW2 0x0000000832#define HSA_CAP_QUEUE_SIZE_32BIT 0x0000001033#define HSA_CAP_QUEUE_IDLE_EVENT 0x0000002034#define HSA_CAP_VA_LIMIT 0x0000004035#define HSA_CAP_WATCH_POINTS_SUPPORTED 0x0000008036#define HSA_CAP_WATCH_POINTS_TOTALBITS_MASK 0x00000f0037#define HSA_CAP_WATCH_POINTS_TOTALBITS_SHIFT 838#define HSA_CAP_DOORBELL_TYPE_TOTALBITS_MASK 0x0000300039#define HSA_CAP_DOORBELL_TYPE_TOTALBITS_SHIFT 1240 41#define HSA_CAP_DOORBELL_TYPE_PRE_1_0 0x042#define HSA_CAP_DOORBELL_TYPE_1_0 0x143#define HSA_CAP_DOORBELL_TYPE_2_0 0x244#define HSA_CAP_AQL_QUEUE_DOUBLE_MAP 0x0000400045 46#define HSA_CAP_TRAP_DEBUG_SUPPORT 0x0000800047#define HSA_CAP_TRAP_DEBUG_WAVE_LAUNCH_TRAP_OVERRIDE_SUPPORTED 0x0001000048#define HSA_CAP_TRAP_DEBUG_WAVE_LAUNCH_MODE_SUPPORTED 0x0002000049#define HSA_CAP_TRAP_DEBUG_PRECISE_MEMORY_OPERATIONS_SUPPORTED 0x0004000050 51/* Old buggy user mode depends on this being 0 */52#define HSA_CAP_RESERVED_WAS_SRAM_EDCSUPPORTED 0x0008000053 54#define HSA_CAP_MEM_EDCSUPPORTED 0x0010000055#define HSA_CAP_RASEVENTNOTIFY 0x0020000056#define HSA_CAP_ASIC_REVISION_MASK 0x03c0000057#define HSA_CAP_ASIC_REVISION_SHIFT 2258#define HSA_CAP_SRAM_EDCSUPPORTED 0x0400000059#define HSA_CAP_SVMAPI_SUPPORTED 0x0800000060#define HSA_CAP_FLAGS_COHERENTHOSTACCESS 0x1000000061#define HSA_CAP_TRAP_DEBUG_FIRMWARE_SUPPORTED 0x2000000062#define HSA_CAP_TRAP_DEBUG_PRECISE_ALU_OPERATIONS_SUPPORTED 0x4000000063#define HSA_CAP_RESERVED 0x800f800064 65/* debug_prop bits in node properties */66#define HSA_DBG_WATCH_ADDR_MASK_LO_BIT_MASK 0x0000000f67#define HSA_DBG_WATCH_ADDR_MASK_LO_BIT_SHIFT 068#define HSA_DBG_WATCH_ADDR_MASK_HI_BIT_MASK 0x000003f069#define HSA_DBG_WATCH_ADDR_MASK_HI_BIT_SHIFT 470#define HSA_DBG_DISPATCH_INFO_ALWAYS_VALID 0x0000040071#define HSA_DBG_WATCHPOINTS_EXCLUSIVE 0x0000080072#define HSA_DBG_RESERVED 0xfffffffffffff000ull73 74/* Heap types in memory properties */75#define HSA_MEM_HEAP_TYPE_SYSTEM 076#define HSA_MEM_HEAP_TYPE_FB_PUBLIC 177#define HSA_MEM_HEAP_TYPE_FB_PRIVATE 278#define HSA_MEM_HEAP_TYPE_GPU_GDS 379#define HSA_MEM_HEAP_TYPE_GPU_LDS 480#define HSA_MEM_HEAP_TYPE_GPU_SCRATCH 581 82/* Flag bits in memory properties */83#define HSA_MEM_FLAGS_HOT_PLUGGABLE 0x0000000184#define HSA_MEM_FLAGS_NON_VOLATILE 0x0000000285#define HSA_MEM_FLAGS_RESERVED 0xfffffffc86 87/* Cache types in cache properties */88#define HSA_CACHE_TYPE_DATA 0x0000000189#define HSA_CACHE_TYPE_INSTRUCTION 0x0000000290#define HSA_CACHE_TYPE_CPU 0x0000000491#define HSA_CACHE_TYPE_HSACU 0x0000000892#define HSA_CACHE_TYPE_RESERVED 0xfffffff093 94/* Link types in IO link properties (matches CRAT link types) */95#define HSA_IOLINK_TYPE_UNDEFINED 096#define HSA_IOLINK_TYPE_HYPERTRANSPORT 197#define HSA_IOLINK_TYPE_PCIEXPRESS 298#define HSA_IOLINK_TYPE_AMBA 399#define HSA_IOLINK_TYPE_MIPI 4100#define HSA_IOLINK_TYPE_QPI_1_1 5101#define HSA_IOLINK_TYPE_RESERVED1 6102#define HSA_IOLINK_TYPE_RESERVED2 7103#define HSA_IOLINK_TYPE_RAPID_IO 8104#define HSA_IOLINK_TYPE_INFINIBAND 9105#define HSA_IOLINK_TYPE_RESERVED3 10106#define HSA_IOLINK_TYPE_XGMI 11107#define HSA_IOLINK_TYPE_XGOP 12108#define HSA_IOLINK_TYPE_GZ 13109#define HSA_IOLINK_TYPE_ETHERNET_RDMA 14110#define HSA_IOLINK_TYPE_RDMA_OTHER 15111#define HSA_IOLINK_TYPE_OTHER 16112 113/* Flag bits in IO link properties (matches CRAT flags, excluding the114 * bi-directional flag, which is not offially part of the CRAT spec, and115 * only used internally in KFD)116 */117#define HSA_IOLINK_FLAGS_ENABLED (1 << 0)118#define HSA_IOLINK_FLAGS_NON_COHERENT (1 << 1)119#define HSA_IOLINK_FLAGS_NO_ATOMICS_32_BIT (1 << 2)120#define HSA_IOLINK_FLAGS_NO_ATOMICS_64_BIT (1 << 3)121#define HSA_IOLINK_FLAGS_NO_PEER_TO_PEER_DMA (1 << 4)122#define HSA_IOLINK_FLAGS_RESERVED 0xffffffe0123 124#endif125