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1/*2 * Virtio platform device driver3 *4 * Copyright 2011, ARM Ltd.5 *6 * Based on Virtio PCI driver by Anthony Liguori, copyright IBM Corp. 20077 *8 * This header is BSD licensed so anyone can use the definitions to implement9 * compatible drivers/servers.10 *11 * Redistribution and use in source and binary forms, with or without12 * modification, are permitted provided that the following conditions13 * are met:14 * 1. Redistributions of source code must retain the above copyright15 * notice, this list of conditions and the following disclaimer.16 * 2. Redistributions in binary form must reproduce the above copyright17 * notice, this list of conditions and the following disclaimer in the18 * documentation and/or other materials provided with the distribution.19 * 3. Neither the name of IBM nor the names of its contributors20 * may be used to endorse or promote products derived from this software21 * without specific prior written permission.22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS'' AND23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE25 * ARE DISCLAIMED. IN NO EVENT SHALL IBM OR CONTRIBUTORS BE LIABLE26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS28 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF32 * SUCH DAMAGE.33 */34 35#ifndef _LINUX_VIRTIO_MMIO_H36#define _LINUX_VIRTIO_MMIO_H37 38/*39 * Control registers40 */41 42/* Magic value ("virt" string) - Read Only */43#define VIRTIO_MMIO_MAGIC_VALUE 0x00044 45/* Virtio device version - Read Only */46#define VIRTIO_MMIO_VERSION 0x00447 48/* Virtio device ID - Read Only */49#define VIRTIO_MMIO_DEVICE_ID 0x00850 51/* Virtio vendor ID - Read Only */52#define VIRTIO_MMIO_VENDOR_ID 0x00c53 54/* Bitmask of the features supported by the device (host)55 * (32 bits per set) - Read Only */56#define VIRTIO_MMIO_DEVICE_FEATURES 0x01057 58/* Device (host) features set selector - Write Only */59#define VIRTIO_MMIO_DEVICE_FEATURES_SEL 0x01460 61/* Bitmask of features activated by the driver (guest)62 * (32 bits per set) - Write Only */63#define VIRTIO_MMIO_DRIVER_FEATURES 0x02064 65/* Activated features set selector - Write Only */66#define VIRTIO_MMIO_DRIVER_FEATURES_SEL 0x02467 68 69#ifndef VIRTIO_MMIO_NO_LEGACY /* LEGACY DEVICES ONLY! */70 71/* Guest's memory page size in bytes - Write Only */72#define VIRTIO_MMIO_GUEST_PAGE_SIZE 0x02873 74#endif75 76 77/* Queue selector - Write Only */78#define VIRTIO_MMIO_QUEUE_SEL 0x03079 80/* Maximum size of the currently selected queue - Read Only */81#define VIRTIO_MMIO_QUEUE_NUM_MAX 0x03482 83/* Queue size for the currently selected queue - Write Only */84#define VIRTIO_MMIO_QUEUE_NUM 0x03885 86 87#ifndef VIRTIO_MMIO_NO_LEGACY /* LEGACY DEVICES ONLY! */88 89/* Used Ring alignment for the currently selected queue - Write Only */90#define VIRTIO_MMIO_QUEUE_ALIGN 0x03c91 92/* Guest's PFN for the currently selected queue - Read Write */93#define VIRTIO_MMIO_QUEUE_PFN 0x04094 95#endif96 97 98/* Ready bit for the currently selected queue - Read Write */99#define VIRTIO_MMIO_QUEUE_READY 0x044100 101/* Queue notifier - Write Only */102#define VIRTIO_MMIO_QUEUE_NOTIFY 0x050103 104/* Interrupt status - Read Only */105#define VIRTIO_MMIO_INTERRUPT_STATUS 0x060106 107/* Interrupt acknowledge - Write Only */108#define VIRTIO_MMIO_INTERRUPT_ACK 0x064109 110/* Device status register - Read Write */111#define VIRTIO_MMIO_STATUS 0x070112 113/* Selected queue's Descriptor Table address, 64 bits in two halves */114#define VIRTIO_MMIO_QUEUE_DESC_LOW 0x080115#define VIRTIO_MMIO_QUEUE_DESC_HIGH 0x084116 117/* Selected queue's Available Ring address, 64 bits in two halves */118#define VIRTIO_MMIO_QUEUE_AVAIL_LOW 0x090119#define VIRTIO_MMIO_QUEUE_AVAIL_HIGH 0x094120 121/* Selected queue's Used Ring address, 64 bits in two halves */122#define VIRTIO_MMIO_QUEUE_USED_LOW 0x0a0123#define VIRTIO_MMIO_QUEUE_USED_HIGH 0x0a4124 125/* Shared memory region id */126#define VIRTIO_MMIO_SHM_SEL 0x0ac127 128/* Shared memory region length, 64 bits in two halves */129#define VIRTIO_MMIO_SHM_LEN_LOW 0x0b0130#define VIRTIO_MMIO_SHM_LEN_HIGH 0x0b4131 132/* Shared memory region base address, 64 bits in two halves */133#define VIRTIO_MMIO_SHM_BASE_LOW 0x0b8134#define VIRTIO_MMIO_SHM_BASE_HIGH 0x0bc135 136/* Configuration atomicity value */137#define VIRTIO_MMIO_CONFIG_GENERATION 0x0fc138 139/* The config space is defined by each driver as140 * the per-driver configuration space - Read Write */141#define VIRTIO_MMIO_CONFIG 0x100142 143 144 145/*146 * Interrupt flags (re: interrupt status & acknowledge registers)147 */148 149#define VIRTIO_MMIO_INT_VRING (1 << 0)150#define VIRTIO_MMIO_INT_CONFIG (1 << 1)151 152#endif153