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1/*2 * Virtio PCI driver3 *4 * This module allows virtio devices to be used over a virtual PCI device.5 * This can be used with QEMU based VMMs like KVM or Xen.6 *7 * Copyright IBM Corp. 20078 *9 * Authors:10 * Anthony Liguori <aliguori@us.ibm.com>11 *12 * This header is BSD licensed so anyone can use the definitions to implement13 * compatible drivers/servers.14 *15 * Redistribution and use in source and binary forms, with or without16 * modification, are permitted provided that the following conditions17 * are met:18 * 1. Redistributions of source code must retain the above copyright19 * notice, this list of conditions and the following disclaimer.20 * 2. Redistributions in binary form must reproduce the above copyright21 * notice, this list of conditions and the following disclaimer in the22 * documentation and/or other materials provided with the distribution.23 * 3. Neither the name of IBM nor the names of its contributors24 * may be used to endorse or promote products derived from this software25 * without specific prior written permission.26 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS'' AND27 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE28 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE29 * ARE DISCLAIMED. IN NO EVENT SHALL IBM OR CONTRIBUTORS BE LIABLE30 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL31 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS32 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)33 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT34 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY35 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF36 * SUCH DAMAGE.37 */38 39#ifndef _LINUX_VIRTIO_PCI_H40#define _LINUX_VIRTIO_PCI_H41 42#include <linux/types.h>43 44#ifndef VIRTIO_PCI_NO_LEGACY45 46/* A 32-bit r/o bitmask of the features supported by the host */47#define VIRTIO_PCI_HOST_FEATURES 048 49/* A 32-bit r/w bitmask of features activated by the guest */50#define VIRTIO_PCI_GUEST_FEATURES 451 52/* A 32-bit r/w PFN for the currently selected queue */53#define VIRTIO_PCI_QUEUE_PFN 854 55/* A 16-bit r/o queue size for the currently selected queue */56#define VIRTIO_PCI_QUEUE_NUM 1257 58/* A 16-bit r/w queue selector */59#define VIRTIO_PCI_QUEUE_SEL 1460 61/* A 16-bit r/w queue notifier */62#define VIRTIO_PCI_QUEUE_NOTIFY 1663 64/* An 8-bit device status register. */65#define VIRTIO_PCI_STATUS 1866 67/* An 8-bit r/o interrupt status register. Reading the value will return the68 * current contents of the ISR and will also clear it. This is effectively69 * a read-and-acknowledge. */70#define VIRTIO_PCI_ISR 1971 72/* MSI-X registers: only enabled if MSI-X is enabled. */73/* A 16-bit vector for configuration changes. */74#define VIRTIO_MSI_CONFIG_VECTOR 2075/* A 16-bit vector for selected queue notifications. */76#define VIRTIO_MSI_QUEUE_VECTOR 2277 78/* The remaining space is defined by each driver as the per-driver79 * configuration space */80#define VIRTIO_PCI_CONFIG_OFF(msix_enabled) ((msix_enabled) ? 24 : 20)81/* Deprecated: please use VIRTIO_PCI_CONFIG_OFF instead */82#define VIRTIO_PCI_CONFIG(dev) VIRTIO_PCI_CONFIG_OFF((dev)->msix_enabled)83 84/* Virtio ABI version, this must match exactly */85#define VIRTIO_PCI_ABI_VERSION 086 87/* How many bits to shift physical queue address written to QUEUE_PFN.88 * 12 is historical, and due to x86 page size. */89#define VIRTIO_PCI_QUEUE_ADDR_SHIFT 1290 91/* The alignment to use between consumer and producer parts of vring.92 * x86 pagesize again. */93#define VIRTIO_PCI_VRING_ALIGN 409694 95#endif /* VIRTIO_PCI_NO_LEGACY */96 97/* The bit of the ISR which indicates a device configuration change. */98#define VIRTIO_PCI_ISR_CONFIG 0x299/* Vector value used to disable MSI for queue */100#define VIRTIO_MSI_NO_VECTOR 0xffff101 102#ifndef VIRTIO_PCI_NO_MODERN103 104/* IDs for different capabilities. Must all exist. */105 106/* Common configuration */107#define VIRTIO_PCI_CAP_COMMON_CFG 1108/* Notifications */109#define VIRTIO_PCI_CAP_NOTIFY_CFG 2110/* ISR access */111#define VIRTIO_PCI_CAP_ISR_CFG 3112/* Device specific configuration */113#define VIRTIO_PCI_CAP_DEVICE_CFG 4114/* PCI configuration access */115#define VIRTIO_PCI_CAP_PCI_CFG 5116/* Additional shared memory capability */117#define VIRTIO_PCI_CAP_SHARED_MEMORY_CFG 8118 119/* This is the PCI capability header: */120struct virtio_pci_cap {121 __u8 cap_vndr; /* Generic PCI field: PCI_CAP_ID_VNDR */122 __u8 cap_next; /* Generic PCI field: next ptr. */123 __u8 cap_len; /* Generic PCI field: capability length */124 __u8 cfg_type; /* Identifies the structure. */125 __u8 bar; /* Where to find it. */126 __u8 id; /* Multiple capabilities of the same type */127 __u8 padding[2]; /* Pad to full dword. */128 __le32 offset; /* Offset within bar. */129 __le32 length; /* Length of the structure, in bytes. */130};131 132struct virtio_pci_cap64 {133 struct virtio_pci_cap cap;134 __le32 offset_hi; /* Most sig 32 bits of offset */135 __le32 length_hi; /* Most sig 32 bits of length */136};137 138struct virtio_pci_notify_cap {139 struct virtio_pci_cap cap;140 __le32 notify_off_multiplier; /* Multiplier for queue_notify_off. */141};142 143/* Fields in VIRTIO_PCI_CAP_COMMON_CFG: */144struct virtio_pci_common_cfg {145 /* About the whole device. */146 __le32 device_feature_select; /* read-write */147 __le32 device_feature; /* read-only */148 __le32 guest_feature_select; /* read-write */149 __le32 guest_feature; /* read-write */150 __le16 msix_config; /* read-write */151 __le16 num_queues; /* read-only */152 __u8 device_status; /* read-write */153 __u8 config_generation; /* read-only */154 155 /* About a specific virtqueue. */156 __le16 queue_select; /* read-write */157 __le16 queue_size; /* read-write, power of 2. */158 __le16 queue_msix_vector; /* read-write */159 __le16 queue_enable; /* read-write */160 __le16 queue_notify_off; /* read-only */161 __le32 queue_desc_lo; /* read-write */162 __le32 queue_desc_hi; /* read-write */163 __le32 queue_avail_lo; /* read-write */164 __le32 queue_avail_hi; /* read-write */165 __le32 queue_used_lo; /* read-write */166 __le32 queue_used_hi; /* read-write */167};168 169/*170 * Warning: do not use sizeof on this: use offsetofend for171 * specific fields you need.172 */173struct virtio_pci_modern_common_cfg {174 struct virtio_pci_common_cfg cfg;175 176 __le16 queue_notify_data; /* read-write */177 __le16 queue_reset; /* read-write */178 179 __le16 admin_queue_index; /* read-only */180 __le16 admin_queue_num; /* read-only */181};182 183/* Fields in VIRTIO_PCI_CAP_PCI_CFG: */184struct virtio_pci_cfg_cap {185 struct virtio_pci_cap cap;186 __u8 pci_cfg_data[4]; /* Data for BAR access. */187};188 189/* Macro versions of offsets for the Old Timers! */190#define VIRTIO_PCI_CAP_VNDR 0191#define VIRTIO_PCI_CAP_NEXT 1192#define VIRTIO_PCI_CAP_LEN 2193#define VIRTIO_PCI_CAP_CFG_TYPE 3194#define VIRTIO_PCI_CAP_BAR 4195#define VIRTIO_PCI_CAP_OFFSET 8196#define VIRTIO_PCI_CAP_LENGTH 12197 198#define VIRTIO_PCI_NOTIFY_CAP_MULT 16199 200#define VIRTIO_PCI_COMMON_DFSELECT 0201#define VIRTIO_PCI_COMMON_DF 4202#define VIRTIO_PCI_COMMON_GFSELECT 8203#define VIRTIO_PCI_COMMON_GF 12204#define VIRTIO_PCI_COMMON_MSIX 16205#define VIRTIO_PCI_COMMON_NUMQ 18206#define VIRTIO_PCI_COMMON_STATUS 20207#define VIRTIO_PCI_COMMON_CFGGENERATION 21208#define VIRTIO_PCI_COMMON_Q_SELECT 22209#define VIRTIO_PCI_COMMON_Q_SIZE 24210#define VIRTIO_PCI_COMMON_Q_MSIX 26211#define VIRTIO_PCI_COMMON_Q_ENABLE 28212#define VIRTIO_PCI_COMMON_Q_NOFF 30213#define VIRTIO_PCI_COMMON_Q_DESCLO 32214#define VIRTIO_PCI_COMMON_Q_DESCHI 36215#define VIRTIO_PCI_COMMON_Q_AVAILLO 40216#define VIRTIO_PCI_COMMON_Q_AVAILHI 44217#define VIRTIO_PCI_COMMON_Q_USEDLO 48218#define VIRTIO_PCI_COMMON_Q_USEDHI 52219#define VIRTIO_PCI_COMMON_Q_NDATA 56220#define VIRTIO_PCI_COMMON_Q_RESET 58221#define VIRTIO_PCI_COMMON_ADM_Q_IDX 60222#define VIRTIO_PCI_COMMON_ADM_Q_NUM 62223 224#endif /* VIRTIO_PCI_NO_MODERN */225 226/* Admin command status. */227#define VIRTIO_ADMIN_STATUS_OK 0228 229/* Admin command opcode. */230#define VIRTIO_ADMIN_CMD_LIST_QUERY 0x0231#define VIRTIO_ADMIN_CMD_LIST_USE 0x1232 233/* Admin command group type. */234#define VIRTIO_ADMIN_GROUP_TYPE_SRIOV 0x1235 236/* Transitional device admin command. */237#define VIRTIO_ADMIN_CMD_LEGACY_COMMON_CFG_WRITE 0x2238#define VIRTIO_ADMIN_CMD_LEGACY_COMMON_CFG_READ 0x3239#define VIRTIO_ADMIN_CMD_LEGACY_DEV_CFG_WRITE 0x4240#define VIRTIO_ADMIN_CMD_LEGACY_DEV_CFG_READ 0x5241#define VIRTIO_ADMIN_CMD_LEGACY_NOTIFY_INFO 0x6242 243struct virtio_admin_cmd_hdr {244 __le16 opcode;245 /*246 * 1 - SR-IOV247 * 2-65535 - reserved248 */249 __le16 group_type;250 /* Unused, reserved for future extensions. */251 __u8 reserved1[12];252 __le64 group_member_id;253};254 255struct virtio_admin_cmd_status {256 __le16 status;257 __le16 status_qualifier;258 /* Unused, reserved for future extensions. */259 __u8 reserved2[4];260};261 262struct virtio_admin_cmd_legacy_wr_data {263 __u8 offset; /* Starting offset of the register(s) to write. */264 __u8 reserved[7];265 __u8 registers[];266};267 268struct virtio_admin_cmd_legacy_rd_data {269 __u8 offset; /* Starting offset of the register(s) to read. */270};271 272#define VIRTIO_ADMIN_CMD_NOTIFY_INFO_FLAGS_END 0273#define VIRTIO_ADMIN_CMD_NOTIFY_INFO_FLAGS_OWNER_DEV 0x1274#define VIRTIO_ADMIN_CMD_NOTIFY_INFO_FLAGS_OWNER_MEM 0x2275 276#define VIRTIO_ADMIN_CMD_MAX_NOTIFY_INFO 4277 278struct virtio_admin_cmd_notify_info_data {279 __u8 flags; /* 0 = end of list, 1 = owner device, 2 = member device */280 __u8 bar; /* BAR of the member or the owner device */281 __u8 padding[6];282 __le64 offset; /* Offset within bar. */283};284 285struct virtio_admin_cmd_notify_info_result {286 struct virtio_admin_cmd_notify_info_data entries[VIRTIO_ADMIN_CMD_MAX_NOTIFY_INFO];287};288 289#endif290