210 lines · c
1/* SPDX-License-Identifier: GPL-2.0 */2#ifndef _TDFX_H3#define _TDFX_H4 5#include <linux/i2c.h>6#include <linux/i2c-algo-bit.h>7 8/* membase0 register offsets */9#define STATUS 0x0010#define PCIINIT0 0x0411#define SIPMONITOR 0x0812#define LFBMEMORYCONFIG 0x0c13#define MISCINIT0 0x1014#define MISCINIT1 0x1415#define DRAMINIT0 0x1816#define DRAMINIT1 0x1c17#define AGPINIT 0x2018#define TMUGBEINIT 0x2419#define VGAINIT0 0x2820#define VGAINIT1 0x2c21#define DRAMCOMMAND 0x3022#define DRAMDATA 0x3423/* reserved 0x38 */24/* reserved 0x3c */25#define PLLCTRL0 0x4026#define PLLCTRL1 0x4427#define PLLCTRL2 0x4828#define DACMODE 0x4c29#define DACADDR 0x5030#define DACDATA 0x5431#define RGBMAXDELTA 0x5832#define VIDPROCCFG 0x5c33#define HWCURPATADDR 0x6034#define HWCURLOC 0x6435#define HWCURC0 0x6836#define HWCURC1 0x6c37#define VIDINFORMAT 0x7038#define VIDINSTATUS 0x7439#define VIDSERPARPORT 0x7840#define VIDINXDELTA 0x7c41#define VIDININITERR 0x8042#define VIDINYDELTA 0x8443#define VIDPIXBUFTHOLD 0x8844#define VIDCHRMIN 0x8c45#define VIDCHRMAX 0x9046#define VIDCURLIN 0x9447#define VIDSCREENSIZE 0x9848#define VIDOVRSTARTCRD 0x9c49#define VIDOVRENDCRD 0xa050#define VIDOVRDUDX 0xa451#define VIDOVRDUDXOFF 0xa852#define VIDOVRDVDY 0xac53/* ... */54#define VIDOVRDVDYOFF 0xe055#define VIDDESKSTART 0xe456#define VIDDESKSTRIDE 0xe857#define VIDINADDR0 0xec58#define VIDINADDR1 0xf059#define VIDINADDR2 0xf460#define VIDINSTRIDE 0xf861#define VIDCUROVRSTART 0xfc62 63#define INTCTRL (0x00100000 + 0x04)64#define CLIP0MIN (0x00100000 + 0x08)65#define CLIP0MAX (0x00100000 + 0x0c)66#define DSTBASE (0x00100000 + 0x10)67#define DSTFORMAT (0x00100000 + 0x14)68#define SRCBASE (0x00100000 + 0x34)69#define COMMANDEXTRA_2D (0x00100000 + 0x38)70#define CLIP1MIN (0x00100000 + 0x4c)71#define CLIP1MAX (0x00100000 + 0x50)72#define SRCFORMAT (0x00100000 + 0x54)73#define SRCSIZE (0x00100000 + 0x58)74#define SRCXY (0x00100000 + 0x5c)75#define COLORBACK (0x00100000 + 0x60)76#define COLORFORE (0x00100000 + 0x64)77#define DSTSIZE (0x00100000 + 0x68)78#define DSTXY (0x00100000 + 0x6c)79#define COMMAND_2D (0x00100000 + 0x70)80#define LAUNCH_2D (0x00100000 + 0x80)81 82#define COMMAND_3D (0x00200000 + 0x120)83 84/* register bitfields (not all, only as needed) */85 86/* COMMAND_2D reg. values */87#define TDFX_ROP_COPY 0xcc /* src */88#define TDFX_ROP_INVERT 0x55 /* NOT dst */89#define TDFX_ROP_XOR 0x66 /* src XOR dst */90 91#define AUTOINC_DSTX BIT(10)92#define AUTOINC_DSTY BIT(11)93#define COMMAND_2D_FILLRECT 0x0594#define COMMAND_2D_S2S_BITBLT 0x01 /* screen to screen */95#define COMMAND_2D_H2S_BITBLT 0x03 /* host to screen */96 97#define COMMAND_3D_NOP 0x0098#define STATUS_RETRACE BIT(6)99#define STATUS_BUSY BIT(9)100#define MISCINIT1_CLUT_INV BIT(0)101#define MISCINIT1_2DBLOCK_DIS BIT(15)102#define DRAMINIT0_SGRAM_NUM BIT(26)103#define DRAMINIT0_SGRAM_TYPE BIT(27)104#define DRAMINIT0_SGRAM_TYPE_MASK (BIT(27) | BIT(28) | BIT(29))105#define DRAMINIT0_SGRAM_TYPE_SHIFT 27106#define DRAMINIT1_MEM_SDRAM BIT(30)107#define VGAINIT0_VGA_DISABLE BIT(0)108#define VGAINIT0_EXT_TIMING BIT(1)109#define VGAINIT0_8BIT_DAC BIT(2)110#define VGAINIT0_EXT_ENABLE BIT(6)111#define VGAINIT0_WAKEUP_3C3 BIT(8)112#define VGAINIT0_LEGACY_DISABLE BIT(9)113#define VGAINIT0_ALT_READBACK BIT(10)114#define VGAINIT0_FAST_BLINK BIT(11)115#define VGAINIT0_EXTSHIFTOUT BIT(12)116#define VGAINIT0_DECODE_3C6 BIT(13)117#define VGAINIT0_SGRAM_HBLANK_DISABLE BIT(22)118#define VGAINIT1_MASK 0x1fffff119#define VIDCFG_VIDPROC_ENABLE BIT(0)120#define VIDCFG_CURS_X11 BIT(1)121#define VIDCFG_INTERLACE BIT(3)122#define VIDCFG_HALF_MODE BIT(4)123#define VIDCFG_DESK_ENABLE BIT(7)124#define VIDCFG_CLUT_BYPASS BIT(10)125#define VIDCFG_2X BIT(26)126#define VIDCFG_HWCURSOR_ENABLE BIT(27)127#define VIDCFG_PIXFMT_SHIFT 18128#define DACMODE_2X BIT(0)129 130/* I2C bit locations in the VIDSERPARPORT register */131#define DDC_ENAB 0x00040000132#define DDC_SCL_OUT 0x00080000133#define DDC_SDA_OUT 0x00100000134#define DDC_SCL_IN 0x00200000135#define DDC_SDA_IN 0x00400000136#define I2C_ENAB 0x00800000137#define I2C_SCL_OUT 0x01000000138#define I2C_SDA_OUT 0x02000000139#define I2C_SCL_IN 0x04000000140#define I2C_SDA_IN 0x08000000141 142/* VGA rubbish, need to change this for multihead support */143#define MISC_W 0x3c2144#define MISC_R 0x3cc145#define SEQ_I 0x3c4146#define SEQ_D 0x3c5147#define CRT_I 0x3d4148#define CRT_D 0x3d5149#define ATT_IW 0x3c0150#define IS1_R 0x3da151#define GRA_I 0x3ce152#define GRA_D 0x3cf153 154#ifdef __KERNEL__155 156struct banshee_reg {157 /* VGA rubbish */158 unsigned char att[21];159 unsigned char crt[25];160 unsigned char gra[9];161 unsigned char misc[1];162 unsigned char seq[5];163 164 /* Banshee extensions */165 unsigned char ext[2];166 unsigned long vidcfg;167 unsigned long vidpll;168 unsigned long mempll;169 unsigned long gfxpll;170 unsigned long dacmode;171 unsigned long vgainit0;172 unsigned long vgainit1;173 unsigned long screensize;174 unsigned long stride;175 unsigned long cursloc;176 unsigned long curspataddr;177 unsigned long cursc0;178 unsigned long cursc1;179 unsigned long startaddr;180 unsigned long clip0min;181 unsigned long clip0max;182 unsigned long clip1min;183 unsigned long clip1max;184 unsigned long miscinit0;185};186 187struct tdfx_par;188 189struct tdfxfb_i2c_chan {190 struct tdfx_par *par;191 struct i2c_adapter adapter;192 struct i2c_algo_bit_data algo;193};194 195struct tdfx_par {196 u32 max_pixclock;197 u32 palette[16];198 void __iomem *regbase_virt;199 unsigned long iobase;200 int wc_cookie;201#ifdef CONFIG_FB_3DFX_I2C202 struct tdfxfb_i2c_chan chan[2];203#endif204};205 206#endif /* __KERNEL__ */207 208#endif /* _TDFX_H */209 210