225 lines · rust
1// SPDX-License-Identifier: GPL-2.02 3// Copyright (C) 2024 FUJITA Tomonori <fujita.tomonori@gmail.com>4 5//! PHY register interfaces.6//!7//! This module provides support for accessing PHY registers in the8//! Ethernet management interface clauses 22 and 45 register namespaces, as9//! defined in IEEE 802.3.10 11use super::Device;12use crate::build_assert;13use crate::error::*;14use crate::uapi;15 16mod private {17 /// Marker that a trait cannot be implemented outside of this crate18 pub trait Sealed {}19}20 21/// Accesses PHY registers.22///23/// This trait is used to implement the unified interface to access24/// C22 and C45 PHY registers.25///26/// # Examples27///28/// ```ignore29/// fn link_change_notify(dev: &mut Device) {30/// // read C22 BMCR register31/// dev.read(C22::BMCR);32/// // read C45 PMA/PMD control 1 register33/// dev.read(C45::new(Mmd::PMAPMD, 0));34///35/// // Checks the link status as reported by registers in the C22 namespace36/// // and updates current link state.37/// dev.genphy_read_status::<phy::C22>();38/// // Checks the link status as reported by registers in the C45 namespace39/// // and updates current link state.40/// dev.genphy_read_status::<phy::C45>();41/// }42/// ```43pub trait Register: private::Sealed {44 /// Reads a PHY register.45 fn read(&self, dev: &mut Device) -> Result<u16>;46 47 /// Writes a PHY register.48 fn write(&self, dev: &mut Device, val: u16) -> Result;49 50 /// Checks the link status and updates current link state.51 fn read_status(dev: &mut Device) -> Result<u16>;52}53 54/// A single MDIO clause 22 register address (5 bits).55#[derive(Copy, Clone, Debug)]56pub struct C22(u8);57 58impl C22 {59 /// Basic mode control.60 pub const BMCR: Self = C22(0x00);61 /// Basic mode status.62 pub const BMSR: Self = C22(0x01);63 /// PHY identifier 1.64 pub const PHYSID1: Self = C22(0x02);65 /// PHY identifier 2.66 pub const PHYSID2: Self = C22(0x03);67 /// Auto-negotiation advertisement.68 pub const ADVERTISE: Self = C22(0x04);69 /// Auto-negotiation link partner base page ability.70 pub const LPA: Self = C22(0x05);71 /// Auto-negotiation expansion.72 pub const EXPANSION: Self = C22(0x06);73 /// Auto-negotiation next page transmit.74 pub const NEXT_PAGE_TRANSMIT: Self = C22(0x07);75 /// Auto-negotiation link partner received next page.76 pub const LP_RECEIVED_NEXT_PAGE: Self = C22(0x08);77 /// Master-slave control.78 pub const MASTER_SLAVE_CONTROL: Self = C22(0x09);79 /// Master-slave status.80 pub const MASTER_SLAVE_STATUS: Self = C22(0x0a);81 /// PSE Control.82 pub const PSE_CONTROL: Self = C22(0x0b);83 /// PSE Status.84 pub const PSE_STATUS: Self = C22(0x0c);85 /// MMD Register control.86 pub const MMD_CONTROL: Self = C22(0x0d);87 /// MMD Register address data.88 pub const MMD_DATA: Self = C22(0x0e);89 /// Extended status.90 pub const EXTENDED_STATUS: Self = C22(0x0f);91 92 /// Creates a new instance of `C22` with a vendor specific register.93 pub const fn vendor_specific<const N: u8>() -> Self {94 build_assert!(95 N > 0x0f && N < 0x20,96 "Vendor-specific register address must be between 16 and 31"97 );98 C22(N)99 }100}101 102impl private::Sealed for C22 {}103 104impl Register for C22 {105 fn read(&self, dev: &mut Device) -> Result<u16> {106 let phydev = dev.0.get();107 // SAFETY: `phydev` is pointing to a valid object by the type invariant of `Device`.108 // So it's just an FFI call, open code of `phy_read()` with a valid `phy_device` pointer109 // `phydev`.110 let ret = unsafe {111 bindings::mdiobus_read((*phydev).mdio.bus, (*phydev).mdio.addr, self.0.into())112 };113 to_result(ret)?;114 Ok(ret as u16)115 }116 117 fn write(&self, dev: &mut Device, val: u16) -> Result {118 let phydev = dev.0.get();119 // SAFETY: `phydev` is pointing to a valid object by the type invariant of `Device`.120 // So it's just an FFI call, open code of `phy_write()` with a valid `phy_device` pointer121 // `phydev`.122 to_result(unsafe {123 bindings::mdiobus_write((*phydev).mdio.bus, (*phydev).mdio.addr, self.0.into(), val)124 })125 }126 127 fn read_status(dev: &mut Device) -> Result<u16> {128 let phydev = dev.0.get();129 // SAFETY: `phydev` is pointing to a valid object by the type invariant of `Self`.130 // So it's just an FFI call.131 let ret = unsafe { bindings::genphy_read_status(phydev) };132 to_result(ret)?;133 Ok(ret as u16)134 }135}136 137/// A single MDIO clause 45 register device and address.138#[derive(Copy, Clone, Debug)]139pub struct Mmd(u8);140 141impl Mmd {142 /// Physical Medium Attachment/Dependent.143 pub const PMAPMD: Self = Mmd(uapi::MDIO_MMD_PMAPMD as u8);144 /// WAN interface sublayer.145 pub const WIS: Self = Mmd(uapi::MDIO_MMD_WIS as u8);146 /// Physical coding sublayer.147 pub const PCS: Self = Mmd(uapi::MDIO_MMD_PCS as u8);148 /// PHY Extender sublayer.149 pub const PHYXS: Self = Mmd(uapi::MDIO_MMD_PHYXS as u8);150 /// DTE Extender sublayer.151 pub const DTEXS: Self = Mmd(uapi::MDIO_MMD_DTEXS as u8);152 /// Transmission convergence.153 pub const TC: Self = Mmd(uapi::MDIO_MMD_TC as u8);154 /// Auto negotiation.155 pub const AN: Self = Mmd(uapi::MDIO_MMD_AN as u8);156 /// Separated PMA (1).157 pub const SEPARATED_PMA1: Self = Mmd(8);158 /// Separated PMA (2).159 pub const SEPARATED_PMA2: Self = Mmd(9);160 /// Separated PMA (3).161 pub const SEPARATED_PMA3: Self = Mmd(10);162 /// Separated PMA (4).163 pub const SEPARATED_PMA4: Self = Mmd(11);164 /// OFDM PMA/PMD.165 pub const OFDM_PMAPMD: Self = Mmd(12);166 /// Power unit.167 pub const POWER_UNIT: Self = Mmd(13);168 /// Clause 22 extension.169 pub const C22_EXT: Self = Mmd(uapi::MDIO_MMD_C22EXT as u8);170 /// Vendor specific 1.171 pub const VEND1: Self = Mmd(uapi::MDIO_MMD_VEND1 as u8);172 /// Vendor specific 2.173 pub const VEND2: Self = Mmd(uapi::MDIO_MMD_VEND2 as u8);174}175 176/// A single MDIO clause 45 register device and address.177///178/// Clause 45 uses a 5-bit device address to access a specific MMD within179/// a port, then a 16-bit register address to access a location within180/// that device. `C45` represents this by storing a [`Mmd`] and181/// a register number.182pub struct C45 {183 devad: Mmd,184 regnum: u16,185}186 187impl C45 {188 /// Creates a new instance of `C45`.189 pub fn new(devad: Mmd, regnum: u16) -> Self {190 Self { devad, regnum }191 }192}193 194impl private::Sealed for C45 {}195 196impl Register for C45 {197 fn read(&self, dev: &mut Device) -> Result<u16> {198 let phydev = dev.0.get();199 // SAFETY: `phydev` is pointing to a valid object by the type invariant of `Device`.200 // So it's just an FFI call.201 let ret =202 unsafe { bindings::phy_read_mmd(phydev, self.devad.0.into(), self.regnum.into()) };203 to_result(ret)?;204 Ok(ret as u16)205 }206 207 fn write(&self, dev: &mut Device, val: u16) -> Result {208 let phydev = dev.0.get();209 // SAFETY: `phydev` is pointing to a valid object by the type invariant of `Device`.210 // So it's just an FFI call.211 to_result(unsafe {212 bindings::phy_write_mmd(phydev, self.devad.0.into(), self.regnum.into(), val)213 })214 }215 216 fn read_status(dev: &mut Device) -> Result<u16> {217 let phydev = dev.0.get();218 // SAFETY: `phydev` is pointing to a valid object by the type invariant of `Self`.219 // So it's just an FFI call.220 let ret = unsafe { bindings::genphy_c45_read_status(phydev) };221 to_result(ret)?;222 Ok(ret as u16)223 }224}225