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1/* SPDX-License-Identifier: GPL-2.0-or-later */2/*********************************************************************3 *4 * msnd.h5 *6 * Turtle Beach MultiSound Sound Card Driver for Linux7 *8 * Some parts of this header file were derived from the Turtle Beach9 * MultiSound Driver Development Kit.10 *11 * Copyright (C) 1998 Andrew Veliath12 * Copyright (C) 1993 Turtle Beach Systems, Inc.13 *14 ********************************************************************/15#ifndef __MSND_H16#define __MSND_H17 18#define DEFSAMPLERATE		4410019#define DEFSAMPLESIZE		SNDRV_PCM_FORMAT_S1620#define DEFCHANNELS		121 22#define SRAM_BANK_SIZE		0x800023#define SRAM_CNTL_START		0x7F0024#define SMA_STRUCT_START	0x7F4025 26#define DSP_BASE_ADDR		0x400027#define DSP_BANK_BASE		0x400028 29#define AGND			0x0130#define SIGNAL			0x0231 32#define EXT_DSP_BIT_DCAL	0x000133#define EXT_DSP_BIT_MIDI_CON	0x000234 35#define BUFFSIZE		0x800036#define HOSTQ_SIZE		0x4037 38#define DAP_BUFF_SIZE		0x240039 40#define DAPQ_STRUCT_SIZE	0x1041#define DARQ_STRUCT_SIZE	0x1042#define DAPQ_BUFF_SIZE		(3 * 0x10)43#define DARQ_BUFF_SIZE		(3 * 0x10)44#define MODQ_BUFF_SIZE		0x40045 46#define DAPQ_DATA_BUFF		0x6C0047#define DARQ_DATA_BUFF		0x6C3048#define MODQ_DATA_BUFF		0x6C6049#define MIDQ_DATA_BUFF		0x706050 51#define DAPQ_OFFSET		SRAM_CNTL_START52#define DARQ_OFFSET		(SRAM_CNTL_START + 0x08)53#define MODQ_OFFSET		(SRAM_CNTL_START + 0x10)54#define MIDQ_OFFSET		(SRAM_CNTL_START + 0x18)55#define DSPQ_OFFSET		(SRAM_CNTL_START + 0x20)56 57#define	HP_ICR			0x0058#define	HP_CVR			0x0159#define	HP_ISR			0x0260#define	HP_IVR			0x0361#define HP_NU			0x0462#define HP_INFO			0x0463#define	HP_TXH			0x0564#define	HP_RXH			0x0565#define	HP_TXM			0x0666#define	HP_RXM			0x0667#define	HP_TXL			0x0768#define	HP_RXL			0x0769 70#define HP_ICR_DEF		0x0071#define HP_CVR_DEF		0x1272#define HP_ISR_DEF		0x0673#define HP_IVR_DEF		0x0f74#define HP_NU_DEF		0x0075 76#define	HP_IRQM			0x0977 78#define	HPR_BLRC		0x0879#define	HPR_SPR1		0x0980#define	HPR_SPR2		0x0A81#define	HPR_TCL0		0x0B82#define	HPR_TCL1		0x0C83#define	HPR_TCL2		0x0D84#define	HPR_TCL3		0x0E85#define	HPR_TCL4		0x0F86 87#define	HPICR_INIT		0x8088#define HPICR_HM1		0x4089#define HPICR_HM0		0x2090#define HPICR_HF1		0x1091#define HPICR_HF0		0x0892#define	HPICR_TREQ		0x0293#define	HPICR_RREQ		0x0194 95#define HPCVR_HC		0x8096 97#define	HPISR_HREQ		0x8098#define HPISR_DMA		0x4099#define HPISR_HF3		0x10100#define HPISR_HF2		0x08101#define	HPISR_TRDY		0x04102#define	HPISR_TXDE		0x02103#define	HPISR_RXDF		0x01104 105#define	HPIO_290		0106#define	HPIO_260		1107#define	HPIO_250		2108#define	HPIO_240		3109#define	HPIO_230		4110#define	HPIO_220		5111#define	HPIO_210		6112#define	HPIO_3E0		7113 114#define	HPMEM_NONE		0115#define	HPMEM_B000		1116#define	HPMEM_C800		2117#define	HPMEM_D000		3118#define	HPMEM_D400		4119#define	HPMEM_D800		5120#define	HPMEM_E000		6121#define	HPMEM_E800		7122 123#define	HPIRQ_NONE		0124#define HPIRQ_5			1125#define HPIRQ_7			2126#define HPIRQ_9			3127#define HPIRQ_10		4128#define HPIRQ_11		5129#define HPIRQ_12		6130#define HPIRQ_15		7131 132#define	HIMT_PLAY_DONE		0x00133#define	HIMT_RECORD_DONE	0x01134#define	HIMT_MIDI_EOS		0x02135#define	HIMT_MIDI_OUT		0x03136 137#define	HIMT_MIDI_IN_UCHAR	0x0E138#define	HIMT_DSP		0x0F139 140#define	HDEX_BASE	       	0x92141#define	HDEX_PLAY_START		(0 + HDEX_BASE)142#define	HDEX_PLAY_STOP		(1 + HDEX_BASE)143#define	HDEX_PLAY_PAUSE		(2 + HDEX_BASE)144#define	HDEX_PLAY_RESUME	(3 + HDEX_BASE)145#define	HDEX_RECORD_START	(4 + HDEX_BASE)146#define	HDEX_RECORD_STOP	(5 + HDEX_BASE)147#define	HDEX_MIDI_IN_START 	(6 + HDEX_BASE)148#define	HDEX_MIDI_IN_STOP	(7 + HDEX_BASE)149#define	HDEX_MIDI_OUT_START	(8 + HDEX_BASE)150#define	HDEX_MIDI_OUT_STOP	(9 + HDEX_BASE)151#define	HDEX_AUX_REQ		(10 + HDEX_BASE)152 153#define	HDEXAR_CLEAR_PEAKS	1154#define	HDEXAR_IN_SET_POTS	2155#define	HDEXAR_AUX_SET_POTS	3156#define	HDEXAR_CAL_A_TO_D	4157#define	HDEXAR_RD_EXT_DSP_BITS	5158 159/* Pinnacle only HDEXAR defs */160#define	HDEXAR_SET_ANA_IN	0161#define	HDEXAR_SET_SYNTH_IN	4162#define	HDEXAR_READ_DAT_IN	5163#define	HDEXAR_MIC_SET_POTS	6164#define	HDEXAR_SET_DAT_IN	7165 166#define HDEXAR_SET_SYNTH_48	8167#define HDEXAR_SET_SYNTH_44	9168 169#define HIWORD(l)		((u16)((((u32)(l)) >> 16) & 0xFFFF))170#define LOWORD(l)		((u16)(u32)(l))171#define HIBYTE(w)		((u8)(((u16)(w) >> 8) & 0xFF))172#define LOBYTE(w)		((u8)(w))173#define MAKELONG(low, hi)	((long)(((u16)(low))|(((u32)((u16)(hi)))<<16)))174#define MAKEWORD(low, hi)	((u16)(((u8)(low))|(((u16)((u8)(hi)))<<8)))175 176#define PCTODSP_OFFSET(w)	(u16)((w)/2)177#define PCTODSP_BASED(w)	(u16)(((w)/2) + DSP_BASE_ADDR)178#define DSPTOPC_BASED(w)	(((w) - DSP_BASE_ADDR) * 2)179 180#ifdef SLOWIO181#  undef outb182#  undef inb183#  define outb			outb_p184#  define inb			inb_p185#endif186 187/* JobQueueStruct */188#define JQS_wStart		0x00189#define JQS_wSize		0x02190#define JQS_wHead		0x04191#define JQS_wTail		0x06192#define JQS__size		0x08193 194/* DAQueueDataStruct */195#define DAQDS_wStart		0x00196#define DAQDS_wSize		0x02197#define DAQDS_wFormat		0x04198#define DAQDS_wSampleSize	0x06199#define DAQDS_wChannels		0x08200#define DAQDS_wSampleRate	0x0A201#define DAQDS_wIntMsg		0x0C202#define DAQDS_wFlags		0x0E203#define DAQDS__size		0x10204 205#include <sound/pcm.h>206 207struct snd_msnd {208	void __iomem		*mappedbase;209	int			play_period_bytes;210	int			playLimit;211	int			playPeriods;212	int 			playDMAPos;213	int			banksPlayed;214	int 			captureDMAPos;215	int			capturePeriodBytes;216	int			captureLimit;217	int			capturePeriods;218	struct snd_card		*card;219	void			*msndmidi_mpu;220	struct snd_rawmidi	*rmidi;221 222	/* Hardware resources */223	long io;224	int memid, irqid;225	int irq, irq_ref;226	unsigned long base;227 228	/* Motorola 56k DSP SMA */229	void __iomem	*SMA;230	void __iomem	*DAPQ;231	void __iomem	*DARQ;232	void __iomem	*MODQ;233	void __iomem	*MIDQ;234	void __iomem	*DSPQ;235	int dspq_data_buff, dspq_buff_size;236 237	/* State variables */238	enum { msndClassic, msndPinnacle } type;239	fmode_t mode;240	unsigned long flags;241#define F_RESETTING			0242#define F_HAVEDIGITAL			1243#define F_AUDIO_WRITE_INUSE		2244#define F_WRITING			3245#define F_WRITEBLOCK			4246#define F_WRITEFLUSH			5247#define F_AUDIO_READ_INUSE		6248#define F_READING			7249#define F_READBLOCK			8250#define F_EXT_MIDI_INUSE		9251#define F_HDR_MIDI_INUSE		10252#define F_DISABLE_WRITE_NDELAY		11253	spinlock_t lock;254	spinlock_t mixer_lock;255	int nresets;256	unsigned recsrc;257#define LEVEL_ENTRIES 32258	int left_levels[LEVEL_ENTRIES];259	int right_levels[LEVEL_ENTRIES];260	int calibrate_signal;261	int play_sample_size, play_sample_rate, play_channels;262	int play_ndelay;263	int capture_sample_size, capture_sample_rate, capture_channels;264	int capture_ndelay;265	u8 bCurrentMidiPatch;266 267	int last_playbank, last_recbank;268	struct snd_pcm_substream *playback_substream;269	struct snd_pcm_substream *capture_substream;270 271};272 273void snd_msnd_init_queue(void __iomem *base, int start, int size);274 275int snd_msnd_send_dsp_cmd(struct snd_msnd *chip, u8 cmd);276int snd_msnd_send_word(struct snd_msnd *chip,277			   unsigned char high,278			   unsigned char mid,279			   unsigned char low);280int snd_msnd_upload_host(struct snd_msnd *chip,281			     const u8 *bin, int len);282int snd_msnd_enable_irq(struct snd_msnd *chip);283int snd_msnd_disable_irq(struct snd_msnd *chip);284void snd_msnd_dsp_halt(struct snd_msnd *chip, struct file *file);285int snd_msnd_DAPQ(struct snd_msnd *chip, int start);286int snd_msnd_DARQ(struct snd_msnd *chip, int start);287int snd_msnd_pcm(struct snd_card *card, int device);288 289int snd_msndmidi_new(struct snd_card *card, int device);290void snd_msndmidi_input_read(void *mpu);291 292void snd_msndmix_setup(struct snd_msnd *chip);293int snd_msndmix_new(struct snd_card *card);294int snd_msndmix_force_recsrc(struct snd_msnd *chip, int recsrc);295#endif /* __MSND_H */296