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1// SPDX-License-Identifier: GPL-2.0-or-later2/*3 * Driver for ESS Maestro 1/2/2E Sound Card (started 21.8.99)4 * Copyright (c) by Matze Braun <MatzeBraun@gmx.de>.5 * Takashi Iwai <tiwai@suse.de>6 * 7 * Most of the driver code comes from Zach Brown(zab@redhat.com)8 * Alan Cox OSS Driver9 * Rewritted from card-es1938.c source.10 *11 * TODO:12 * Perhaps Synth13 *14 * Notes from Zach Brown about the driver code15 *16 * Hardware Description17 *18 * A working Maestro setup contains the Maestro chip wired to a 19 * codec or 2. In the Maestro we have the APUs, the ASSP, and the20 * Wavecache. The APUs can be though of as virtual audio routing21 * channels. They can take data from a number of sources and perform22 * basic encodings of the data. The wavecache is a storehouse for23 * PCM data. Typically it deals with PCI and interracts with the24 * APUs. The ASSP is a wacky DSP like device that ESS is loth25 * to release docs on. Thankfully it isn't required on the Maestro26 * until you start doing insane things like FM emulation and surround27 * encoding. The codecs are almost always AC-97 compliant codecs, 28 * but it appears that early Maestros may have had PT101 (an ESS29 * part?) wired to them. The only real difference in the Maestro30 * families is external goop like docking capability, memory for31 * the ASSP, and initialization differences.32 *33 * Driver Operation34 *35 * We only drive the APU/Wavecache as typical DACs and drive the36 * mixers in the codecs. There are 64 APUs. We assign 6 to each37 * /dev/dsp? device. 2 channels for output, and 4 channels for38 * input.39 *40 * Each APU can do a number of things, but we only really use41 * 3 basic functions. For playback we use them to convert PCM42 * data fetched over PCI by the wavecahche into analog data that43 * is handed to the codec. One APU for mono, and a pair for stereo.44 * When in stereo, the combination of smarts in the APU and Wavecache45 * decide which wavecache gets the left or right channel.46 *47 * For record we still use the old overly mono system. For each in48 * coming channel the data comes in from the codec, through a 'input'49 * APU, through another rate converter APU, and then into memory via50 * the wavecache and PCI. If its stereo, we mash it back into LRLR in51 * software. The pass between the 2 APUs is supposedly what requires us52 * to have a 512 byte buffer sitting around in wavecache/memory.53 *54 * The wavecache makes our life even more fun. First off, it can55 * only address the first 28 bits of PCI address space, making it56 * useless on quite a few architectures. Secondly, its insane.57 * It claims to fetch from 4 regions of PCI space, each 4 meg in length.58 * But that doesn't really work. You can only use 1 region. So all our59 * allocations have to be in 4meg of each other. Booo. Hiss.60 * So we have a module parameter, dsps_order, that is the order of61 * the number of dsps to provide. All their buffer space is allocated62 * on open time. The sonicvibes OSS routines we inherited really want63 * power of 2 buffers, so we have all those next to each other, then64 * 512 byte regions for the recording wavecaches. This ends up65 * wasting quite a bit of memory. The only fixes I can see would be 66 * getting a kernel allocator that could work in zones, or figuring out67 * just how to coerce the WP into doing what we want.68 *69 * The indirection of the various registers means we have to spinlock70 * nearly all register accesses. We have the main register indirection71 * like the wave cache, maestro registers, etc. Then we have beasts72 * like the APU interface that is indirect registers gotten at through73 * the main maestro indirection. Ouch. We spinlock around the actual74 * ports on a per card basis. This means spinlock activity at each IO75 * operation, but the only IO operation clusters are in non critical 76 * paths and it makes the code far easier to follow. Interrupts are77 * blocked while holding the locks because the int handler has to78 * get at some of them :(. The mixer interface doesn't, however.79 * We also have an OSS state lock that is thrown around in a few80 * places.81 */82 83#include <linux/io.h>84#include <linux/delay.h>85#include <linux/interrupt.h>86#include <linux/init.h>87#include <linux/pci.h>88#include <linux/dma-mapping.h>89#include <linux/slab.h>90#include <linux/gameport.h>91#include <linux/module.h>92#include <linux/mutex.h>93#include <linux/input.h>94 95#include <sound/core.h>96#include <sound/pcm.h>97#include <sound/mpu401.h>98#include <sound/ac97_codec.h>99#include <sound/initval.h>100 101#ifdef CONFIG_SND_ES1968_RADIO102#include <media/drv-intf/tea575x.h>103#endif104 105#define CARD_NAME "ESS Maestro1/2"106#define DRIVER_NAME "ES1968"107 108MODULE_DESCRIPTION("ESS Maestro");109MODULE_LICENSE("GPL");110 111#if IS_REACHABLE(CONFIG_GAMEPORT)112#define SUPPORT_JOYSTICK 1113#endif114 115static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 1-MAX */116static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */117static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */118static int total_bufsize[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 1024 };119static int pcm_substreams_p[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 4 };120static int pcm_substreams_c[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 1 };121static int clock[SNDRV_CARDS];122static int use_pm[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 2};123static int enable_mpu[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 2};124#ifdef SUPPORT_JOYSTICK125static bool joystick[SNDRV_CARDS];126#endif127static int radio_nr[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = -1};128 129module_param_array(index, int, NULL, 0444);130MODULE_PARM_DESC(index, "Index value for " CARD_NAME " soundcard.");131module_param_array(id, charp, NULL, 0444);132MODULE_PARM_DESC(id, "ID string for " CARD_NAME " soundcard.");133module_param_array(enable, bool, NULL, 0444);134MODULE_PARM_DESC(enable, "Enable " CARD_NAME " soundcard.");135module_param_array(total_bufsize, int, NULL, 0444);136MODULE_PARM_DESC(total_bufsize, "Total buffer size in kB.");137module_param_array(pcm_substreams_p, int, NULL, 0444);138MODULE_PARM_DESC(pcm_substreams_p, "PCM Playback substreams for " CARD_NAME " soundcard.");139module_param_array(pcm_substreams_c, int, NULL, 0444);140MODULE_PARM_DESC(pcm_substreams_c, "PCM Capture substreams for " CARD_NAME " soundcard.");141module_param_array(clock, int, NULL, 0444);142MODULE_PARM_DESC(clock, "Clock on " CARD_NAME " soundcard. (0 = auto-detect)");143module_param_array(use_pm, int, NULL, 0444);144MODULE_PARM_DESC(use_pm, "Toggle power-management. (0 = off, 1 = on, 2 = auto)");145module_param_array(enable_mpu, int, NULL, 0444);146MODULE_PARM_DESC(enable_mpu, "Enable MPU401. (0 = off, 1 = on, 2 = auto)");147#ifdef SUPPORT_JOYSTICK148module_param_array(joystick, bool, NULL, 0444);149MODULE_PARM_DESC(joystick, "Enable joystick.");150#endif151module_param_array(radio_nr, int, NULL, 0444);152MODULE_PARM_DESC(radio_nr, "Radio device numbers");153 154 155 156#define NR_APUS 64157#define NR_APU_REGS 16158 159/* NEC Versas ? */160#define NEC_VERSA_SUBID1 0x80581033161#define NEC_VERSA_SUBID2 0x803c1033162 163/* Mode Flags */164#define ESS_FMT_STEREO 0x01165#define ESS_FMT_16BIT 0x02166 167#define DAC_RUNNING 1168#define ADC_RUNNING 2169 170/* Values for the ESM_LEGACY_AUDIO_CONTROL */171 172#define ESS_DISABLE_AUDIO 0x8000173#define ESS_ENABLE_SERIAL_IRQ 0x4000174#define IO_ADRESS_ALIAS 0x0020175#define MPU401_IRQ_ENABLE 0x0010176#define MPU401_IO_ENABLE 0x0008177#define GAME_IO_ENABLE 0x0004178#define FM_IO_ENABLE 0x0002179#define SB_IO_ENABLE 0x0001180 181/* Values for the ESM_CONFIG_A */182 183#define PIC_SNOOP1 0x4000184#define PIC_SNOOP2 0x2000185#define SAFEGUARD 0x0800186#define DMA_CLEAR 0x0700187#define DMA_DDMA 0x0000188#define DMA_TDMA 0x0100189#define DMA_PCPCI 0x0200190#define POST_WRITE 0x0080191#define PCI_TIMING 0x0040192#define SWAP_LR 0x0020193#define SUBTR_DECODE 0x0002194 195/* Values for the ESM_CONFIG_B */196 197#define SPDIF_CONFB 0x0100198#define HWV_CONFB 0x0080199#define DEBOUNCE 0x0040200#define GPIO_CONFB 0x0020201#define CHI_CONFB 0x0010202#define IDMA_CONFB 0x0008 /*undoc */203#define MIDI_FIX 0x0004 /*undoc */204#define IRQ_TO_ISA 0x0001 /*undoc */205 206/* Values for Ring Bus Control B */207#define RINGB_2CODEC_ID_MASK 0x0003208#define RINGB_DIS_VALIDATION 0x0008209#define RINGB_EN_SPDIF 0x0010210#define RINGB_EN_2CODEC 0x0020211#define RINGB_SING_BIT_DUAL 0x0040212 213/* ****Port Addresses**** */214 215/* Write & Read */216#define ESM_INDEX 0x02217#define ESM_DATA 0x00218 219/* AC97 + RingBus */220#define ESM_AC97_INDEX 0x30221#define ESM_AC97_DATA 0x32222#define ESM_RING_BUS_DEST 0x34223#define ESM_RING_BUS_CONTR_A 0x36224#define ESM_RING_BUS_CONTR_B 0x38225#define ESM_RING_BUS_SDO 0x3A226 227/* WaveCache*/228#define WC_INDEX 0x10229#define WC_DATA 0x12230#define WC_CONTROL 0x14231 232/* ASSP*/233#define ASSP_INDEX 0x80234#define ASSP_MEMORY 0x82235#define ASSP_DATA 0x84236#define ASSP_CONTROL_A 0xA2237#define ASSP_CONTROL_B 0xA4238#define ASSP_CONTROL_C 0xA6239#define ASSP_HOSTW_INDEX 0xA8240#define ASSP_HOSTW_DATA 0xAA241#define ASSP_HOSTW_IRQ 0xAC242/* Midi */243#define ESM_MPU401_PORT 0x98244/* Others */245#define ESM_PORT_HOST_IRQ 0x18246 247#define IDR0_DATA_PORT 0x00248#define IDR1_CRAM_POINTER 0x01249#define IDR2_CRAM_DATA 0x02250#define IDR3_WAVE_DATA 0x03251#define IDR4_WAVE_PTR_LOW 0x04252#define IDR5_WAVE_PTR_HI 0x05253#define IDR6_TIMER_CTRL 0x06254#define IDR7_WAVE_ROMRAM 0x07255 256#define WRITEABLE_MAP 0xEFFFFF257#define READABLE_MAP 0x64003F258 259/* PCI Register */260 261#define ESM_LEGACY_AUDIO_CONTROL 0x40262#define ESM_ACPI_COMMAND 0x54263#define ESM_CONFIG_A 0x50264#define ESM_CONFIG_B 0x52265#define ESM_DDMA 0x60266 267/* Bob Bits */268#define ESM_BOB_ENABLE 0x0001269#define ESM_BOB_START 0x0001270 271/* Host IRQ Control Bits */272#define ESM_RESET_MAESTRO 0x8000273#define ESM_RESET_DIRECTSOUND 0x4000274#define ESM_HIRQ_ClkRun 0x0100275#define ESM_HIRQ_HW_VOLUME 0x0040276#define ESM_HIRQ_HARPO 0x0030 /* What's that? */277#define ESM_HIRQ_ASSP 0x0010278#define ESM_HIRQ_DSIE 0x0004279#define ESM_HIRQ_MPU401 0x0002280#define ESM_HIRQ_SB 0x0001281 282/* Host IRQ Status Bits */283#define ESM_MPU401_IRQ 0x02284#define ESM_SB_IRQ 0x01285#define ESM_SOUND_IRQ 0x04286#define ESM_ASSP_IRQ 0x10287#define ESM_HWVOL_IRQ 0x40288 289#define ESS_SYSCLK 50000000290#define ESM_BOB_FREQ 200291#define ESM_BOB_FREQ_MAX 800292 293#define ESM_FREQ_ESM1 (49152000L / 1024L) /* default rate 48000 */294#define ESM_FREQ_ESM2 (50000000L / 1024L)295 296/* APU Modes: reg 0x00, bit 4-7 */297#define ESM_APU_MODE_SHIFT 4298#define ESM_APU_MODE_MASK (0xf << 4)299#define ESM_APU_OFF 0x00300#define ESM_APU_16BITLINEAR 0x01 /* 16-Bit Linear Sample Player */301#define ESM_APU_16BITSTEREO 0x02 /* 16-Bit Stereo Sample Player */302#define ESM_APU_8BITLINEAR 0x03 /* 8-Bit Linear Sample Player */303#define ESM_APU_8BITSTEREO 0x04 /* 8-Bit Stereo Sample Player */304#define ESM_APU_8BITDIFF 0x05 /* 8-Bit Differential Sample Playrer */305#define ESM_APU_DIGITALDELAY 0x06 /* Digital Delay Line */306#define ESM_APU_DUALTAP 0x07 /* Dual Tap Reader */307#define ESM_APU_CORRELATOR 0x08 /* Correlator */308#define ESM_APU_INPUTMIXER 0x09 /* Input Mixer */309#define ESM_APU_WAVETABLE 0x0A /* Wave Table Mode */310#define ESM_APU_SRCONVERTOR 0x0B /* Sample Rate Convertor */311#define ESM_APU_16BITPINGPONG 0x0C /* 16-Bit Ping-Pong Sample Player */312#define ESM_APU_RESERVED1 0x0D /* Reserved 1 */313#define ESM_APU_RESERVED2 0x0E /* Reserved 2 */314#define ESM_APU_RESERVED3 0x0F /* Reserved 3 */315 316/* reg 0x00 */317#define ESM_APU_FILTER_Q_SHIFT 0318#define ESM_APU_FILTER_Q_MASK (3 << 0)319/* APU Filtey Q Control */320#define ESM_APU_FILTER_LESSQ 0x00321#define ESM_APU_FILTER_MOREQ 0x03322 323#define ESM_APU_FILTER_TYPE_SHIFT 2324#define ESM_APU_FILTER_TYPE_MASK (3 << 2)325#define ESM_APU_ENV_TYPE_SHIFT 8326#define ESM_APU_ENV_TYPE_MASK (3 << 8)327#define ESM_APU_ENV_STATE_SHIFT 10328#define ESM_APU_ENV_STATE_MASK (3 << 10)329#define ESM_APU_END_CURVE (1 << 12)330#define ESM_APU_INT_ON_LOOP (1 << 13)331#define ESM_APU_DMA_ENABLE (1 << 14)332 333/* reg 0x02 */334#define ESM_APU_SUBMIX_GROUP_SHIRT 0335#define ESM_APU_SUBMIX_GROUP_MASK (7 << 0)336#define ESM_APU_SUBMIX_MODE (1 << 3)337#define ESM_APU_6dB (1 << 4)338#define ESM_APU_DUAL_EFFECT (1 << 5)339#define ESM_APU_EFFECT_CHANNELS_SHIFT 6340#define ESM_APU_EFFECT_CHANNELS_MASK (3 << 6)341 342/* reg 0x03 */343#define ESM_APU_STEP_SIZE_MASK 0x0fff344 345/* reg 0x04 */346#define ESM_APU_PHASE_SHIFT 0347#define ESM_APU_PHASE_MASK (0xff << 0)348#define ESM_APU_WAVE64K_PAGE_SHIFT 8 /* most 8bit of wave start offset */349#define ESM_APU_WAVE64K_PAGE_MASK (0xff << 8)350 351/* reg 0x05 - wave start offset */352/* reg 0x06 - wave end offset */353/* reg 0x07 - wave loop length */354 355/* reg 0x08 */356#define ESM_APU_EFFECT_GAIN_SHIFT 0357#define ESM_APU_EFFECT_GAIN_MASK (0xff << 0)358#define ESM_APU_TREMOLO_DEPTH_SHIFT 8359#define ESM_APU_TREMOLO_DEPTH_MASK (0xf << 8)360#define ESM_APU_TREMOLO_RATE_SHIFT 12361#define ESM_APU_TREMOLO_RATE_MASK (0xf << 12)362 363/* reg 0x09 */364/* bit 0-7 amplitude dest? */365#define ESM_APU_AMPLITUDE_NOW_SHIFT 8366#define ESM_APU_AMPLITUDE_NOW_MASK (0xff << 8)367 368/* reg 0x0a */369#define ESM_APU_POLAR_PAN_SHIFT 0370#define ESM_APU_POLAR_PAN_MASK (0x3f << 0)371/* Polar Pan Control */372#define ESM_APU_PAN_CENTER_CIRCLE 0x00373#define ESM_APU_PAN_MIDDLE_RADIUS 0x01374#define ESM_APU_PAN_OUTSIDE_RADIUS 0x02375 376#define ESM_APU_FILTER_TUNING_SHIFT 8377#define ESM_APU_FILTER_TUNING_MASK (0xff << 8)378 379/* reg 0x0b */380#define ESM_APU_DATA_SRC_A_SHIFT 0381#define ESM_APU_DATA_SRC_A_MASK (0x7f << 0)382#define ESM_APU_INV_POL_A (1 << 7)383#define ESM_APU_DATA_SRC_B_SHIFT 8384#define ESM_APU_DATA_SRC_B_MASK (0x7f << 8)385#define ESM_APU_INV_POL_B (1 << 15)386 387#define ESM_APU_VIBRATO_RATE_SHIFT 0388#define ESM_APU_VIBRATO_RATE_MASK (0xf << 0)389#define ESM_APU_VIBRATO_DEPTH_SHIFT 4390#define ESM_APU_VIBRATO_DEPTH_MASK (0xf << 4)391#define ESM_APU_VIBRATO_PHASE_SHIFT 8392#define ESM_APU_VIBRATO_PHASE_MASK (0xff << 8)393 394/* reg 0x0c */395#define ESM_APU_RADIUS_SELECT (1 << 6)396 397/* APU Filter Control */398#define ESM_APU_FILTER_2POLE_LOPASS 0x00399#define ESM_APU_FILTER_2POLE_BANDPASS 0x01400#define ESM_APU_FILTER_2POLE_HIPASS 0x02401#define ESM_APU_FILTER_1POLE_LOPASS 0x03402#define ESM_APU_FILTER_1POLE_HIPASS 0x04403#define ESM_APU_FILTER_OFF 0x05404 405/* APU ATFP Type */406#define ESM_APU_ATFP_AMPLITUDE 0x00407#define ESM_APU_ATFP_TREMELO 0x01408#define ESM_APU_ATFP_FILTER 0x02409#define ESM_APU_ATFP_PAN 0x03410 411/* APU ATFP Flags */412#define ESM_APU_ATFP_FLG_OFF 0x00413#define ESM_APU_ATFP_FLG_WAIT 0x01414#define ESM_APU_ATFP_FLG_DONE 0x02415#define ESM_APU_ATFP_FLG_INPROCESS 0x03416 417 418/* capture mixing buffer size */419#define ESM_MEM_ALIGN 0x1000420#define ESM_MIXBUF_SIZE 0x400421 422#define ESM_MODE_PLAY 0423#define ESM_MODE_CAPTURE 1424 425 426/* APU use in the driver */427enum snd_enum_apu_type {428 ESM_APU_PCM_PLAY,429 ESM_APU_PCM_CAPTURE,430 ESM_APU_PCM_RATECONV,431 ESM_APU_FREE432};433 434/* chip type */435enum {436 TYPE_MAESTRO, TYPE_MAESTRO2, TYPE_MAESTRO2E437};438 439/* DMA Hack! */440struct esm_memory {441 struct snd_dma_buffer buf;442 int empty; /* status */443 struct list_head list;444};445 446/* Playback Channel */447struct esschan {448 int running;449 450 u8 apu[4];451 u8 apu_mode[4];452 453 /* playback/capture pcm buffer */454 struct esm_memory *memory;455 /* capture mixer buffer */456 struct esm_memory *mixbuf;457 458 unsigned int hwptr; /* current hw pointer in bytes */459 unsigned int count; /* sample counter in bytes */460 unsigned int dma_size; /* total buffer size in bytes */461 unsigned int frag_size; /* period size in bytes */462 unsigned int wav_shift;463 u16 base[4]; /* offset for ptr */464 465 /* stereo/16bit flag */466 unsigned char fmt;467 int mode; /* playback / capture */468 469 int bob_freq; /* required timer frequency */470 471 struct snd_pcm_substream *substream;472 473 /* linked list */474 struct list_head list;475 476 u16 wc_map[4];477};478 479struct es1968 {480 /* Module Config */481 int total_bufsize; /* in bytes */482 483 int playback_streams, capture_streams;484 485 unsigned int clock; /* clock */486 /* for clock measurement */487 unsigned int in_measurement: 1;488 unsigned int measure_apu;489 unsigned int measure_lastpos;490 unsigned int measure_count;491 492 /* buffer */493 struct snd_dma_buffer dma;494 495 /* Resources... */496 int irq;497 unsigned long io_port;498 int type;499 struct pci_dev *pci;500 struct snd_card *card;501 struct snd_pcm *pcm;502 int do_pm; /* power-management enabled */503 504 /* DMA memory block */505 struct list_head buf_list;506 507 /* ALSA Stuff */508 struct snd_ac97 *ac97;509 struct snd_rawmidi *rmidi;510 511 spinlock_t reg_lock;512 unsigned int in_suspend;513 514 /* Maestro Stuff */515 u16 maestro_map[32];516 int bobclient; /* active timer instancs */517 int bob_freq; /* timer frequency */518 struct mutex memory_mutex; /* memory lock */519 520 /* APU states */521 unsigned char apu[NR_APUS];522 523 /* active substreams */524 struct list_head substream_list;525 spinlock_t substream_lock;526 527 u16 apu_map[NR_APUS][NR_APU_REGS];528 529#ifdef SUPPORT_JOYSTICK530 struct gameport *gameport;531#endif532 533#ifdef CONFIG_SND_ES1968_INPUT534 struct input_dev *input_dev;535 char phys[64]; /* physical device path */536#else537 struct snd_kcontrol *master_switch; /* for h/w volume control */538 struct snd_kcontrol *master_volume;539#endif540 struct work_struct hwvol_work;541 542#ifdef CONFIG_SND_ES1968_RADIO543 struct v4l2_device v4l2_dev;544 struct snd_tea575x tea;545 unsigned int tea575x_tuner;546#endif547};548 549static irqreturn_t snd_es1968_interrupt(int irq, void *dev_id);550 551static const struct pci_device_id snd_es1968_ids[] = {552 /* Maestro 1 */553 { 0x1285, 0x0100, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_MULTIMEDIA_AUDIO << 8, 0xffff00, TYPE_MAESTRO },554 /* Maestro 2 */555 { 0x125d, 0x1968, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_MULTIMEDIA_AUDIO << 8, 0xffff00, TYPE_MAESTRO2 },556 /* Maestro 2E */557 { 0x125d, 0x1978, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_MULTIMEDIA_AUDIO << 8, 0xffff00, TYPE_MAESTRO2E },558 { 0, }559};560 561MODULE_DEVICE_TABLE(pci, snd_es1968_ids);562 563/* *********************564 * Low Level Funcs! *565 *********************/566 567/* no spinlock */568static void __maestro_write(struct es1968 *chip, u16 reg, u16 data)569{570 outw(reg, chip->io_port + ESM_INDEX);571 outw(data, chip->io_port + ESM_DATA);572 chip->maestro_map[reg] = data;573}574 575static inline void maestro_write(struct es1968 *chip, u16 reg, u16 data)576{577 unsigned long flags;578 spin_lock_irqsave(&chip->reg_lock, flags);579 __maestro_write(chip, reg, data);580 spin_unlock_irqrestore(&chip->reg_lock, flags);581}582 583/* no spinlock */584static u16 __maestro_read(struct es1968 *chip, u16 reg)585{586 if (READABLE_MAP & (1 << reg)) {587 outw(reg, chip->io_port + ESM_INDEX);588 chip->maestro_map[reg] = inw(chip->io_port + ESM_DATA);589 }590 return chip->maestro_map[reg];591}592 593static inline u16 maestro_read(struct es1968 *chip, u16 reg)594{595 unsigned long flags;596 u16 result;597 spin_lock_irqsave(&chip->reg_lock, flags);598 result = __maestro_read(chip, reg);599 spin_unlock_irqrestore(&chip->reg_lock, flags);600 return result;601}602 603/* Wait for the codec bus to be free */604static int snd_es1968_ac97_wait(struct es1968 *chip)605{606 int timeout = 100000;607 608 while (timeout-- > 0) {609 if (!(inb(chip->io_port + ESM_AC97_INDEX) & 1))610 return 0;611 cond_resched();612 }613 dev_dbg(chip->card->dev, "ac97 timeout\n");614 return 1; /* timeout */615}616 617static int snd_es1968_ac97_wait_poll(struct es1968 *chip)618{619 int timeout = 100000;620 621 while (timeout-- > 0) {622 if (!(inb(chip->io_port + ESM_AC97_INDEX) & 1))623 return 0;624 }625 dev_dbg(chip->card->dev, "ac97 timeout\n");626 return 1; /* timeout */627}628 629static void snd_es1968_ac97_write(struct snd_ac97 *ac97, unsigned short reg, unsigned short val)630{631 struct es1968 *chip = ac97->private_data;632 633 snd_es1968_ac97_wait(chip);634 635 /* Write the bus */636 outw(val, chip->io_port + ESM_AC97_DATA);637 /*msleep(1);*/638 outb(reg, chip->io_port + ESM_AC97_INDEX);639 /*msleep(1);*/640}641 642static unsigned short snd_es1968_ac97_read(struct snd_ac97 *ac97, unsigned short reg)643{644 u16 data = 0;645 struct es1968 *chip = ac97->private_data;646 647 snd_es1968_ac97_wait(chip);648 649 outb(reg | 0x80, chip->io_port + ESM_AC97_INDEX);650 /*msleep(1);*/651 652 if (!snd_es1968_ac97_wait_poll(chip)) {653 data = inw(chip->io_port + ESM_AC97_DATA);654 /*msleep(1);*/655 }656 657 return data;658}659 660/* no spinlock */661static void apu_index_set(struct es1968 *chip, u16 index)662{663 int i;664 __maestro_write(chip, IDR1_CRAM_POINTER, index);665 for (i = 0; i < 1000; i++)666 if (__maestro_read(chip, IDR1_CRAM_POINTER) == index)667 return;668 dev_dbg(chip->card->dev, "APU register select failed. (Timeout)\n");669}670 671/* no spinlock */672static void apu_data_set(struct es1968 *chip, u16 data)673{674 int i;675 for (i = 0; i < 1000; i++) {676 if (__maestro_read(chip, IDR0_DATA_PORT) == data)677 return;678 __maestro_write(chip, IDR0_DATA_PORT, data);679 }680 dev_dbg(chip->card->dev, "APU register set probably failed (Timeout)!\n");681}682 683/* no spinlock */684static void __apu_set_register(struct es1968 *chip, u16 channel, u8 reg, u16 data)685{686 if (snd_BUG_ON(channel >= NR_APUS))687 return;688 chip->apu_map[channel][reg] = data;689 reg |= (channel << 4);690 apu_index_set(chip, reg);691 apu_data_set(chip, data);692}693 694static void apu_set_register(struct es1968 *chip, u16 channel, u8 reg, u16 data)695{696 unsigned long flags;697 spin_lock_irqsave(&chip->reg_lock, flags);698 __apu_set_register(chip, channel, reg, data);699 spin_unlock_irqrestore(&chip->reg_lock, flags);700}701 702static u16 __apu_get_register(struct es1968 *chip, u16 channel, u8 reg)703{704 if (snd_BUG_ON(channel >= NR_APUS))705 return 0;706 reg |= (channel << 4);707 apu_index_set(chip, reg);708 return __maestro_read(chip, IDR0_DATA_PORT);709}710 711static u16 apu_get_register(struct es1968 *chip, u16 channel, u8 reg)712{713 unsigned long flags;714 u16 v;715 spin_lock_irqsave(&chip->reg_lock, flags);716 v = __apu_get_register(chip, channel, reg);717 spin_unlock_irqrestore(&chip->reg_lock, flags);718 return v;719}720 721#if 0 /* ASSP is not supported */722 723static void assp_set_register(struct es1968 *chip, u32 reg, u32 value)724{725 unsigned long flags;726 727 spin_lock_irqsave(&chip->reg_lock, flags);728 outl(reg, chip->io_port + ASSP_INDEX);729 outl(value, chip->io_port + ASSP_DATA);730 spin_unlock_irqrestore(&chip->reg_lock, flags);731}732 733static u32 assp_get_register(struct es1968 *chip, u32 reg)734{735 unsigned long flags;736 u32 value;737 738 spin_lock_irqsave(&chip->reg_lock, flags);739 outl(reg, chip->io_port + ASSP_INDEX);740 value = inl(chip->io_port + ASSP_DATA);741 spin_unlock_irqrestore(&chip->reg_lock, flags);742 743 return value;744}745 746#endif747 748static void wave_set_register(struct es1968 *chip, u16 reg, u16 value)749{750 unsigned long flags;751 752 spin_lock_irqsave(&chip->reg_lock, flags);753 outw(reg, chip->io_port + WC_INDEX);754 outw(value, chip->io_port + WC_DATA);755 spin_unlock_irqrestore(&chip->reg_lock, flags);756}757 758static u16 wave_get_register(struct es1968 *chip, u16 reg)759{760 unsigned long flags;761 u16 value;762 763 spin_lock_irqsave(&chip->reg_lock, flags);764 outw(reg, chip->io_port + WC_INDEX);765 value = inw(chip->io_port + WC_DATA);766 spin_unlock_irqrestore(&chip->reg_lock, flags);767 768 return value;769}770 771/* *******************772 * Bob the Timer! *773 *******************/774 775static void snd_es1968_bob_stop(struct es1968 *chip)776{777 u16 reg;778 779 reg = __maestro_read(chip, 0x11);780 reg &= ~ESM_BOB_ENABLE;781 __maestro_write(chip, 0x11, reg);782 reg = __maestro_read(chip, 0x17);783 reg &= ~ESM_BOB_START;784 __maestro_write(chip, 0x17, reg);785}786 787static void snd_es1968_bob_start(struct es1968 *chip)788{789 int prescale;790 int divide;791 792 /* compute ideal interrupt frequency for buffer size & play rate */793 /* first, find best prescaler value to match freq */794 for (prescale = 5; prescale < 12; prescale++)795 if (chip->bob_freq > (ESS_SYSCLK >> (prescale + 9)))796 break;797 798 /* next, back off prescaler whilst getting divider into optimum range */799 divide = 1;800 while ((prescale > 5) && (divide < 32)) {801 prescale--;802 divide <<= 1;803 }804 divide >>= 1;805 806 /* now fine-tune the divider for best match */807 for (; divide < 31; divide++)808 if (chip->bob_freq >809 ((ESS_SYSCLK >> (prescale + 9)) / (divide + 1))) break;810 811 /* divide = 0 is illegal, but don't let prescale = 4! */812 if (divide == 0) {813 divide++;814 if (prescale > 5)815 prescale--;816 } else if (divide > 1)817 divide--;818 819 __maestro_write(chip, 6, 0x9000 | (prescale << 5) | divide); /* set reg */820 821 /* Now set IDR 11/17 */822 __maestro_write(chip, 0x11, __maestro_read(chip, 0x11) | 1);823 __maestro_write(chip, 0x17, __maestro_read(chip, 0x17) | 1);824}825 826/* call with substream spinlock */827static void snd_es1968_bob_inc(struct es1968 *chip, int freq)828{829 chip->bobclient++;830 if (chip->bobclient == 1) {831 chip->bob_freq = freq;832 snd_es1968_bob_start(chip);833 } else if (chip->bob_freq < freq) {834 snd_es1968_bob_stop(chip);835 chip->bob_freq = freq;836 snd_es1968_bob_start(chip);837 }838}839 840/* call with substream spinlock */841static void snd_es1968_bob_dec(struct es1968 *chip)842{843 chip->bobclient--;844 if (chip->bobclient <= 0)845 snd_es1968_bob_stop(chip);846 else if (chip->bob_freq > ESM_BOB_FREQ) {847 /* check reduction of timer frequency */848 int max_freq = ESM_BOB_FREQ;849 struct esschan *es;850 list_for_each_entry(es, &chip->substream_list, list) {851 if (max_freq < es->bob_freq)852 max_freq = es->bob_freq;853 }854 if (max_freq != chip->bob_freq) {855 snd_es1968_bob_stop(chip);856 chip->bob_freq = max_freq;857 snd_es1968_bob_start(chip);858 }859 }860}861 862static int863snd_es1968_calc_bob_rate(struct es1968 *chip, struct esschan *es,864 struct snd_pcm_runtime *runtime)865{866 /* we acquire 4 interrupts per period for precise control.. */867 int freq = runtime->rate * 4;868 if (es->fmt & ESS_FMT_STEREO)869 freq <<= 1;870 if (es->fmt & ESS_FMT_16BIT)871 freq <<= 1;872 freq /= es->frag_size;873 if (freq < ESM_BOB_FREQ)874 freq = ESM_BOB_FREQ;875 else if (freq > ESM_BOB_FREQ_MAX)876 freq = ESM_BOB_FREQ_MAX;877 return freq;878}879 880 881/*************882 * PCM Part *883 *************/884 885static u32 snd_es1968_compute_rate(struct es1968 *chip, u32 freq)886{887 u32 rate = (freq << 16) / chip->clock;888#if 0 /* XXX: do we need this? */ 889 if (rate > 0x10000)890 rate = 0x10000;891#endif892 return rate;893}894 895/* get current pointer */896static inline unsigned int897snd_es1968_get_dma_ptr(struct es1968 *chip, struct esschan *es)898{899 unsigned int offset;900 901 offset = apu_get_register(chip, es->apu[0], 5);902 903 offset -= es->base[0];904 905 return (offset & 0xFFFE); /* hardware is in words */906}907 908static void snd_es1968_apu_set_freq(struct es1968 *chip, int apu, int freq)909{910 apu_set_register(chip, apu, 2,911 (apu_get_register(chip, apu, 2) & 0x00FF) |912 ((freq & 0xff) << 8) | 0x10);913 apu_set_register(chip, apu, 3, freq >> 8);914}915 916/* spin lock held */917static inline void snd_es1968_trigger_apu(struct es1968 *esm, int apu, int mode)918{919 /* set the APU mode */920 __apu_set_register(esm, apu, 0,921 (__apu_get_register(esm, apu, 0) & 0xff0f) |922 (mode << 4));923}924 925static void snd_es1968_pcm_start(struct es1968 *chip, struct esschan *es)926{927 spin_lock(&chip->reg_lock);928 __apu_set_register(chip, es->apu[0], 5, es->base[0]);929 snd_es1968_trigger_apu(chip, es->apu[0], es->apu_mode[0]);930 if (es->mode == ESM_MODE_CAPTURE) {931 __apu_set_register(chip, es->apu[2], 5, es->base[2]);932 snd_es1968_trigger_apu(chip, es->apu[2], es->apu_mode[2]);933 }934 if (es->fmt & ESS_FMT_STEREO) {935 __apu_set_register(chip, es->apu[1], 5, es->base[1]);936 snd_es1968_trigger_apu(chip, es->apu[1], es->apu_mode[1]);937 if (es->mode == ESM_MODE_CAPTURE) {938 __apu_set_register(chip, es->apu[3], 5, es->base[3]);939 snd_es1968_trigger_apu(chip, es->apu[3], es->apu_mode[3]);940 }941 }942 spin_unlock(&chip->reg_lock);943}944 945static void snd_es1968_pcm_stop(struct es1968 *chip, struct esschan *es)946{947 spin_lock(&chip->reg_lock);948 snd_es1968_trigger_apu(chip, es->apu[0], 0);949 snd_es1968_trigger_apu(chip, es->apu[1], 0);950 if (es->mode == ESM_MODE_CAPTURE) {951 snd_es1968_trigger_apu(chip, es->apu[2], 0);952 snd_es1968_trigger_apu(chip, es->apu[3], 0);953 }954 spin_unlock(&chip->reg_lock);955}956 957/* set the wavecache control reg */958static void snd_es1968_program_wavecache(struct es1968 *chip, struct esschan *es,959 int channel, u32 addr, int capture)960{961 u32 tmpval = (addr - 0x10) & 0xFFF8;962 963 if (! capture) {964 if (!(es->fmt & ESS_FMT_16BIT))965 tmpval |= 4; /* 8bit */966 if (es->fmt & ESS_FMT_STEREO)967 tmpval |= 2; /* stereo */968 }969 970 /* set the wavecache control reg */971 wave_set_register(chip, es->apu[channel] << 3, tmpval);972 973 es->wc_map[channel] = tmpval;974}975 976 977static void snd_es1968_playback_setup(struct es1968 *chip, struct esschan *es,978 struct snd_pcm_runtime *runtime)979{980 u32 pa;981 int high_apu = 0;982 int channel, apu;983 int i, size;984 unsigned long flags;985 u32 freq;986 987 size = es->dma_size >> es->wav_shift;988 989 if (es->fmt & ESS_FMT_STEREO)990 high_apu++;991 992 for (channel = 0; channel <= high_apu; channel++) {993 apu = es->apu[channel];994 995 snd_es1968_program_wavecache(chip, es, channel, es->memory->buf.addr, 0);996 997 /* Offset to PCMBAR */998 pa = es->memory->buf.addr;999 pa -= chip->dma.addr;1000 pa >>= 1; /* words */1001 1002 pa |= 0x00400000; /* System RAM (Bit 22) */1003 1004 if (es->fmt & ESS_FMT_STEREO) {1005 /* Enable stereo */1006 if (channel)1007 pa |= 0x00800000; /* (Bit 23) */1008 if (es->fmt & ESS_FMT_16BIT)1009 pa >>= 1;1010 }1011 1012 /* base offset of dma calcs when reading the pointer1013 on this left one */1014 es->base[channel] = pa & 0xFFFF;1015 1016 for (i = 0; i < 16; i++)1017 apu_set_register(chip, apu, i, 0x0000);1018 1019 /* Load the buffer into the wave engine */1020 apu_set_register(chip, apu, 4, ((pa >> 16) & 0xFF) << 8);1021 apu_set_register(chip, apu, 5, pa & 0xFFFF);1022 apu_set_register(chip, apu, 6, (pa + size) & 0xFFFF);1023 /* setting loop == sample len */1024 apu_set_register(chip, apu, 7, size);1025 1026 /* clear effects/env.. */1027 apu_set_register(chip, apu, 8, 0x0000);1028 /* set amp now to 0xd0 (?), low byte is 'amplitude dest'? */1029 apu_set_register(chip, apu, 9, 0xD000);1030 1031 /* clear routing stuff */1032 apu_set_register(chip, apu, 11, 0x0000);1033 /* dma on, no envelopes, filter to all 1s) */1034 apu_set_register(chip, apu, 0, 0x400F);1035 1036 if (es->fmt & ESS_FMT_16BIT)1037 es->apu_mode[channel] = ESM_APU_16BITLINEAR;1038 else1039 es->apu_mode[channel] = ESM_APU_8BITLINEAR;1040 1041 if (es->fmt & ESS_FMT_STEREO) {1042 /* set panning: left or right */1043 /* Check: different panning. On my Canyon 3D Chipset the1044 Channels are swapped. I don't know, about the output1045 to the SPDif Link. Perhaps you have to change this1046 and not the APU Regs 4-5. */1047 apu_set_register(chip, apu, 10,1048 0x8F00 | (channel ? 0 : 0x10));1049 es->apu_mode[channel] += 1; /* stereo */1050 } else1051 apu_set_register(chip, apu, 10, 0x8F08);1052 }1053 1054 spin_lock_irqsave(&chip->reg_lock, flags);1055 /* clear WP interrupts */1056 outw(1, chip->io_port + 0x04);1057 /* enable WP ints */1058 outw(inw(chip->io_port + ESM_PORT_HOST_IRQ) | ESM_HIRQ_DSIE, chip->io_port + ESM_PORT_HOST_IRQ);1059 spin_unlock_irqrestore(&chip->reg_lock, flags);1060 1061 freq = runtime->rate;1062 /* set frequency */1063 if (freq > 48000)1064 freq = 48000;1065 if (freq < 4000)1066 freq = 4000;1067 1068 /* hmmm.. */1069 if (!(es->fmt & ESS_FMT_16BIT) && !(es->fmt & ESS_FMT_STEREO))1070 freq >>= 1;1071 1072 freq = snd_es1968_compute_rate(chip, freq);1073 1074 /* Load the frequency, turn on 6dB */1075 snd_es1968_apu_set_freq(chip, es->apu[0], freq);1076 snd_es1968_apu_set_freq(chip, es->apu[1], freq);1077}1078 1079 1080static void init_capture_apu(struct es1968 *chip, struct esschan *es, int channel,1081 unsigned int pa, unsigned int bsize,1082 int mode, int route)1083{1084 int i, apu = es->apu[channel];1085 1086 es->apu_mode[channel] = mode;1087 1088 /* set the wavecache control reg */1089 snd_es1968_program_wavecache(chip, es, channel, pa, 1);1090 1091 /* Offset to PCMBAR */1092 pa -= chip->dma.addr;1093 pa >>= 1; /* words */1094 1095 /* base offset of dma calcs when reading the pointer1096 on this left one */1097 es->base[channel] = pa & 0xFFFF;1098 pa |= 0x00400000; /* bit 22 -> System RAM */1099 1100 /* Begin loading the APU */1101 for (i = 0; i < 16; i++)1102 apu_set_register(chip, apu, i, 0x0000);1103 1104 /* need to enable subgroups.. and we should probably1105 have different groups for different /dev/dsps.. */1106 apu_set_register(chip, apu, 2, 0x8);1107 1108 /* Load the buffer into the wave engine */1109 apu_set_register(chip, apu, 4, ((pa >> 16) & 0xFF) << 8);1110 apu_set_register(chip, apu, 5, pa & 0xFFFF);1111 apu_set_register(chip, apu, 6, (pa + bsize) & 0xFFFF);1112 apu_set_register(chip, apu, 7, bsize);1113 /* clear effects/env.. */1114 apu_set_register(chip, apu, 8, 0x00F0);1115 /* amplitude now? sure. why not. */1116 apu_set_register(chip, apu, 9, 0x0000);1117 /* set filter tune, radius, polar pan */1118 apu_set_register(chip, apu, 10, 0x8F08);1119 /* route input */1120 apu_set_register(chip, apu, 11, route);1121 /* dma on, no envelopes, filter to all 1s) */1122 apu_set_register(chip, apu, 0, 0x400F);1123}1124 1125static void snd_es1968_capture_setup(struct es1968 *chip, struct esschan *es,1126 struct snd_pcm_runtime *runtime)1127{1128 int size;1129 u32 freq;1130 unsigned long flags;1131 1132 size = es->dma_size >> es->wav_shift;1133 1134 /* APU assignments:1135 0 = mono/left SRC1136 1 = right SRC1137 2 = mono/left Input Mixer1138 3 = right Input Mixer1139 */1140 /* data seems to flow from the codec, through an apu into1141 the 'mixbuf' bit of page, then through the SRC apu1142 and out to the real 'buffer'. ok. sure. */1143 1144 /* input mixer (left/mono) */1145 /* parallel in crap, see maestro reg 0xC [8-11] */1146 init_capture_apu(chip, es, 2,1147 es->mixbuf->buf.addr, ESM_MIXBUF_SIZE/4, /* in words */1148 ESM_APU_INPUTMIXER, 0x14);1149 /* SRC (left/mono); get input from inputing apu */1150 init_capture_apu(chip, es, 0, es->memory->buf.addr, size,1151 ESM_APU_SRCONVERTOR, es->apu[2]);1152 if (es->fmt & ESS_FMT_STEREO) {1153 /* input mixer (right) */1154 init_capture_apu(chip, es, 3,1155 es->mixbuf->buf.addr + ESM_MIXBUF_SIZE/2,1156 ESM_MIXBUF_SIZE/4, /* in words */1157 ESM_APU_INPUTMIXER, 0x15);1158 /* SRC (right) */1159 init_capture_apu(chip, es, 1,1160 es->memory->buf.addr + size*2, size,1161 ESM_APU_SRCONVERTOR, es->apu[3]);1162 }1163 1164 freq = runtime->rate;1165 /* Sample Rate conversion APUs don't like 0x10000 for their rate */1166 if (freq > 47999)1167 freq = 47999;1168 if (freq < 4000)1169 freq = 4000;1170 1171 freq = snd_es1968_compute_rate(chip, freq);1172 1173 /* Load the frequency, turn on 6dB */1174 snd_es1968_apu_set_freq(chip, es->apu[0], freq);1175 snd_es1968_apu_set_freq(chip, es->apu[1], freq);1176 1177 /* fix mixer rate at 48khz. and its _must_ be 0x10000. */1178 freq = 0x10000;1179 snd_es1968_apu_set_freq(chip, es->apu[2], freq);1180 snd_es1968_apu_set_freq(chip, es->apu[3], freq);1181 1182 spin_lock_irqsave(&chip->reg_lock, flags);1183 /* clear WP interrupts */1184 outw(1, chip->io_port + 0x04);1185 /* enable WP ints */1186 outw(inw(chip->io_port + ESM_PORT_HOST_IRQ) | ESM_HIRQ_DSIE, chip->io_port + ESM_PORT_HOST_IRQ);1187 spin_unlock_irqrestore(&chip->reg_lock, flags);1188}1189 1190/*******************1191 * ALSA Interface *1192 *******************/1193 1194static int snd_es1968_pcm_prepare(struct snd_pcm_substream *substream)1195{1196 struct es1968 *chip = snd_pcm_substream_chip(substream);1197 struct snd_pcm_runtime *runtime = substream->runtime;1198 struct esschan *es = runtime->private_data;1199 1200 es->dma_size = snd_pcm_lib_buffer_bytes(substream);1201 es->frag_size = snd_pcm_lib_period_bytes(substream);1202 1203 es->wav_shift = 1; /* maestro handles always 16bit */1204 es->fmt = 0;1205 if (snd_pcm_format_width(runtime->format) == 16)1206 es->fmt |= ESS_FMT_16BIT;1207 if (runtime->channels > 1) {1208 es->fmt |= ESS_FMT_STEREO;1209 if (es->fmt & ESS_FMT_16BIT) /* 8bit is already word shifted */1210 es->wav_shift++;1211 }1212 es->bob_freq = snd_es1968_calc_bob_rate(chip, es, runtime);1213 1214 switch (es->mode) {1215 case ESM_MODE_PLAY:1216 snd_es1968_playback_setup(chip, es, runtime);1217 break;1218 case ESM_MODE_CAPTURE:1219 snd_es1968_capture_setup(chip, es, runtime);1220 break;1221 }1222 1223 return 0;1224}1225 1226static int snd_es1968_pcm_trigger(struct snd_pcm_substream *substream, int cmd)1227{1228 struct es1968 *chip = snd_pcm_substream_chip(substream);1229 struct esschan *es = substream->runtime->private_data;1230 1231 spin_lock(&chip->substream_lock);1232 switch (cmd) {1233 case SNDRV_PCM_TRIGGER_START:1234 case SNDRV_PCM_TRIGGER_RESUME:1235 if (es->running)1236 break;1237 snd_es1968_bob_inc(chip, es->bob_freq);1238 es->count = 0;1239 es->hwptr = 0;1240 snd_es1968_pcm_start(chip, es);1241 es->running = 1;1242 break;1243 case SNDRV_PCM_TRIGGER_STOP:1244 case SNDRV_PCM_TRIGGER_SUSPEND:1245 if (! es->running)1246 break;1247 snd_es1968_pcm_stop(chip, es);1248 es->running = 0;1249 snd_es1968_bob_dec(chip);1250 break;1251 }1252 spin_unlock(&chip->substream_lock);1253 return 0;1254}1255 1256static snd_pcm_uframes_t snd_es1968_pcm_pointer(struct snd_pcm_substream *substream)1257{1258 struct es1968 *chip = snd_pcm_substream_chip(substream);1259 struct esschan *es = substream->runtime->private_data;1260 unsigned int ptr;1261 1262 ptr = snd_es1968_get_dma_ptr(chip, es) << es->wav_shift;1263 1264 return bytes_to_frames(substream->runtime, ptr % es->dma_size);1265}1266 1267static const struct snd_pcm_hardware snd_es1968_playback = {1268 .info = (SNDRV_PCM_INFO_MMAP |1269 SNDRV_PCM_INFO_MMAP_VALID |1270 SNDRV_PCM_INFO_INTERLEAVED |1271 SNDRV_PCM_INFO_BLOCK_TRANSFER |1272 /*SNDRV_PCM_INFO_PAUSE |*/1273 SNDRV_PCM_INFO_RESUME),1274 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,1275 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,1276 .rate_min = 4000,1277 .rate_max = 48000,1278 .channels_min = 1,1279 .channels_max = 2,1280 .buffer_bytes_max = 65536,1281 .period_bytes_min = 256,1282 .period_bytes_max = 65536,1283 .periods_min = 1,1284 .periods_max = 1024,1285 .fifo_size = 0,1286};1287 1288static const struct snd_pcm_hardware snd_es1968_capture = {1289 .info = (SNDRV_PCM_INFO_NONINTERLEAVED |1290 SNDRV_PCM_INFO_MMAP |1291 SNDRV_PCM_INFO_MMAP_VALID |1292 SNDRV_PCM_INFO_BLOCK_TRANSFER |1293 /*SNDRV_PCM_INFO_PAUSE |*/1294 SNDRV_PCM_INFO_RESUME),1295 .formats = /*SNDRV_PCM_FMTBIT_U8 |*/ SNDRV_PCM_FMTBIT_S16_LE,1296 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,1297 .rate_min = 4000,1298 .rate_max = 48000,1299 .channels_min = 1,1300 .channels_max = 2,1301 .buffer_bytes_max = 65536,1302 .period_bytes_min = 256,1303 .period_bytes_max = 65536,1304 .periods_min = 1,1305 .periods_max = 1024,1306 .fifo_size = 0,1307};1308 1309/* *************************1310 * DMA memory management *1311 *************************/1312 1313/* Because the Maestro can only take addresses relative to the PCM base address1314 register :( */1315 1316static int calc_available_memory_size(struct es1968 *chip)1317{1318 int max_size = 0;1319 struct esm_memory *buf;1320 1321 mutex_lock(&chip->memory_mutex);1322 list_for_each_entry(buf, &chip->buf_list, list) {1323 if (buf->empty && buf->buf.bytes > max_size)1324 max_size = buf->buf.bytes;1325 }1326 mutex_unlock(&chip->memory_mutex);1327 if (max_size >= 128*1024)1328 max_size = 127*1024;1329 return max_size;1330}1331 1332/* allocate a new memory chunk with the specified size */1333static struct esm_memory *snd_es1968_new_memory(struct es1968 *chip, int size)1334{1335 struct esm_memory *buf;1336 1337 size = ALIGN(size, ESM_MEM_ALIGN);1338 mutex_lock(&chip->memory_mutex);1339 list_for_each_entry(buf, &chip->buf_list, list) {1340 if (buf->empty && buf->buf.bytes >= size)1341 goto __found;1342 }1343 mutex_unlock(&chip->memory_mutex);1344 return NULL;1345 1346__found:1347 if (buf->buf.bytes > size) {1348 struct esm_memory *chunk = kmalloc(sizeof(*chunk), GFP_KERNEL);1349 if (chunk == NULL) {1350 mutex_unlock(&chip->memory_mutex);1351 return NULL;1352 }1353 chunk->buf = buf->buf;1354 chunk->buf.bytes -= size;1355 chunk->buf.area += size;1356 chunk->buf.addr += size;1357 chunk->empty = 1;1358 buf->buf.bytes = size;1359 list_add(&chunk->list, &buf->list);1360 }1361 buf->empty = 0;1362 mutex_unlock(&chip->memory_mutex);1363 return buf;1364}1365 1366/* free a memory chunk */1367static void snd_es1968_free_memory(struct es1968 *chip, struct esm_memory *buf)1368{1369 struct esm_memory *chunk;1370 1371 mutex_lock(&chip->memory_mutex);1372 buf->empty = 1;1373 if (buf->list.prev != &chip->buf_list) {1374 chunk = list_entry(buf->list.prev, struct esm_memory, list);1375 if (chunk->empty) {1376 chunk->buf.bytes += buf->buf.bytes;1377 list_del(&buf->list);1378 kfree(buf);1379 buf = chunk;1380 }1381 }1382 if (buf->list.next != &chip->buf_list) {1383 chunk = list_entry(buf->list.next, struct esm_memory, list);1384 if (chunk->empty) {1385 buf->buf.bytes += chunk->buf.bytes;1386 list_del(&chunk->list);1387 kfree(chunk);1388 }1389 }1390 mutex_unlock(&chip->memory_mutex);1391}1392 1393static void snd_es1968_free_dmabuf(struct es1968 *chip)1394{1395 struct list_head *p;1396 1397 if (! chip->dma.area)1398 return;1399 snd_dma_free_pages(&chip->dma);1400 while ((p = chip->buf_list.next) != &chip->buf_list) {1401 struct esm_memory *chunk = list_entry(p, struct esm_memory, list);1402 list_del(p);1403 kfree(chunk);1404 }1405}1406 1407static int1408snd_es1968_init_dmabuf(struct es1968 *chip)1409{1410 int err;1411 struct esm_memory *chunk;1412 1413 err = snd_dma_alloc_pages_fallback(SNDRV_DMA_TYPE_DEV,1414 &chip->pci->dev,1415 chip->total_bufsize, &chip->dma);1416 if (err < 0 || ! chip->dma.area) {1417 dev_err(chip->card->dev,1418 "can't allocate dma pages for size %d\n",1419 chip->total_bufsize);1420 return -ENOMEM;1421 }1422 if ((chip->dma.addr + chip->dma.bytes - 1) & ~((1 << 28) - 1)) {1423 snd_dma_free_pages(&chip->dma);1424 dev_err(chip->card->dev, "DMA buffer beyond 256MB.\n");1425 return -ENOMEM;1426 }1427 1428 INIT_LIST_HEAD(&chip->buf_list);1429 /* allocate an empty chunk */1430 chunk = kmalloc(sizeof(*chunk), GFP_KERNEL);1431 if (chunk == NULL) {1432 snd_es1968_free_dmabuf(chip);1433 return -ENOMEM;1434 }1435 memset(chip->dma.area, 0, ESM_MEM_ALIGN);1436 chunk->buf = chip->dma;1437 chunk->buf.area += ESM_MEM_ALIGN;1438 chunk->buf.addr += ESM_MEM_ALIGN;1439 chunk->buf.bytes -= ESM_MEM_ALIGN;1440 chunk->empty = 1;1441 list_add(&chunk->list, &chip->buf_list);1442 1443 return 0;1444}1445 1446/* setup the dma_areas */1447/* buffer is extracted from the pre-allocated memory chunk */1448static int snd_es1968_hw_params(struct snd_pcm_substream *substream,1449 struct snd_pcm_hw_params *hw_params)1450{1451 struct es1968 *chip = snd_pcm_substream_chip(substream);1452 struct snd_pcm_runtime *runtime = substream->runtime;1453 struct esschan *chan = runtime->private_data;1454 int size = params_buffer_bytes(hw_params);1455 1456 if (chan->memory) {1457 if (chan->memory->buf.bytes >= size) {1458 runtime->dma_bytes = size;1459 return 0;1460 }1461 snd_es1968_free_memory(chip, chan->memory);1462 }1463 chan->memory = snd_es1968_new_memory(chip, size);1464 if (chan->memory == NULL) {1465 dev_dbg(chip->card->dev,1466 "cannot allocate dma buffer: size = %d\n", size);1467 return -ENOMEM;1468 }1469 snd_pcm_set_runtime_buffer(substream, &chan->memory->buf);1470 return 1; /* area was changed */1471}1472 1473/* remove dma areas if allocated */1474static int snd_es1968_hw_free(struct snd_pcm_substream *substream)1475{1476 struct es1968 *chip = snd_pcm_substream_chip(substream);1477 struct snd_pcm_runtime *runtime = substream->runtime;1478 struct esschan *chan;1479 1480 if (runtime->private_data == NULL)1481 return 0;1482 chan = runtime->private_data;1483 if (chan->memory) {1484 snd_es1968_free_memory(chip, chan->memory);1485 chan->memory = NULL;1486 }1487 return 0;1488}1489 1490 1491/*1492 * allocate APU pair1493 */1494static int snd_es1968_alloc_apu_pair(struct es1968 *chip, int type)1495{1496 int apu;1497 1498 for (apu = 0; apu < NR_APUS; apu += 2) {1499 if (chip->apu[apu] == ESM_APU_FREE &&1500 chip->apu[apu + 1] == ESM_APU_FREE) {1501 chip->apu[apu] = chip->apu[apu + 1] = type;1502 return apu;1503 }1504 }1505 return -EBUSY;1506}1507 1508/*1509 * release APU pair1510 */1511static void snd_es1968_free_apu_pair(struct es1968 *chip, int apu)1512{1513 chip->apu[apu] = chip->apu[apu + 1] = ESM_APU_FREE;1514}1515 1516 1517/******************1518 * PCM open/close *1519 ******************/1520 1521static int snd_es1968_playback_open(struct snd_pcm_substream *substream)1522{1523 struct es1968 *chip = snd_pcm_substream_chip(substream);1524 struct snd_pcm_runtime *runtime = substream->runtime;1525 struct esschan *es;1526 int apu1;1527 1528 /* search 2 APUs */1529 apu1 = snd_es1968_alloc_apu_pair(chip, ESM_APU_PCM_PLAY);1530 if (apu1 < 0)1531 return apu1;1532 1533 es = kzalloc(sizeof(*es), GFP_KERNEL);1534 if (!es) {1535 snd_es1968_free_apu_pair(chip, apu1);1536 return -ENOMEM;1537 }1538 1539 es->apu[0] = apu1;1540 es->apu[1] = apu1 + 1;1541 es->apu_mode[0] = 0;1542 es->apu_mode[1] = 0;1543 es->running = 0;1544 es->substream = substream;1545 es->mode = ESM_MODE_PLAY;1546 1547 runtime->private_data = es;1548 runtime->hw = snd_es1968_playback;1549 runtime->hw.buffer_bytes_max = runtime->hw.period_bytes_max =1550 calc_available_memory_size(chip);1551 1552 spin_lock_irq(&chip->substream_lock);1553 list_add(&es->list, &chip->substream_list);1554 spin_unlock_irq(&chip->substream_lock);1555 1556 return 0;1557}1558 1559static int snd_es1968_capture_open(struct snd_pcm_substream *substream)1560{1561 struct snd_pcm_runtime *runtime = substream->runtime;1562 struct es1968 *chip = snd_pcm_substream_chip(substream);1563 struct esschan *es;1564 int apu1, apu2;1565 1566 apu1 = snd_es1968_alloc_apu_pair(chip, ESM_APU_PCM_CAPTURE);1567 if (apu1 < 0)1568 return apu1;1569 apu2 = snd_es1968_alloc_apu_pair(chip, ESM_APU_PCM_RATECONV);1570 if (apu2 < 0) {1571 snd_es1968_free_apu_pair(chip, apu1);1572 return apu2;1573 }1574 1575 es = kzalloc(sizeof(*es), GFP_KERNEL);1576 if (!es) {1577 snd_es1968_free_apu_pair(chip, apu1);1578 snd_es1968_free_apu_pair(chip, apu2);1579 return -ENOMEM;1580 }1581 1582 es->apu[0] = apu1;1583 es->apu[1] = apu1 + 1;1584 es->apu[2] = apu2;1585 es->apu[3] = apu2 + 1;1586 es->apu_mode[0] = 0;1587 es->apu_mode[1] = 0;1588 es->apu_mode[2] = 0;1589 es->apu_mode[3] = 0;1590 es->running = 0;1591 es->substream = substream;1592 es->mode = ESM_MODE_CAPTURE;1593 1594 /* get mixbuffer */1595 es->mixbuf = snd_es1968_new_memory(chip, ESM_MIXBUF_SIZE);1596 if (!es->mixbuf) {1597 snd_es1968_free_apu_pair(chip, apu1);1598 snd_es1968_free_apu_pair(chip, apu2);1599 kfree(es);1600 return -ENOMEM;1601 }1602 memset(es->mixbuf->buf.area, 0, ESM_MIXBUF_SIZE);1603 1604 runtime->private_data = es;1605 runtime->hw = snd_es1968_capture;1606 runtime->hw.buffer_bytes_max = runtime->hw.period_bytes_max =1607 calc_available_memory_size(chip) - 1024; /* keep MIXBUF size */1608 snd_pcm_hw_constraint_pow2(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES);1609 1610 spin_lock_irq(&chip->substream_lock);1611 list_add(&es->list, &chip->substream_list);1612 spin_unlock_irq(&chip->substream_lock);1613 1614 return 0;1615}1616 1617static int snd_es1968_playback_close(struct snd_pcm_substream *substream)1618{1619 struct es1968 *chip = snd_pcm_substream_chip(substream);1620 struct esschan *es;1621 1622 if (substream->runtime->private_data == NULL)1623 return 0;1624 es = substream->runtime->private_data;1625 spin_lock_irq(&chip->substream_lock);1626 list_del(&es->list);1627 spin_unlock_irq(&chip->substream_lock);1628 snd_es1968_free_apu_pair(chip, es->apu[0]);1629 kfree(es);1630 1631 return 0;1632}1633 1634static int snd_es1968_capture_close(struct snd_pcm_substream *substream)1635{1636 struct es1968 *chip = snd_pcm_substream_chip(substream);1637 struct esschan *es;1638 1639 if (substream->runtime->private_data == NULL)1640 return 0;1641 es = substream->runtime->private_data;1642 spin_lock_irq(&chip->substream_lock);1643 list_del(&es->list);1644 spin_unlock_irq(&chip->substream_lock);1645 snd_es1968_free_memory(chip, es->mixbuf);1646 snd_es1968_free_apu_pair(chip, es->apu[0]);1647 snd_es1968_free_apu_pair(chip, es->apu[2]);1648 kfree(es);1649 1650 return 0;1651}1652 1653static const struct snd_pcm_ops snd_es1968_playback_ops = {1654 .open = snd_es1968_playback_open,1655 .close = snd_es1968_playback_close,1656 .hw_params = snd_es1968_hw_params,1657 .hw_free = snd_es1968_hw_free,1658 .prepare = snd_es1968_pcm_prepare,1659 .trigger = snd_es1968_pcm_trigger,1660 .pointer = snd_es1968_pcm_pointer,1661};1662 1663static const struct snd_pcm_ops snd_es1968_capture_ops = {1664 .open = snd_es1968_capture_open,1665 .close = snd_es1968_capture_close,1666 .hw_params = snd_es1968_hw_params,1667 .hw_free = snd_es1968_hw_free,1668 .prepare = snd_es1968_pcm_prepare,1669 .trigger = snd_es1968_pcm_trigger,1670 .pointer = snd_es1968_pcm_pointer,1671};1672 1673 1674/*1675 * measure clock1676 */1677#define CLOCK_MEASURE_BUFSIZE 16768 /* enough large for a single shot */1678 1679static void es1968_measure_clock(struct es1968 *chip)1680{1681 int i, apu;1682 unsigned int pa, offset, t;1683 struct esm_memory *memory;1684 ktime_t start_time, stop_time;1685 ktime_t diff;1686 1687 if (chip->clock == 0)1688 chip->clock = 48000; /* default clock value */1689 1690 /* search 2 APUs (although one apu is enough) */1691 apu = snd_es1968_alloc_apu_pair(chip, ESM_APU_PCM_PLAY);1692 if (apu < 0) {1693 dev_err(chip->card->dev, "Hmm, cannot find empty APU pair!?\n");1694 return;1695 }1696 memory = snd_es1968_new_memory(chip, CLOCK_MEASURE_BUFSIZE);1697 if (!memory) {1698 dev_warn(chip->card->dev,1699 "cannot allocate dma buffer - using default clock %d\n",1700 chip->clock);1701 snd_es1968_free_apu_pair(chip, apu);1702 return;1703 }1704 1705 memset(memory->buf.area, 0, CLOCK_MEASURE_BUFSIZE);1706 1707 wave_set_register(chip, apu << 3, (memory->buf.addr - 0x10) & 0xfff8);1708 1709 pa = (unsigned int)((memory->buf.addr - chip->dma.addr) >> 1);1710 pa |= 0x00400000; /* System RAM (Bit 22) */1711 1712 /* initialize apu */1713 for (i = 0; i < 16; i++)1714 apu_set_register(chip, apu, i, 0x0000);1715 1716 apu_set_register(chip, apu, 0, 0x400f);1717 apu_set_register(chip, apu, 4, ((pa >> 16) & 0xff) << 8);1718 apu_set_register(chip, apu, 5, pa & 0xffff);1719 apu_set_register(chip, apu, 6, (pa + CLOCK_MEASURE_BUFSIZE/2) & 0xffff);1720 apu_set_register(chip, apu, 7, CLOCK_MEASURE_BUFSIZE/2);1721 apu_set_register(chip, apu, 8, 0x0000);1722 apu_set_register(chip, apu, 9, 0xD000);1723 apu_set_register(chip, apu, 10, 0x8F08);1724 apu_set_register(chip, apu, 11, 0x0000);1725 spin_lock_irq(&chip->reg_lock);1726 outw(1, chip->io_port + 0x04); /* clear WP interrupts */1727 outw(inw(chip->io_port + ESM_PORT_HOST_IRQ) | ESM_HIRQ_DSIE, chip->io_port + ESM_PORT_HOST_IRQ); /* enable WP ints */1728 spin_unlock_irq(&chip->reg_lock);1729 1730 snd_es1968_apu_set_freq(chip, apu, ((unsigned int)48000 << 16) / chip->clock); /* 48000 Hz */1731 1732 chip->in_measurement = 1;1733 chip->measure_apu = apu;1734 spin_lock_irq(&chip->reg_lock);1735 snd_es1968_bob_inc(chip, ESM_BOB_FREQ);1736 __apu_set_register(chip, apu, 5, pa & 0xffff);1737 snd_es1968_trigger_apu(chip, apu, ESM_APU_16BITLINEAR);1738 start_time = ktime_get();1739 spin_unlock_irq(&chip->reg_lock);1740 msleep(50);1741 spin_lock_irq(&chip->reg_lock);1742 offset = __apu_get_register(chip, apu, 5);1743 stop_time = ktime_get();1744 snd_es1968_trigger_apu(chip, apu, 0); /* stop */1745 snd_es1968_bob_dec(chip);1746 chip->in_measurement = 0;1747 spin_unlock_irq(&chip->reg_lock);1748 1749 /* check the current position */1750 offset -= (pa & 0xffff);1751 offset &= 0xfffe;1752 offset += chip->measure_count * (CLOCK_MEASURE_BUFSIZE/2);1753 1754 diff = ktime_sub(stop_time, start_time);1755 t = ktime_to_us(diff);1756 if (t == 0) {1757 dev_err(chip->card->dev, "?? calculation error..\n");1758 } else {1759 offset *= 1000;1760 offset = (offset / t) * 1000 + ((offset % t) * 1000) / t;1761 if (offset < 47500 || offset > 48500) {1762 if (offset >= 40000 && offset <= 50000)1763 chip->clock = (chip->clock * offset) / 48000;1764 }1765 dev_info(chip->card->dev, "clocking to %d\n", chip->clock);1766 }1767 snd_es1968_free_memory(chip, memory);1768 snd_es1968_free_apu_pair(chip, apu);1769}1770 1771 1772/*1773 */1774 1775static void snd_es1968_pcm_free(struct snd_pcm *pcm)1776{1777 struct es1968 *esm = pcm->private_data;1778 snd_es1968_free_dmabuf(esm);1779 esm->pcm = NULL;1780}1781 1782static int1783snd_es1968_pcm(struct es1968 *chip, int device)1784{1785 struct snd_pcm *pcm;1786 int err;1787 1788 /* get DMA buffer */1789 err = snd_es1968_init_dmabuf(chip);1790 if (err < 0)1791 return err;1792 1793 /* set PCMBAR */1794 wave_set_register(chip, 0x01FC, chip->dma.addr >> 12);1795 wave_set_register(chip, 0x01FD, chip->dma.addr >> 12);1796 wave_set_register(chip, 0x01FE, chip->dma.addr >> 12);1797 wave_set_register(chip, 0x01FF, chip->dma.addr >> 12);1798 1799 err = snd_pcm_new(chip->card, "ESS Maestro", device,1800 chip->playback_streams,1801 chip->capture_streams, &pcm);1802 if (err < 0)1803 return err;1804 1805 pcm->private_data = chip;1806 pcm->private_free = snd_es1968_pcm_free;1807 1808 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_es1968_playback_ops);1809 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_es1968_capture_ops);1810 1811 pcm->info_flags = 0;1812 1813 strcpy(pcm->name, "ESS Maestro");1814 1815 chip->pcm = pcm;1816 1817 return 0;1818}1819/*1820 * suppress jitter on some maestros when playing stereo1821 */1822static void snd_es1968_suppress_jitter(struct es1968 *chip, struct esschan *es)1823{1824 unsigned int cp1;1825 unsigned int cp2;1826 unsigned int diff;1827 1828 cp1 = __apu_get_register(chip, 0, 5);1829 cp2 = __apu_get_register(chip, 1, 5);1830 diff = (cp1 > cp2 ? cp1 - cp2 : cp2 - cp1);1831 1832 if (diff > 1)1833 __maestro_write(chip, IDR0_DATA_PORT, cp1);1834}1835 1836/*1837 * update pointer1838 */1839static void snd_es1968_update_pcm(struct es1968 *chip, struct esschan *es)1840{1841 unsigned int hwptr;1842 unsigned int diff;1843 struct snd_pcm_substream *subs = es->substream;1844 1845 if (subs == NULL || !es->running)1846 return;1847 1848 hwptr = snd_es1968_get_dma_ptr(chip, es) << es->wav_shift;1849 hwptr %= es->dma_size;1850 1851 diff = (es->dma_size + hwptr - es->hwptr) % es->dma_size;1852 1853 es->hwptr = hwptr;1854 es->count += diff;1855 1856 if (es->count > es->frag_size) {1857 spin_unlock(&chip->substream_lock);1858 snd_pcm_period_elapsed(subs);1859 spin_lock(&chip->substream_lock);1860 es->count %= es->frag_size;1861 }1862}1863 1864/* The hardware volume works by incrementing / decrementing 2 counters1865 (without wrap around) in response to volume button presses and then1866 generating an interrupt. The pair of counters is stored in bits 1-3 and 5-71867 of a byte wide register. The meaning of bits 0 and 4 is unknown. */1868static void es1968_update_hw_volume(struct work_struct *work)1869{1870 struct es1968 *chip = container_of(work, struct es1968, hwvol_work);1871 int x, val;1872 1873 /* Figure out which volume control button was pushed,1874 based on differences from the default register1875 values. */1876 x = inb(chip->io_port + 0x1c) & 0xee;1877 /* Reset the volume control registers. */1878 outb(0x88, chip->io_port + 0x1c);1879 outb(0x88, chip->io_port + 0x1d);1880 outb(0x88, chip->io_port + 0x1e);1881 outb(0x88, chip->io_port + 0x1f);1882 1883 if (chip->in_suspend)1884 return;1885 1886#ifndef CONFIG_SND_ES1968_INPUT1887 if (! chip->master_switch || ! chip->master_volume)1888 return;1889 1890 val = snd_ac97_read(chip->ac97, AC97_MASTER);1891 switch (x) {1892 case 0x88:1893 /* mute */1894 val ^= 0x8000;1895 break;1896 case 0xaa:1897 /* volume up */1898 if ((val & 0x7f) > 0)1899 val--;1900 if ((val & 0x7f00) > 0)1901 val -= 0x0100;1902 break;1903 case 0x66:1904 /* volume down */1905 if ((val & 0x7f) < 0x1f)1906 val++;1907 if ((val & 0x7f00) < 0x1f00)1908 val += 0x0100;1909 break;1910 }1911 if (snd_ac97_update(chip->ac97, AC97_MASTER, val))1912 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE,1913 &chip->master_volume->id);1914#else1915 if (!chip->input_dev)1916 return;1917 1918 val = 0;1919 switch (x) {1920 case 0x88:1921 /* The counters have not changed, yet we've received a HV1922 interrupt. According to tests run by various people this1923 happens when pressing the mute button. */1924 val = KEY_MUTE;1925 break;1926 case 0xaa:1927 /* counters increased by 1 -> volume up */1928 val = KEY_VOLUMEUP;1929 break;1930 case 0x66:1931 /* counters decreased by 1 -> volume down */1932 val = KEY_VOLUMEDOWN;1933 break;1934 }1935 1936 if (val) {1937 input_report_key(chip->input_dev, val, 1);1938 input_sync(chip->input_dev);1939 input_report_key(chip->input_dev, val, 0);1940 input_sync(chip->input_dev);1941 }1942#endif1943}1944 1945/*1946 * interrupt handler1947 */1948static irqreturn_t snd_es1968_interrupt(int irq, void *dev_id)1949{1950 struct es1968 *chip = dev_id;1951 u32 event;1952 1953 event = inb(chip->io_port + 0x1A);1954 if (!event)1955 return IRQ_NONE;1956 1957 outw(inw(chip->io_port + 4) & 1, chip->io_port + 4);1958 1959 if (event & ESM_HWVOL_IRQ)1960 schedule_work(&chip->hwvol_work);1961 1962 /* else ack 'em all, i imagine */1963 outb(0xFF, chip->io_port + 0x1A);1964 1965 if ((event & ESM_MPU401_IRQ) && chip->rmidi) {1966 snd_mpu401_uart_interrupt(irq, chip->rmidi->private_data);1967 }1968 1969 if (event & ESM_SOUND_IRQ) {1970 struct esschan *es;1971 spin_lock(&chip->substream_lock);1972 list_for_each_entry(es, &chip->substream_list, list) {1973 if (es->running) {1974 snd_es1968_update_pcm(chip, es);1975 if (es->fmt & ESS_FMT_STEREO)1976 snd_es1968_suppress_jitter(chip, es);1977 }1978 }1979 spin_unlock(&chip->substream_lock);1980 if (chip->in_measurement) {1981 unsigned int curp = __apu_get_register(chip, chip->measure_apu, 5);1982 if (curp < chip->measure_lastpos)1983 chip->measure_count++;1984 chip->measure_lastpos = curp;1985 }1986 }1987 1988 return IRQ_HANDLED;1989}1990 1991/*1992 * Mixer stuff1993 */1994 1995static int1996snd_es1968_mixer(struct es1968 *chip)1997{1998 struct snd_ac97_bus *pbus;1999 struct snd_ac97_template ac97;2000 int err;2001 static const struct snd_ac97_bus_ops ops = {2002 .write = snd_es1968_ac97_write,2003 .read = snd_es1968_ac97_read,2004 };2005 2006 err = snd_ac97_bus(chip->card, 0, &ops, NULL, &pbus);2007 if (err < 0)2008 return err;2009 pbus->no_vra = 1; /* ES1968 doesn't need VRA */2010 2011 memset(&ac97, 0, sizeof(ac97));2012 ac97.private_data = chip;2013 err = snd_ac97_mixer(pbus, &ac97, &chip->ac97);2014 if (err < 0)2015 return err;2016 2017#ifndef CONFIG_SND_ES1968_INPUT2018 /* attach master switch / volumes for h/w volume control */2019 chip->master_switch = snd_ctl_find_id_mixer(chip->card,2020 "Master Playback Switch");2021 chip->master_volume = snd_ctl_find_id_mixer(chip->card,2022 "Master Playback Volume");2023#endif2024 2025 return 0;2026}2027 2028/*2029 * reset ac97 codec2030 */2031 2032static void snd_es1968_ac97_reset(struct es1968 *chip)2033{2034 unsigned long ioaddr = chip->io_port;2035 2036 unsigned short save_ringbus_a;2037 unsigned short save_68;2038 unsigned short w;2039 unsigned int vend;2040 2041 /* save configuration */2042 save_ringbus_a = inw(ioaddr + 0x36);2043 2044 //outw(inw(ioaddr + 0x38) & 0xfffc, ioaddr + 0x38); /* clear second codec id? */2045 /* set command/status address i/o to 1st codec */2046 outw(inw(ioaddr + 0x3a) & 0xfffc, ioaddr + 0x3a);2047 outw(inw(ioaddr + 0x3c) & 0xfffc, ioaddr + 0x3c);2048 2049 /* disable ac link */2050 outw(0x0000, ioaddr + 0x36);2051 save_68 = inw(ioaddr + 0x68);2052 pci_read_config_word(chip->pci, 0x58, &w); /* something magical with gpio and bus arb. */2053 pci_read_config_dword(chip->pci, PCI_SUBSYSTEM_VENDOR_ID, &vend);2054 if (w & 1)2055 save_68 |= 0x10;2056 outw(0xfffe, ioaddr + 0x64); /* unmask gpio 0 */2057 outw(0x0001, ioaddr + 0x68); /* gpio write */2058 outw(0x0000, ioaddr + 0x60); /* write 0 to gpio 0 */2059 udelay(20);2060 outw(0x0001, ioaddr + 0x60); /* write 1 to gpio 1 */2061 msleep(20);2062 2063 outw(save_68 | 0x1, ioaddr + 0x68); /* now restore .. */2064 outw((inw(ioaddr + 0x38) & 0xfffc) | 0x1, ioaddr + 0x38);2065 outw((inw(ioaddr + 0x3a) & 0xfffc) | 0x1, ioaddr + 0x3a);2066 outw((inw(ioaddr + 0x3c) & 0xfffc) | 0x1, ioaddr + 0x3c);2067 2068 /* now the second codec */2069 /* disable ac link */2070 outw(0x0000, ioaddr + 0x36);2071 outw(0xfff7, ioaddr + 0x64); /* unmask gpio 3 */2072 save_68 = inw(ioaddr + 0x68);2073 outw(0x0009, ioaddr + 0x68); /* gpio write 0 & 3 ?? */2074 outw(0x0001, ioaddr + 0x60); /* write 1 to gpio */2075 udelay(20);2076 outw(0x0009, ioaddr + 0x60); /* write 9 to gpio */2077 msleep(500);2078 //outw(inw(ioaddr + 0x38) & 0xfffc, ioaddr + 0x38);2079 outw(inw(ioaddr + 0x3a) & 0xfffc, ioaddr + 0x3a);2080 outw(inw(ioaddr + 0x3c) & 0xfffc, ioaddr + 0x3c);2081 2082#if 0 /* the loop here needs to be much better if we want it.. */2083 dev_info(chip->card->dev, "trying software reset\n");2084 /* try and do a software reset */2085 outb(0x80 | 0x7c, ioaddr + 0x30);2086 for (w = 0;; w++) {2087 if ((inw(ioaddr + 0x30) & 1) == 0) {2088 if (inb(ioaddr + 0x32) != 0)2089 break;2090 2091 outb(0x80 | 0x7d, ioaddr + 0x30);2092 if (((inw(ioaddr + 0x30) & 1) == 0)2093 && (inb(ioaddr + 0x32) != 0))2094 break;2095 outb(0x80 | 0x7f, ioaddr + 0x30);2096 if (((inw(ioaddr + 0x30) & 1) == 0)2097 && (inb(ioaddr + 0x32) != 0))2098 break;2099 }2100 2101 if (w > 10000) {2102 outb(inb(ioaddr + 0x37) | 0x08, ioaddr + 0x37); /* do a software reset */2103 msleep(500); /* oh my.. */2104 outb(inb(ioaddr + 0x37) & ~0x08,2105 ioaddr + 0x37);2106 udelay(1);2107 outw(0x80, ioaddr + 0x30);2108 for (w = 0; w < 10000; w++) {2109 if ((inw(ioaddr + 0x30) & 1) == 0)2110 break;2111 }2112 }2113 }2114#endif2115 if (vend == NEC_VERSA_SUBID1 || vend == NEC_VERSA_SUBID2) {2116 /* turn on external amp? */2117 outw(0xf9ff, ioaddr + 0x64);2118 outw(inw(ioaddr + 0x68) | 0x600, ioaddr + 0x68);2119 outw(0x0209, ioaddr + 0x60);2120 }2121 2122 /* restore.. */2123 outw(save_ringbus_a, ioaddr + 0x36);2124 2125 /* Turn on the 978 docking chip.2126 First frob the "master output enable" bit,2127 then set most of the playback volume control registers to max. */2128 outb(inb(ioaddr+0xc0)|(1<<5), ioaddr+0xc0);2129 outb(0xff, ioaddr+0xc3);2130 outb(0xff, ioaddr+0xc4);2131 outb(0xff, ioaddr+0xc6);2132 outb(0xff, ioaddr+0xc8);2133 outb(0x3f, ioaddr+0xcf);2134 outb(0x3f, ioaddr+0xd0);2135}2136 2137static void snd_es1968_reset(struct es1968 *chip)2138{2139 /* Reset */2140 outw(ESM_RESET_MAESTRO | ESM_RESET_DIRECTSOUND,2141 chip->io_port + ESM_PORT_HOST_IRQ);2142 udelay(10);2143 outw(0x0000, chip->io_port + ESM_PORT_HOST_IRQ);2144 udelay(10);2145}2146 2147/*2148 * initialize maestro chip2149 */2150static void snd_es1968_chip_init(struct es1968 *chip)2151{2152 struct pci_dev *pci = chip->pci;2153 int i;2154 unsigned long iobase = chip->io_port;2155 u16 w;2156 u32 n;2157 2158 /* We used to muck around with pci config space that2159 * we had no business messing with. We don't know enough2160 * about the machine to know which DMA mode is appropriate, 2161 * etc. We were guessing wrong on some machines and making2162 * them unhappy. We now trust in the BIOS to do things right,2163 * which almost certainly means a new host of problems will2164 * arise with broken BIOS implementations. screw 'em. 2165 * We're already intolerant of machines that don't assign2166 * IRQs.2167 */2168 2169 /* Config Reg A */2170 pci_read_config_word(pci, ESM_CONFIG_A, &w);2171 2172 w &= ~DMA_CLEAR; /* Clear DMA bits */2173 w &= ~(PIC_SNOOP1 | PIC_SNOOP2); /* Clear Pic Snoop Mode Bits */2174 w &= ~SAFEGUARD; /* Safeguard off */2175 w |= POST_WRITE; /* Posted write */2176 w |= PCI_TIMING; /* PCI timing on */2177 /* XXX huh? claims to be reserved.. */2178 w &= ~SWAP_LR; /* swap left/right 2179 seems to only have effect on SB2180 Emulation */2181 w &= ~SUBTR_DECODE; /* Subtractive decode off */2182 2183 pci_write_config_word(pci, ESM_CONFIG_A, w);2184 2185 /* Config Reg B */2186 2187 pci_read_config_word(pci, ESM_CONFIG_B, &w);2188 2189 w &= ~(1 << 15); /* Turn off internal clock multiplier */2190 /* XXX how do we know which to use? */2191 w &= ~(1 << 14); /* External clock */2192 2193 w &= ~SPDIF_CONFB; /* disable S/PDIF output */2194 w |= HWV_CONFB; /* HWV on */2195 w |= DEBOUNCE; /* Debounce off: easier to push the HW buttons */2196 w &= ~GPIO_CONFB; /* GPIO 4:5 */2197 w |= CHI_CONFB; /* Disconnect from the CHI. Enabling this made a dell 7500 work. */2198 w &= ~IDMA_CONFB; /* IDMA off (undocumented) */2199 w &= ~MIDI_FIX; /* MIDI fix off (undoc) */2200 w &= ~(1 << 1); /* reserved, always write 0 */2201 w &= ~IRQ_TO_ISA; /* IRQ to ISA off (undoc) */2202 2203 pci_write_config_word(pci, ESM_CONFIG_B, w);2204 2205 /* DDMA off */2206 2207 pci_read_config_word(pci, ESM_DDMA, &w);2208 w &= ~(1 << 0);2209 pci_write_config_word(pci, ESM_DDMA, w);2210 2211 /*2212 * Legacy mode2213 */2214 2215 pci_read_config_word(pci, ESM_LEGACY_AUDIO_CONTROL, &w);2216 2217 w |= ESS_DISABLE_AUDIO; /* Disable Legacy Audio */2218 w &= ~ESS_ENABLE_SERIAL_IRQ; /* Disable SIRQ */2219 w &= ~(0x1f); /* disable mpu irq/io, game port, fm, SB */2220 2221 pci_write_config_word(pci, ESM_LEGACY_AUDIO_CONTROL, w);2222 2223 /* Set up 978 docking control chip. */2224 pci_read_config_word(pci, 0x58, &w);2225 w|=1<<2; /* Enable 978. */2226 w|=1<<3; /* Turn on 978 hardware volume control. */2227 w&=~(1<<11); /* Turn on 978 mixer volume control. */2228 pci_write_config_word(pci, 0x58, w);2229 2230 /* Sound Reset */2231 2232 snd_es1968_reset(chip);2233 2234 /*2235 * Ring Bus Setup2236 */2237 2238 /* setup usual 0x34 stuff.. 0x36 may be chip specific */2239 outw(0xC090, iobase + ESM_RING_BUS_DEST); /* direct sound, stereo */2240 udelay(20);2241 outw(0x3000, iobase + ESM_RING_BUS_CONTR_A); /* enable ringbus/serial */2242 udelay(20);2243 2244 /*2245 * Reset the CODEC2246 */2247 2248 snd_es1968_ac97_reset(chip);2249 2250 /* Ring Bus Control B */2251 2252 n = inl(iobase + ESM_RING_BUS_CONTR_B);2253 n &= ~RINGB_EN_SPDIF; /* SPDIF off */2254 //w |= RINGB_EN_2CODEC; /* enable 2nd codec */2255 outl(n, iobase + ESM_RING_BUS_CONTR_B);2256 2257 /* Set hardware volume control registers to midpoints.2258 We can tell which button was pushed based on how they change. */2259 outb(0x88, iobase+0x1c);2260 outb(0x88, iobase+0x1d);2261 outb(0x88, iobase+0x1e);2262 outb(0x88, iobase+0x1f);2263 2264 /* it appears some maestros (dell 7500) only work if these are set,2265 regardless of whether we use the assp or not. */2266 2267 outb(0, iobase + ASSP_CONTROL_B);2268 outb(3, iobase + ASSP_CONTROL_A); /* M: Reserved bits... */2269 outb(0, iobase + ASSP_CONTROL_C); /* M: Disable ASSP, ASSP IRQ's and FM Port */2270 2271 /*2272 * set up wavecache2273 */2274 for (i = 0; i < 16; i++) {2275 /* Write 0 into the buffer area 0x1E0->1EF */2276 outw(0x01E0 + i, iobase + WC_INDEX);2277 outw(0x0000, iobase + WC_DATA);2278 2279 /* The 1.10 test program seem to write 0 into the buffer area2280 * 0x1D0-0x1DF too.*/2281 outw(0x01D0 + i, iobase + WC_INDEX);2282 outw(0x0000, iobase + WC_DATA);2283 }2284 wave_set_register(chip, IDR7_WAVE_ROMRAM,2285 (wave_get_register(chip, IDR7_WAVE_ROMRAM) & 0xFF00));2286 wave_set_register(chip, IDR7_WAVE_ROMRAM,2287 wave_get_register(chip, IDR7_WAVE_ROMRAM) | 0x100);2288 wave_set_register(chip, IDR7_WAVE_ROMRAM,2289 wave_get_register(chip, IDR7_WAVE_ROMRAM) & ~0x200);2290 wave_set_register(chip, IDR7_WAVE_ROMRAM,2291 wave_get_register(chip, IDR7_WAVE_ROMRAM) | ~0x400);2292 2293 2294 maestro_write(chip, IDR2_CRAM_DATA, 0x0000);2295 /* Now back to the DirectSound stuff */2296 /* audio serial configuration.. ? */2297 maestro_write(chip, 0x08, 0xB004);2298 maestro_write(chip, 0x09, 0x001B);2299 maestro_write(chip, 0x0A, 0x8000);2300 maestro_write(chip, 0x0B, 0x3F37);2301 maestro_write(chip, 0x0C, 0x0098);2302 2303 /* parallel in, has something to do with recording :) */2304 maestro_write(chip, 0x0C,2305 (maestro_read(chip, 0x0C) & ~0xF000) | 0x8000);2306 /* parallel out */2307 maestro_write(chip, 0x0C,2308 (maestro_read(chip, 0x0C) & ~0x0F00) | 0x0500);2309 2310 maestro_write(chip, 0x0D, 0x7632);2311 2312 /* Wave cache control on - test off, sg off, 2313 enable, enable extra chans 1Mb */2314 2315 w = inw(iobase + WC_CONTROL);2316 2317 w &= ~0xFA00; /* Seems to be reserved? I don't know */2318 w |= 0xA000; /* reserved... I don't know */2319 w &= ~0x0200; /* Channels 56,57,58,59 as Extra Play,Rec Channel enable2320 Seems to crash the Computer if enabled... */2321 w |= 0x0100; /* Wave Cache Operation Enabled */2322 w |= 0x0080; /* Channels 60/61 as Placback/Record enabled */2323 w &= ~0x0060; /* Clear Wavtable Size */2324 w |= 0x0020; /* Wavetable Size : 1MB */2325 /* Bit 4 is reserved */2326 w &= ~0x000C; /* DMA Stuff? I don't understand what the datasheet means */2327 /* Bit 1 is reserved */2328 w &= ~0x0001; /* Test Mode off */2329 2330 outw(w, iobase + WC_CONTROL);2331 2332 /* Now clear the APU control ram */2333 for (i = 0; i < NR_APUS; i++) {2334 for (w = 0; w < NR_APU_REGS; w++)2335 apu_set_register(chip, i, w, 0);2336 2337 }2338}2339 2340/* Enable IRQ's */2341static void snd_es1968_start_irq(struct es1968 *chip)2342{2343 unsigned short w;2344 w = ESM_HIRQ_DSIE | ESM_HIRQ_HW_VOLUME;2345 if (chip->rmidi)2346 w |= ESM_HIRQ_MPU401;2347 outb(w, chip->io_port + 0x1A);2348 outw(w, chip->io_port + ESM_PORT_HOST_IRQ);2349}2350 2351/*2352 * PM support2353 */2354static int es1968_suspend(struct device *dev)2355{2356 struct snd_card *card = dev_get_drvdata(dev);2357 struct es1968 *chip = card->private_data;2358 2359 if (! chip->do_pm)2360 return 0;2361 2362 chip->in_suspend = 1;2363 cancel_work_sync(&chip->hwvol_work);2364 snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);2365 snd_ac97_suspend(chip->ac97);2366 snd_es1968_bob_stop(chip);2367 return 0;2368}2369 2370static int es1968_resume(struct device *dev)2371{2372 struct snd_card *card = dev_get_drvdata(dev);2373 struct es1968 *chip = card->private_data;2374 struct esschan *es;2375 2376 if (! chip->do_pm)2377 return 0;2378 2379 snd_es1968_chip_init(chip);2380 2381 /* need to restore the base pointers.. */ 2382 if (chip->dma.addr) {2383 /* set PCMBAR */2384 wave_set_register(chip, 0x01FC, chip->dma.addr >> 12);2385 }2386 2387 snd_es1968_start_irq(chip);2388 2389 /* restore ac97 state */2390 snd_ac97_resume(chip->ac97);2391 2392 list_for_each_entry(es, &chip->substream_list, list) {2393 switch (es->mode) {2394 case ESM_MODE_PLAY:2395 snd_es1968_playback_setup(chip, es, es->substream->runtime);2396 break;2397 case ESM_MODE_CAPTURE:2398 snd_es1968_capture_setup(chip, es, es->substream->runtime);2399 break;2400 }2401 }2402 2403 /* start timer again */2404 if (chip->bobclient)2405 snd_es1968_bob_start(chip);2406 2407 snd_power_change_state(card, SNDRV_CTL_POWER_D0);2408 chip->in_suspend = 0;2409 return 0;2410}2411 2412static DEFINE_SIMPLE_DEV_PM_OPS(es1968_pm, es1968_suspend, es1968_resume);2413 2414#ifdef SUPPORT_JOYSTICK2415#define JOYSTICK_ADDR 0x2002416static int snd_es1968_create_gameport(struct es1968 *chip, int dev)2417{2418 struct gameport *gp;2419 struct resource *r;2420 u16 val;2421 2422 if (!joystick[dev])2423 return -ENODEV;2424 2425 r = devm_request_region(&chip->pci->dev, JOYSTICK_ADDR, 8,2426 "ES1968 gameport");2427 if (!r)2428 return -EBUSY;2429 2430 chip->gameport = gp = gameport_allocate_port();2431 if (!gp) {2432 dev_err(chip->card->dev,2433 "cannot allocate memory for gameport\n");2434 return -ENOMEM;2435 }2436 2437 pci_read_config_word(chip->pci, ESM_LEGACY_AUDIO_CONTROL, &val);2438 pci_write_config_word(chip->pci, ESM_LEGACY_AUDIO_CONTROL, val | 0x04);2439 2440 gameport_set_name(gp, "ES1968 Gameport");2441 gameport_set_phys(gp, "pci%s/gameport0", pci_name(chip->pci));2442 gameport_set_dev_parent(gp, &chip->pci->dev);2443 gp->io = JOYSTICK_ADDR;2444 2445 gameport_register_port(gp);2446 2447 return 0;2448}2449 2450static void snd_es1968_free_gameport(struct es1968 *chip)2451{2452 if (chip->gameport) {2453 gameport_unregister_port(chip->gameport);2454 chip->gameport = NULL;2455 }2456}2457#else2458static inline int snd_es1968_create_gameport(struct es1968 *chip, int dev) { return -ENOSYS; }2459static inline void snd_es1968_free_gameport(struct es1968 *chip) { }2460#endif2461 2462#ifdef CONFIG_SND_ES1968_INPUT2463static int snd_es1968_input_register(struct es1968 *chip)2464{2465 struct input_dev *input_dev;2466 int err;2467 2468 input_dev = devm_input_allocate_device(&chip->pci->dev);2469 if (!input_dev)2470 return -ENOMEM;2471 2472 snprintf(chip->phys, sizeof(chip->phys), "pci-%s/input0",2473 pci_name(chip->pci));2474 2475 input_dev->name = chip->card->driver;2476 input_dev->phys = chip->phys;2477 input_dev->id.bustype = BUS_PCI;2478 input_dev->id.vendor = chip->pci->vendor;2479 input_dev->id.product = chip->pci->device;2480 input_dev->dev.parent = &chip->pci->dev;2481 2482 __set_bit(EV_KEY, input_dev->evbit);2483 __set_bit(KEY_MUTE, input_dev->keybit);2484 __set_bit(KEY_VOLUMEDOWN, input_dev->keybit);2485 __set_bit(KEY_VOLUMEUP, input_dev->keybit);2486 2487 err = input_register_device(input_dev);2488 if (err)2489 return err;2490 2491 chip->input_dev = input_dev;2492 return 0;2493}2494#endif /* CONFIG_SND_ES1968_INPUT */2495 2496#ifdef CONFIG_SND_ES1968_RADIO2497#define GPIO_DATA 0x602498#define IO_MASK 4 /* mask register offset from GPIO_DATA2499 bits 1=unmask write to given bit */2500#define IO_DIR 8 /* direction register offset from GPIO_DATA2501 bits 0/1=read/write direction */2502 2503/* GPIO to TEA575x maps */2504struct snd_es1968_tea575x_gpio {2505 u8 data, clk, wren, most;2506 char *name;2507};2508 2509static const struct snd_es1968_tea575x_gpio snd_es1968_tea575x_gpios[] = {2510 { .data = 6, .clk = 7, .wren = 8, .most = 9, .name = "SF64-PCE2" },2511 { .data = 7, .clk = 8, .wren = 6, .most = 10, .name = "M56VAP" },2512};2513 2514#define get_tea575x_gpio(chip) \2515 (&snd_es1968_tea575x_gpios[(chip)->tea575x_tuner])2516 2517 2518static void snd_es1968_tea575x_set_pins(struct snd_tea575x *tea, u8 pins)2519{2520 struct es1968 *chip = tea->private_data;2521 struct snd_es1968_tea575x_gpio gpio = *get_tea575x_gpio(chip);2522 u16 val = 0;2523 2524 val |= (pins & TEA575X_DATA) ? (1 << gpio.data) : 0;2525 val |= (pins & TEA575X_CLK) ? (1 << gpio.clk) : 0;2526 val |= (pins & TEA575X_WREN) ? (1 << gpio.wren) : 0;2527 2528 outw(val, chip->io_port + GPIO_DATA);2529}2530 2531static u8 snd_es1968_tea575x_get_pins(struct snd_tea575x *tea)2532{2533 struct es1968 *chip = tea->private_data;2534 struct snd_es1968_tea575x_gpio gpio = *get_tea575x_gpio(chip);2535 u16 val = inw(chip->io_port + GPIO_DATA);2536 u8 ret = 0;2537 2538 if (val & (1 << gpio.data))2539 ret |= TEA575X_DATA;2540 if (val & (1 << gpio.most))2541 ret |= TEA575X_MOST;2542 2543 return ret;2544}2545 2546static void snd_es1968_tea575x_set_direction(struct snd_tea575x *tea, bool output)2547{2548 struct es1968 *chip = tea->private_data;2549 unsigned long io = chip->io_port + GPIO_DATA;2550 u16 odir = inw(io + IO_DIR);2551 struct snd_es1968_tea575x_gpio gpio = *get_tea575x_gpio(chip);2552 2553 if (output) {2554 outw(~((1 << gpio.data) | (1 << gpio.clk) | (1 << gpio.wren)),2555 io + IO_MASK);2556 outw(odir | (1 << gpio.data) | (1 << gpio.clk) | (1 << gpio.wren),2557 io + IO_DIR);2558 } else {2559 outw(~((1 << gpio.clk) | (1 << gpio.wren) | (1 << gpio.data) | (1 << gpio.most)),2560 io + IO_MASK);2561 outw((odir & ~((1 << gpio.data) | (1 << gpio.most)))2562 | (1 << gpio.clk) | (1 << gpio.wren), io + IO_DIR);2563 }2564}2565 2566static const struct snd_tea575x_ops snd_es1968_tea_ops = {2567 .set_pins = snd_es1968_tea575x_set_pins,2568 .get_pins = snd_es1968_tea575x_get_pins,2569 .set_direction = snd_es1968_tea575x_set_direction,2570};2571#endif2572 2573static void snd_es1968_free(struct snd_card *card)2574{2575 struct es1968 *chip = card->private_data;2576 2577 cancel_work_sync(&chip->hwvol_work);2578 2579 if (chip->io_port) {2580 outw(1, chip->io_port + 0x04); /* clear WP interrupts */2581 outw(0, chip->io_port + ESM_PORT_HOST_IRQ); /* disable IRQ */2582 }2583 2584#ifdef CONFIG_SND_ES1968_RADIO2585 snd_tea575x_exit(&chip->tea);2586 v4l2_device_unregister(&chip->v4l2_dev);2587#endif2588 2589 snd_es1968_free_gameport(chip);2590}2591 2592struct ess_device_list {2593 unsigned short type; /* chip type */2594 unsigned short vendor; /* subsystem vendor id */2595};2596 2597static const struct ess_device_list pm_allowlist[] = {2598 { TYPE_MAESTRO2E, 0x0e11 }, /* Compaq Armada */2599 { TYPE_MAESTRO2E, 0x1028 },2600 { TYPE_MAESTRO2E, 0x103c },2601 { TYPE_MAESTRO2E, 0x1179 },2602 { TYPE_MAESTRO2E, 0x14c0 }, /* HP omnibook 4150 */2603 { TYPE_MAESTRO2E, 0x1558 },2604 { TYPE_MAESTRO2E, 0x125d }, /* a PCI card, e.g. Terratec DMX */2605 { TYPE_MAESTRO2, 0x125d }, /* a PCI card, e.g. SF64-PCE2 */2606};2607 2608static const struct ess_device_list mpu_denylist[] = {2609 { TYPE_MAESTRO2, 0x125d },2610};2611 2612static int snd_es1968_create(struct snd_card *card,2613 struct pci_dev *pci,2614 int total_bufsize,2615 int play_streams,2616 int capt_streams,2617 int chip_type,2618 int do_pm,2619 int radio_nr)2620{2621 struct es1968 *chip = card->private_data;2622 int i, err;2623 2624 /* enable PCI device */2625 err = pcim_enable_device(pci);2626 if (err < 0)2627 return err;2628 /* check, if we can restrict PCI DMA transfers to 28 bits */2629 if (dma_set_mask_and_coherent(&pci->dev, DMA_BIT_MASK(28))) {2630 dev_err(card->dev,2631 "architecture does not support 28bit PCI busmaster DMA\n");2632 return -ENXIO;2633 }2634 2635 /* Set Vars */2636 chip->type = chip_type;2637 spin_lock_init(&chip->reg_lock);2638 spin_lock_init(&chip->substream_lock);2639 INIT_LIST_HEAD(&chip->buf_list);2640 INIT_LIST_HEAD(&chip->substream_list);2641 mutex_init(&chip->memory_mutex);2642 INIT_WORK(&chip->hwvol_work, es1968_update_hw_volume);2643 chip->card = card;2644 chip->pci = pci;2645 chip->irq = -1;2646 chip->total_bufsize = total_bufsize; /* in bytes */2647 chip->playback_streams = play_streams;2648 chip->capture_streams = capt_streams;2649 2650 err = pci_request_regions(pci, "ESS Maestro");2651 if (err < 0)2652 return err;2653 chip->io_port = pci_resource_start(pci, 0);2654 if (devm_request_irq(&pci->dev, pci->irq, snd_es1968_interrupt,2655 IRQF_SHARED, KBUILD_MODNAME, chip)) {2656 dev_err(card->dev, "unable to grab IRQ %d\n", pci->irq);2657 return -EBUSY;2658 }2659 chip->irq = pci->irq;2660 card->sync_irq = chip->irq;2661 card->private_free = snd_es1968_free;2662 2663 /* Clear Maestro_map */2664 for (i = 0; i < 32; i++)2665 chip->maestro_map[i] = 0;2666 2667 /* Clear Apu Map */2668 for (i = 0; i < NR_APUS; i++)2669 chip->apu[i] = ESM_APU_FREE;2670 2671 /* just to be sure */2672 pci_set_master(pci);2673 2674 if (do_pm > 1) {2675 /* disable power-management if not on the allowlist */2676 unsigned short vend;2677 pci_read_config_word(chip->pci, PCI_SUBSYSTEM_VENDOR_ID, &vend);2678 for (i = 0; i < (int)ARRAY_SIZE(pm_allowlist); i++) {2679 if (chip->type == pm_allowlist[i].type &&2680 vend == pm_allowlist[i].vendor) {2681 do_pm = 1;2682 break;2683 }2684 }2685 if (do_pm > 1) {2686 /* not matched; disabling pm */2687 dev_info(card->dev, "not attempting power management.\n");2688 do_pm = 0;2689 }2690 }2691 chip->do_pm = do_pm;2692 2693 snd_es1968_chip_init(chip);2694 2695#ifdef CONFIG_SND_ES1968_RADIO2696 /* don't play with GPIOs on laptops */2697 if (chip->pci->subsystem_vendor != 0x125d)2698 return 0;2699 err = v4l2_device_register(&pci->dev, &chip->v4l2_dev);2700 if (err < 0)2701 return err;2702 chip->tea.v4l2_dev = &chip->v4l2_dev;2703 chip->tea.private_data = chip;2704 chip->tea.radio_nr = radio_nr;2705 chip->tea.ops = &snd_es1968_tea_ops;2706 sprintf(chip->tea.bus_info, "PCI:%s", pci_name(pci));2707 for (i = 0; i < ARRAY_SIZE(snd_es1968_tea575x_gpios); i++) {2708 chip->tea575x_tuner = i;2709 if (!snd_tea575x_init(&chip->tea, THIS_MODULE)) {2710 dev_info(card->dev, "detected TEA575x radio type %s\n",2711 get_tea575x_gpio(chip)->name);2712 strscpy(chip->tea.card, get_tea575x_gpio(chip)->name,2713 sizeof(chip->tea.card));2714 break;2715 }2716 }2717#endif2718 return 0;2719}2720 2721 2722/*2723 */2724static int __snd_es1968_probe(struct pci_dev *pci,2725 const struct pci_device_id *pci_id)2726{2727 static int dev;2728 struct snd_card *card;2729 struct es1968 *chip;2730 unsigned int i;2731 int err;2732 2733 if (dev >= SNDRV_CARDS)2734 return -ENODEV;2735 if (!enable[dev]) {2736 dev++;2737 return -ENOENT;2738 }2739 2740 err = snd_devm_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE,2741 sizeof(*chip), &card);2742 if (err < 0)2743 return err;2744 chip = card->private_data;2745 2746 if (total_bufsize[dev] < 128)2747 total_bufsize[dev] = 128;2748 if (total_bufsize[dev] > 4096)2749 total_bufsize[dev] = 4096;2750 err = snd_es1968_create(card, pci,2751 total_bufsize[dev] * 1024, /* in bytes */2752 pcm_substreams_p[dev],2753 pcm_substreams_c[dev],2754 pci_id->driver_data,2755 use_pm[dev],2756 radio_nr[dev]);2757 if (err < 0)2758 return err;2759 2760 switch (chip->type) {2761 case TYPE_MAESTRO2E:2762 strcpy(card->driver, "ES1978");2763 strcpy(card->shortname, "ESS ES1978 (Maestro 2E)");2764 break;2765 case TYPE_MAESTRO2:2766 strcpy(card->driver, "ES1968");2767 strcpy(card->shortname, "ESS ES1968 (Maestro 2)");2768 break;2769 case TYPE_MAESTRO:2770 strcpy(card->driver, "ESM1");2771 strcpy(card->shortname, "ESS Maestro 1");2772 break;2773 }2774 2775 err = snd_es1968_pcm(chip, 0);2776 if (err < 0)2777 return err;2778 2779 err = snd_es1968_mixer(chip);2780 if (err < 0)2781 return err;2782 2783 if (enable_mpu[dev] == 2) {2784 /* check the deny list */2785 unsigned short vend;2786 pci_read_config_word(chip->pci, PCI_SUBSYSTEM_VENDOR_ID, &vend);2787 for (i = 0; i < ARRAY_SIZE(mpu_denylist); i++) {2788 if (chip->type == mpu_denylist[i].type &&2789 vend == mpu_denylist[i].vendor) {2790 enable_mpu[dev] = 0;2791 break;2792 }2793 }2794 }2795 if (enable_mpu[dev]) {2796 err = snd_mpu401_uart_new(card, 0, MPU401_HW_MPU401,2797 chip->io_port + ESM_MPU401_PORT,2798 MPU401_INFO_INTEGRATED |2799 MPU401_INFO_IRQ_HOOK,2800 -1, &chip->rmidi);2801 if (err < 0)2802 dev_warn(card->dev, "skipping MPU-401 MIDI support..\n");2803 }2804 2805 snd_es1968_create_gameport(chip, dev);2806 2807#ifdef CONFIG_SND_ES1968_INPUT2808 err = snd_es1968_input_register(chip);2809 if (err)2810 dev_warn(card->dev,2811 "Input device registration failed with error %i", err);2812#endif2813 2814 snd_es1968_start_irq(chip);2815 2816 chip->clock = clock[dev];2817 if (! chip->clock)2818 es1968_measure_clock(chip);2819 2820 sprintf(card->longname, "%s at 0x%lx, irq %i",2821 card->shortname, chip->io_port, chip->irq);2822 2823 err = snd_card_register(card);2824 if (err < 0)2825 return err;2826 pci_set_drvdata(pci, card);2827 dev++;2828 return 0;2829}2830 2831static int snd_es1968_probe(struct pci_dev *pci,2832 const struct pci_device_id *pci_id)2833{2834 return snd_card_free_on_error(&pci->dev, __snd_es1968_probe(pci, pci_id));2835}2836 2837static struct pci_driver es1968_driver = {2838 .name = KBUILD_MODNAME,2839 .id_table = snd_es1968_ids,2840 .probe = snd_es1968_probe,2841 .driver = {2842 .pm = &es1968_pm,2843 },2844};2845 2846module_pci_driver(es1968_driver);2847