1408 lines · c
1// SPDX-License-Identifier: GPL-2.0-or-later2/*3 * The driver for the ForteMedia FM801 based soundcards4 * Copyright (c) by Jaroslav Kysela <perex@perex.cz>5 */6 7#include <linux/delay.h>8#include <linux/init.h>9#include <linux/interrupt.h>10#include <linux/io.h>11#include <linux/pci.h>12#include <linux/slab.h>13#include <linux/module.h>14#include <sound/core.h>15#include <sound/pcm.h>16#include <sound/tlv.h>17#include <sound/ac97_codec.h>18#include <sound/mpu401.h>19#include <sound/opl3.h>20#include <sound/initval.h>21 22#ifdef CONFIG_SND_FM801_TEA575X_BOOL23#include <media/drv-intf/tea575x.h>24#endif25 26MODULE_AUTHOR("Jaroslav Kysela <perex@perex.cz>");27MODULE_DESCRIPTION("ForteMedia FM801");28MODULE_LICENSE("GPL");29 30static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */31static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */32static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */33/*34 * Enable TEA575x tuner35 * 1 = MediaForte 256-PCS36 * 2 = MediaForte 256-PCP37 * 3 = MediaForte 64-PCR38 * 16 = setup tuner only (this is additional bit), i.e. SF64-PCR FM card39 * High 16-bits are video (radio) device number + 140 */41static int tea575x_tuner[SNDRV_CARDS];42static int radio_nr[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = -1};43 44module_param_array(index, int, NULL, 0444);45MODULE_PARM_DESC(index, "Index value for the FM801 soundcard.");46module_param_array(id, charp, NULL, 0444);47MODULE_PARM_DESC(id, "ID string for the FM801 soundcard.");48module_param_array(enable, bool, NULL, 0444);49MODULE_PARM_DESC(enable, "Enable FM801 soundcard.");50module_param_array(tea575x_tuner, int, NULL, 0444);51MODULE_PARM_DESC(tea575x_tuner, "TEA575x tuner access method (0 = auto, 1 = SF256-PCS, 2=SF256-PCP, 3=SF64-PCR, 8=disable, +16=tuner-only).");52module_param_array(radio_nr, int, NULL, 0444);53MODULE_PARM_DESC(radio_nr, "Radio device numbers");54 55 56#define TUNER_DISABLED (1<<3)57#define TUNER_ONLY (1<<4)58#define TUNER_TYPE_MASK (~TUNER_ONLY & 0xFFFF)59 60/*61 * Direct registers62 */63 64#define fm801_writew(chip,reg,value) outw((value), chip->port + FM801_##reg)65#define fm801_readw(chip,reg) inw(chip->port + FM801_##reg)66 67#define fm801_writel(chip,reg,value) outl((value), chip->port + FM801_##reg)68 69#define FM801_PCM_VOL 0x00 /* PCM Output Volume */70#define FM801_FM_VOL 0x02 /* FM Output Volume */71#define FM801_I2S_VOL 0x04 /* I2S Volume */72#define FM801_REC_SRC 0x06 /* Record Source */73#define FM801_PLY_CTRL 0x08 /* Playback Control */74#define FM801_PLY_COUNT 0x0a /* Playback Count */75#define FM801_PLY_BUF1 0x0c /* Playback Bufer I */76#define FM801_PLY_BUF2 0x10 /* Playback Buffer II */77#define FM801_CAP_CTRL 0x14 /* Capture Control */78#define FM801_CAP_COUNT 0x16 /* Capture Count */79#define FM801_CAP_BUF1 0x18 /* Capture Buffer I */80#define FM801_CAP_BUF2 0x1c /* Capture Buffer II */81#define FM801_CODEC_CTRL 0x22 /* Codec Control */82#define FM801_I2S_MODE 0x24 /* I2S Mode Control */83#define FM801_VOLUME 0x26 /* Volume Up/Down/Mute Status */84#define FM801_I2C_CTRL 0x29 /* I2C Control */85#define FM801_AC97_CMD 0x2a /* AC'97 Command */86#define FM801_AC97_DATA 0x2c /* AC'97 Data */87#define FM801_MPU401_DATA 0x30 /* MPU401 Data */88#define FM801_MPU401_CMD 0x31 /* MPU401 Command */89#define FM801_GPIO_CTRL 0x52 /* General Purpose I/O Control */90#define FM801_GEN_CTRL 0x54 /* General Control */91#define FM801_IRQ_MASK 0x56 /* Interrupt Mask */92#define FM801_IRQ_STATUS 0x5a /* Interrupt Status */93#define FM801_OPL3_BANK0 0x68 /* OPL3 Status Read / Bank 0 Write */94#define FM801_OPL3_DATA0 0x69 /* OPL3 Data 0 Write */95#define FM801_OPL3_BANK1 0x6a /* OPL3 Bank 1 Write */96#define FM801_OPL3_DATA1 0x6b /* OPL3 Bank 1 Write */97#define FM801_POWERDOWN 0x70 /* Blocks Power Down Control */98 99/* codec access */100#define FM801_AC97_READ (1<<7) /* read=1, write=0 */101#define FM801_AC97_VALID (1<<8) /* port valid=1 */102#define FM801_AC97_BUSY (1<<9) /* busy=1 */103#define FM801_AC97_ADDR_SHIFT 10 /* codec id (2bit) */104 105/* playback and record control register bits */106#define FM801_BUF1_LAST (1<<1)107#define FM801_BUF2_LAST (1<<2)108#define FM801_START (1<<5)109#define FM801_PAUSE (1<<6)110#define FM801_IMMED_STOP (1<<7)111#define FM801_RATE_SHIFT 8112#define FM801_RATE_MASK (15 << FM801_RATE_SHIFT)113#define FM801_CHANNELS_4 (1<<12) /* playback only */114#define FM801_CHANNELS_6 (2<<12) /* playback only */115#define FM801_CHANNELS_6MS (3<<12) /* playback only */116#define FM801_CHANNELS_MASK (3<<12)117#define FM801_16BIT (1<<14)118#define FM801_STEREO (1<<15)119 120/* IRQ status bits */121#define FM801_IRQ_PLAYBACK (1<<8)122#define FM801_IRQ_CAPTURE (1<<9)123#define FM801_IRQ_VOLUME (1<<14)124#define FM801_IRQ_MPU (1<<15)125 126/* GPIO control register */127#define FM801_GPIO_GP0 (1<<0) /* read/write */128#define FM801_GPIO_GP1 (1<<1)129#define FM801_GPIO_GP2 (1<<2)130#define FM801_GPIO_GP3 (1<<3)131#define FM801_GPIO_GP(x) (1<<(0+(x)))132#define FM801_GPIO_GD0 (1<<8) /* directions: 1 = input, 0 = output*/133#define FM801_GPIO_GD1 (1<<9)134#define FM801_GPIO_GD2 (1<<10)135#define FM801_GPIO_GD3 (1<<11)136#define FM801_GPIO_GD(x) (1<<(8+(x)))137#define FM801_GPIO_GS0 (1<<12) /* function select: */138#define FM801_GPIO_GS1 (1<<13) /* 1 = GPIO */139#define FM801_GPIO_GS2 (1<<14) /* 0 = other (S/PDIF, VOL) */140#define FM801_GPIO_GS3 (1<<15)141#define FM801_GPIO_GS(x) (1<<(12+(x)))142 143/**144 * struct fm801 - describes FM801 chip145 * @dev: device for this chio146 * @irq: irq number147 * @port: I/O port number148 * @multichannel: multichannel support149 * @secondary: secondary codec150 * @secondary_addr: address of the secondary codec151 * @tea575x_tuner: tuner access method & flags152 * @ply_ctrl: playback control153 * @cap_ctrl: capture control154 * @ply_buffer: playback buffer155 * @ply_buf: playback buffer index156 * @ply_count: playback buffer count157 * @ply_size: playback buffer size158 * @ply_pos: playback position159 * @cap_buffer: capture buffer160 * @cap_buf: capture buffer index161 * @cap_count: capture buffer count162 * @cap_size: capture buffer size163 * @cap_pos: capture position164 * @ac97_bus: ac97 bus handle165 * @ac97: ac97 handle166 * @ac97_sec: ac97 secondary handle167 * @card: ALSA card168 * @pcm: PCM devices169 * @rmidi: rmidi device170 * @playback_substream: substream for playback171 * @capture_substream: substream for capture172 * @p_dma_size: playback DMA size173 * @c_dma_size: capture DMA size174 * @reg_lock: lock175 * @proc_entry: /proc entry176 * @v4l2_dev: v4l2 device177 * @tea: tea575a structure178 * @saved_regs: context saved during suspend179 */180struct fm801 {181 struct device *dev;182 int irq;183 184 unsigned long port;185 unsigned int multichannel: 1,186 secondary: 1;187 unsigned char secondary_addr;188 unsigned int tea575x_tuner;189 190 unsigned short ply_ctrl;191 unsigned short cap_ctrl;192 193 unsigned long ply_buffer;194 unsigned int ply_buf;195 unsigned int ply_count;196 unsigned int ply_size;197 unsigned int ply_pos;198 199 unsigned long cap_buffer;200 unsigned int cap_buf;201 unsigned int cap_count;202 unsigned int cap_size;203 unsigned int cap_pos;204 205 struct snd_ac97_bus *ac97_bus;206 struct snd_ac97 *ac97;207 struct snd_ac97 *ac97_sec;208 209 struct snd_card *card;210 struct snd_pcm *pcm;211 struct snd_rawmidi *rmidi;212 struct snd_pcm_substream *playback_substream;213 struct snd_pcm_substream *capture_substream;214 unsigned int p_dma_size;215 unsigned int c_dma_size;216 217 spinlock_t reg_lock;218 struct snd_info_entry *proc_entry;219 220#ifdef CONFIG_SND_FM801_TEA575X_BOOL221 struct v4l2_device v4l2_dev;222 struct snd_tea575x tea;223#endif224 225 u16 saved_regs[0x20];226};227 228/*229 * IO accessors230 */231 232static inline void fm801_iowrite16(struct fm801 *chip, unsigned short offset, u16 value)233{234 outw(value, chip->port + offset);235}236 237static inline u16 fm801_ioread16(struct fm801 *chip, unsigned short offset)238{239 return inw(chip->port + offset);240}241 242static const struct pci_device_id snd_fm801_ids[] = {243 { 0x1319, 0x0801, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_MULTIMEDIA_AUDIO << 8, 0xffff00, 0, }, /* FM801 */244 { 0x5213, 0x0510, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_MULTIMEDIA_AUDIO << 8, 0xffff00, 0, }, /* Gallant Odyssey Sound 4 */245 { 0, }246};247 248MODULE_DEVICE_TABLE(pci, snd_fm801_ids);249 250/*251 * common I/O routines252 */253 254static bool fm801_ac97_is_ready(struct fm801 *chip, unsigned int iterations)255{256 unsigned int idx;257 258 for (idx = 0; idx < iterations; idx++) {259 if (!(fm801_readw(chip, AC97_CMD) & FM801_AC97_BUSY))260 return true;261 udelay(10);262 }263 return false;264}265 266static bool fm801_ac97_is_valid(struct fm801 *chip, unsigned int iterations)267{268 unsigned int idx;269 270 for (idx = 0; idx < iterations; idx++) {271 if (fm801_readw(chip, AC97_CMD) & FM801_AC97_VALID)272 return true;273 udelay(10);274 }275 return false;276}277 278static int snd_fm801_update_bits(struct fm801 *chip, unsigned short reg,279 unsigned short mask, unsigned short value)280{281 int change;282 unsigned long flags;283 unsigned short old, new;284 285 spin_lock_irqsave(&chip->reg_lock, flags);286 old = fm801_ioread16(chip, reg);287 new = (old & ~mask) | value;288 change = old != new;289 if (change)290 fm801_iowrite16(chip, reg, new);291 spin_unlock_irqrestore(&chip->reg_lock, flags);292 return change;293}294 295static void snd_fm801_codec_write(struct snd_ac97 *ac97,296 unsigned short reg,297 unsigned short val)298{299 struct fm801 *chip = ac97->private_data;300 301 /*302 * Wait until the codec interface is not ready..303 */304 if (!fm801_ac97_is_ready(chip, 100)) {305 dev_err(chip->card->dev, "AC'97 interface is busy (1)\n");306 return;307 }308 309 /* write data and address */310 fm801_writew(chip, AC97_DATA, val);311 fm801_writew(chip, AC97_CMD, reg | (ac97->addr << FM801_AC97_ADDR_SHIFT));312 /*313 * Wait until the write command is not completed..314 */315 if (!fm801_ac97_is_ready(chip, 1000))316 dev_err(chip->card->dev, "AC'97 interface #%d is busy (2)\n",317 ac97->num);318}319 320static unsigned short snd_fm801_codec_read(struct snd_ac97 *ac97, unsigned short reg)321{322 struct fm801 *chip = ac97->private_data;323 324 /*325 * Wait until the codec interface is not ready..326 */327 if (!fm801_ac97_is_ready(chip, 100)) {328 dev_err(chip->card->dev, "AC'97 interface is busy (1)\n");329 return 0;330 }331 332 /* read command */333 fm801_writew(chip, AC97_CMD,334 reg | (ac97->addr << FM801_AC97_ADDR_SHIFT) | FM801_AC97_READ);335 if (!fm801_ac97_is_ready(chip, 100)) {336 dev_err(chip->card->dev, "AC'97 interface #%d is busy (2)\n",337 ac97->num);338 return 0;339 }340 341 if (!fm801_ac97_is_valid(chip, 1000)) {342 dev_err(chip->card->dev,343 "AC'97 interface #%d is not valid (2)\n", ac97->num);344 return 0;345 }346 347 return fm801_readw(chip, AC97_DATA);348}349 350static const unsigned int rates[] = {351 5500, 8000, 9600, 11025,352 16000, 19200, 22050, 32000,353 38400, 44100, 48000354};355 356static const struct snd_pcm_hw_constraint_list hw_constraints_rates = {357 .count = ARRAY_SIZE(rates),358 .list = rates,359 .mask = 0,360};361 362static const unsigned int channels[] = {363 2, 4, 6364};365 366static const struct snd_pcm_hw_constraint_list hw_constraints_channels = {367 .count = ARRAY_SIZE(channels),368 .list = channels,369 .mask = 0,370};371 372/*373 * Sample rate routines374 */375 376static unsigned short snd_fm801_rate_bits(unsigned int rate)377{378 unsigned int idx;379 380 for (idx = 0; idx < ARRAY_SIZE(rates); idx++)381 if (rates[idx] == rate)382 return idx;383 snd_BUG();384 return ARRAY_SIZE(rates) - 1;385}386 387/*388 * PCM part389 */390 391static int snd_fm801_playback_trigger(struct snd_pcm_substream *substream,392 int cmd)393{394 struct fm801 *chip = snd_pcm_substream_chip(substream);395 396 spin_lock(&chip->reg_lock);397 switch (cmd) {398 case SNDRV_PCM_TRIGGER_START:399 chip->ply_ctrl &= ~(FM801_BUF1_LAST |400 FM801_BUF2_LAST |401 FM801_PAUSE);402 chip->ply_ctrl |= FM801_START |403 FM801_IMMED_STOP;404 break;405 case SNDRV_PCM_TRIGGER_STOP:406 chip->ply_ctrl &= ~(FM801_START | FM801_PAUSE);407 break;408 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:409 case SNDRV_PCM_TRIGGER_SUSPEND:410 chip->ply_ctrl |= FM801_PAUSE;411 break;412 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:413 case SNDRV_PCM_TRIGGER_RESUME:414 chip->ply_ctrl &= ~FM801_PAUSE;415 break;416 default:417 spin_unlock(&chip->reg_lock);418 snd_BUG();419 return -EINVAL;420 }421 fm801_writew(chip, PLY_CTRL, chip->ply_ctrl);422 spin_unlock(&chip->reg_lock);423 return 0;424}425 426static int snd_fm801_capture_trigger(struct snd_pcm_substream *substream,427 int cmd)428{429 struct fm801 *chip = snd_pcm_substream_chip(substream);430 431 spin_lock(&chip->reg_lock);432 switch (cmd) {433 case SNDRV_PCM_TRIGGER_START:434 chip->cap_ctrl &= ~(FM801_BUF1_LAST |435 FM801_BUF2_LAST |436 FM801_PAUSE);437 chip->cap_ctrl |= FM801_START |438 FM801_IMMED_STOP;439 break;440 case SNDRV_PCM_TRIGGER_STOP:441 chip->cap_ctrl &= ~(FM801_START | FM801_PAUSE);442 break;443 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:444 case SNDRV_PCM_TRIGGER_SUSPEND:445 chip->cap_ctrl |= FM801_PAUSE;446 break;447 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:448 case SNDRV_PCM_TRIGGER_RESUME:449 chip->cap_ctrl &= ~FM801_PAUSE;450 break;451 default:452 spin_unlock(&chip->reg_lock);453 snd_BUG();454 return -EINVAL;455 }456 fm801_writew(chip, CAP_CTRL, chip->cap_ctrl);457 spin_unlock(&chip->reg_lock);458 return 0;459}460 461static int snd_fm801_playback_prepare(struct snd_pcm_substream *substream)462{463 struct fm801 *chip = snd_pcm_substream_chip(substream);464 struct snd_pcm_runtime *runtime = substream->runtime;465 466 chip->ply_size = snd_pcm_lib_buffer_bytes(substream);467 chip->ply_count = snd_pcm_lib_period_bytes(substream);468 spin_lock_irq(&chip->reg_lock);469 chip->ply_ctrl &= ~(FM801_START | FM801_16BIT |470 FM801_STEREO | FM801_RATE_MASK |471 FM801_CHANNELS_MASK);472 if (snd_pcm_format_width(runtime->format) == 16)473 chip->ply_ctrl |= FM801_16BIT;474 if (runtime->channels > 1) {475 chip->ply_ctrl |= FM801_STEREO;476 if (runtime->channels == 4)477 chip->ply_ctrl |= FM801_CHANNELS_4;478 else if (runtime->channels == 6)479 chip->ply_ctrl |= FM801_CHANNELS_6;480 }481 chip->ply_ctrl |= snd_fm801_rate_bits(runtime->rate) << FM801_RATE_SHIFT;482 chip->ply_buf = 0;483 fm801_writew(chip, PLY_CTRL, chip->ply_ctrl);484 fm801_writew(chip, PLY_COUNT, chip->ply_count - 1);485 chip->ply_buffer = runtime->dma_addr;486 chip->ply_pos = 0;487 fm801_writel(chip, PLY_BUF1, chip->ply_buffer);488 fm801_writel(chip, PLY_BUF2,489 chip->ply_buffer + (chip->ply_count % chip->ply_size));490 spin_unlock_irq(&chip->reg_lock);491 return 0;492}493 494static int snd_fm801_capture_prepare(struct snd_pcm_substream *substream)495{496 struct fm801 *chip = snd_pcm_substream_chip(substream);497 struct snd_pcm_runtime *runtime = substream->runtime;498 499 chip->cap_size = snd_pcm_lib_buffer_bytes(substream);500 chip->cap_count = snd_pcm_lib_period_bytes(substream);501 spin_lock_irq(&chip->reg_lock);502 chip->cap_ctrl &= ~(FM801_START | FM801_16BIT |503 FM801_STEREO | FM801_RATE_MASK);504 if (snd_pcm_format_width(runtime->format) == 16)505 chip->cap_ctrl |= FM801_16BIT;506 if (runtime->channels > 1)507 chip->cap_ctrl |= FM801_STEREO;508 chip->cap_ctrl |= snd_fm801_rate_bits(runtime->rate) << FM801_RATE_SHIFT;509 chip->cap_buf = 0;510 fm801_writew(chip, CAP_CTRL, chip->cap_ctrl);511 fm801_writew(chip, CAP_COUNT, chip->cap_count - 1);512 chip->cap_buffer = runtime->dma_addr;513 chip->cap_pos = 0;514 fm801_writel(chip, CAP_BUF1, chip->cap_buffer);515 fm801_writel(chip, CAP_BUF2,516 chip->cap_buffer + (chip->cap_count % chip->cap_size));517 spin_unlock_irq(&chip->reg_lock);518 return 0;519}520 521static snd_pcm_uframes_t snd_fm801_playback_pointer(struct snd_pcm_substream *substream)522{523 struct fm801 *chip = snd_pcm_substream_chip(substream);524 size_t ptr;525 526 if (!(chip->ply_ctrl & FM801_START))527 return 0;528 spin_lock(&chip->reg_lock);529 ptr = chip->ply_pos + (chip->ply_count - 1) - fm801_readw(chip, PLY_COUNT);530 if (fm801_readw(chip, IRQ_STATUS) & FM801_IRQ_PLAYBACK) {531 ptr += chip->ply_count;532 ptr %= chip->ply_size;533 }534 spin_unlock(&chip->reg_lock);535 return bytes_to_frames(substream->runtime, ptr);536}537 538static snd_pcm_uframes_t snd_fm801_capture_pointer(struct snd_pcm_substream *substream)539{540 struct fm801 *chip = snd_pcm_substream_chip(substream);541 size_t ptr;542 543 if (!(chip->cap_ctrl & FM801_START))544 return 0;545 spin_lock(&chip->reg_lock);546 ptr = chip->cap_pos + (chip->cap_count - 1) - fm801_readw(chip, CAP_COUNT);547 if (fm801_readw(chip, IRQ_STATUS) & FM801_IRQ_CAPTURE) {548 ptr += chip->cap_count;549 ptr %= chip->cap_size;550 }551 spin_unlock(&chip->reg_lock);552 return bytes_to_frames(substream->runtime, ptr);553}554 555static irqreturn_t snd_fm801_interrupt(int irq, void *dev_id)556{557 struct fm801 *chip = dev_id;558 unsigned short status;559 unsigned int tmp;560 561 status = fm801_readw(chip, IRQ_STATUS);562 status &= FM801_IRQ_PLAYBACK|FM801_IRQ_CAPTURE|FM801_IRQ_MPU|FM801_IRQ_VOLUME;563 if (! status)564 return IRQ_NONE;565 /* ack first */566 fm801_writew(chip, IRQ_STATUS, status);567 if (chip->pcm && (status & FM801_IRQ_PLAYBACK) && chip->playback_substream) {568 spin_lock(&chip->reg_lock);569 chip->ply_buf++;570 chip->ply_pos += chip->ply_count;571 chip->ply_pos %= chip->ply_size;572 tmp = chip->ply_pos + chip->ply_count;573 tmp %= chip->ply_size;574 if (chip->ply_buf & 1)575 fm801_writel(chip, PLY_BUF1, chip->ply_buffer + tmp);576 else577 fm801_writel(chip, PLY_BUF2, chip->ply_buffer + tmp);578 spin_unlock(&chip->reg_lock);579 snd_pcm_period_elapsed(chip->playback_substream);580 }581 if (chip->pcm && (status & FM801_IRQ_CAPTURE) && chip->capture_substream) {582 spin_lock(&chip->reg_lock);583 chip->cap_buf++;584 chip->cap_pos += chip->cap_count;585 chip->cap_pos %= chip->cap_size;586 tmp = chip->cap_pos + chip->cap_count;587 tmp %= chip->cap_size;588 if (chip->cap_buf & 1)589 fm801_writel(chip, CAP_BUF1, chip->cap_buffer + tmp);590 else591 fm801_writel(chip, CAP_BUF2, chip->cap_buffer + tmp);592 spin_unlock(&chip->reg_lock);593 snd_pcm_period_elapsed(chip->capture_substream);594 }595 if (chip->rmidi && (status & FM801_IRQ_MPU))596 snd_mpu401_uart_interrupt(irq, chip->rmidi->private_data);597 if (status & FM801_IRQ_VOLUME) {598 /* TODO */599 }600 601 return IRQ_HANDLED;602}603 604static const struct snd_pcm_hardware snd_fm801_playback =605{606 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |607 SNDRV_PCM_INFO_BLOCK_TRANSFER |608 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_RESUME |609 SNDRV_PCM_INFO_MMAP_VALID),610 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,611 .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_48000,612 .rate_min = 5500,613 .rate_max = 48000,614 .channels_min = 1,615 .channels_max = 2,616 .buffer_bytes_max = (128*1024),617 .period_bytes_min = 64,618 .period_bytes_max = (128*1024),619 .periods_min = 1,620 .periods_max = 1024,621 .fifo_size = 0,622};623 624static const struct snd_pcm_hardware snd_fm801_capture =625{626 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |627 SNDRV_PCM_INFO_BLOCK_TRANSFER |628 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_RESUME |629 SNDRV_PCM_INFO_MMAP_VALID),630 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,631 .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_48000,632 .rate_min = 5500,633 .rate_max = 48000,634 .channels_min = 1,635 .channels_max = 2,636 .buffer_bytes_max = (128*1024),637 .period_bytes_min = 64,638 .period_bytes_max = (128*1024),639 .periods_min = 1,640 .periods_max = 1024,641 .fifo_size = 0,642};643 644static int snd_fm801_playback_open(struct snd_pcm_substream *substream)645{646 struct fm801 *chip = snd_pcm_substream_chip(substream);647 struct snd_pcm_runtime *runtime = substream->runtime;648 int err;649 650 chip->playback_substream = substream;651 runtime->hw = snd_fm801_playback;652 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,653 &hw_constraints_rates);654 if (chip->multichannel) {655 runtime->hw.channels_max = 6;656 snd_pcm_hw_constraint_list(runtime, 0,657 SNDRV_PCM_HW_PARAM_CHANNELS,658 &hw_constraints_channels);659 }660 err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS);661 if (err < 0)662 return err;663 return 0;664}665 666static int snd_fm801_capture_open(struct snd_pcm_substream *substream)667{668 struct fm801 *chip = snd_pcm_substream_chip(substream);669 struct snd_pcm_runtime *runtime = substream->runtime;670 int err;671 672 chip->capture_substream = substream;673 runtime->hw = snd_fm801_capture;674 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,675 &hw_constraints_rates);676 err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS);677 if (err < 0)678 return err;679 return 0;680}681 682static int snd_fm801_playback_close(struct snd_pcm_substream *substream)683{684 struct fm801 *chip = snd_pcm_substream_chip(substream);685 686 chip->playback_substream = NULL;687 return 0;688}689 690static int snd_fm801_capture_close(struct snd_pcm_substream *substream)691{692 struct fm801 *chip = snd_pcm_substream_chip(substream);693 694 chip->capture_substream = NULL;695 return 0;696}697 698static const struct snd_pcm_ops snd_fm801_playback_ops = {699 .open = snd_fm801_playback_open,700 .close = snd_fm801_playback_close,701 .prepare = snd_fm801_playback_prepare,702 .trigger = snd_fm801_playback_trigger,703 .pointer = snd_fm801_playback_pointer,704};705 706static const struct snd_pcm_ops snd_fm801_capture_ops = {707 .open = snd_fm801_capture_open,708 .close = snd_fm801_capture_close,709 .prepare = snd_fm801_capture_prepare,710 .trigger = snd_fm801_capture_trigger,711 .pointer = snd_fm801_capture_pointer,712};713 714static int snd_fm801_pcm(struct fm801 *chip, int device)715{716 struct pci_dev *pdev = to_pci_dev(chip->dev);717 struct snd_pcm *pcm;718 int err;719 720 err = snd_pcm_new(chip->card, "FM801", device, 1, 1, &pcm);721 if (err < 0)722 return err;723 724 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_fm801_playback_ops);725 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_fm801_capture_ops);726 727 pcm->private_data = chip;728 pcm->info_flags = 0;729 strcpy(pcm->name, "FM801");730 chip->pcm = pcm;731 732 snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV, &pdev->dev,733 chip->multichannel ? 128*1024 : 64*1024, 128*1024);734 735 return snd_pcm_add_chmap_ctls(pcm, SNDRV_PCM_STREAM_PLAYBACK,736 snd_pcm_alt_chmaps,737 chip->multichannel ? 6 : 2, 0,738 NULL);739}740 741/*742 * TEA5757 radio743 */744 745#ifdef CONFIG_SND_FM801_TEA575X_BOOL746 747/* GPIO to TEA575x maps */748struct snd_fm801_tea575x_gpio {749 u8 data, clk, wren, most;750 char *name;751};752 753static const struct snd_fm801_tea575x_gpio snd_fm801_tea575x_gpios[] = {754 { .data = 1, .clk = 3, .wren = 2, .most = 0, .name = "SF256-PCS" },755 { .data = 1, .clk = 0, .wren = 2, .most = 3, .name = "SF256-PCP" },756 { .data = 2, .clk = 0, .wren = 1, .most = 3, .name = "SF64-PCR" },757};758 759#define get_tea575x_gpio(chip) \760 (&snd_fm801_tea575x_gpios[((chip)->tea575x_tuner & TUNER_TYPE_MASK) - 1])761 762static void snd_fm801_tea575x_set_pins(struct snd_tea575x *tea, u8 pins)763{764 struct fm801 *chip = tea->private_data;765 unsigned short reg = fm801_readw(chip, GPIO_CTRL);766 struct snd_fm801_tea575x_gpio gpio = *get_tea575x_gpio(chip);767 768 reg &= ~(FM801_GPIO_GP(gpio.data) |769 FM801_GPIO_GP(gpio.clk) |770 FM801_GPIO_GP(gpio.wren));771 772 reg |= (pins & TEA575X_DATA) ? FM801_GPIO_GP(gpio.data) : 0;773 reg |= (pins & TEA575X_CLK) ? FM801_GPIO_GP(gpio.clk) : 0;774 /* WRITE_ENABLE is inverted */775 reg |= (pins & TEA575X_WREN) ? 0 : FM801_GPIO_GP(gpio.wren);776 777 fm801_writew(chip, GPIO_CTRL, reg);778}779 780static u8 snd_fm801_tea575x_get_pins(struct snd_tea575x *tea)781{782 struct fm801 *chip = tea->private_data;783 unsigned short reg = fm801_readw(chip, GPIO_CTRL);784 struct snd_fm801_tea575x_gpio gpio = *get_tea575x_gpio(chip);785 u8 ret;786 787 ret = 0;788 if (reg & FM801_GPIO_GP(gpio.data))789 ret |= TEA575X_DATA;790 if (reg & FM801_GPIO_GP(gpio.most))791 ret |= TEA575X_MOST;792 return ret;793}794 795static void snd_fm801_tea575x_set_direction(struct snd_tea575x *tea, bool output)796{797 struct fm801 *chip = tea->private_data;798 unsigned short reg = fm801_readw(chip, GPIO_CTRL);799 struct snd_fm801_tea575x_gpio gpio = *get_tea575x_gpio(chip);800 801 /* use GPIO lines and set write enable bit */802 reg |= FM801_GPIO_GS(gpio.data) |803 FM801_GPIO_GS(gpio.wren) |804 FM801_GPIO_GS(gpio.clk) |805 FM801_GPIO_GS(gpio.most);806 if (output) {807 /* all of lines are in the write direction */808 /* clear data and clock lines */809 reg &= ~(FM801_GPIO_GD(gpio.data) |810 FM801_GPIO_GD(gpio.wren) |811 FM801_GPIO_GD(gpio.clk) |812 FM801_GPIO_GP(gpio.data) |813 FM801_GPIO_GP(gpio.clk) |814 FM801_GPIO_GP(gpio.wren));815 } else {816 /* use GPIO lines, set data direction to input */817 reg |= FM801_GPIO_GD(gpio.data) |818 FM801_GPIO_GD(gpio.most) |819 FM801_GPIO_GP(gpio.data) |820 FM801_GPIO_GP(gpio.most) |821 FM801_GPIO_GP(gpio.wren);822 /* all of lines are in the write direction, except data */823 /* clear data, write enable and clock lines */824 reg &= ~(FM801_GPIO_GD(gpio.wren) |825 FM801_GPIO_GD(gpio.clk) |826 FM801_GPIO_GP(gpio.clk));827 }828 829 fm801_writew(chip, GPIO_CTRL, reg);830}831 832static const struct snd_tea575x_ops snd_fm801_tea_ops = {833 .set_pins = snd_fm801_tea575x_set_pins,834 .get_pins = snd_fm801_tea575x_get_pins,835 .set_direction = snd_fm801_tea575x_set_direction,836};837#endif838 839/*840 * Mixer routines841 */842 843#define FM801_SINGLE(xname, reg, shift, mask, invert) \844{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .info = snd_fm801_info_single, \845 .get = snd_fm801_get_single, .put = snd_fm801_put_single, \846 .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24) }847 848static int snd_fm801_info_single(struct snd_kcontrol *kcontrol,849 struct snd_ctl_elem_info *uinfo)850{851 int mask = (kcontrol->private_value >> 16) & 0xff;852 853 uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;854 uinfo->count = 1;855 uinfo->value.integer.min = 0;856 uinfo->value.integer.max = mask;857 return 0;858}859 860static int snd_fm801_get_single(struct snd_kcontrol *kcontrol,861 struct snd_ctl_elem_value *ucontrol)862{863 struct fm801 *chip = snd_kcontrol_chip(kcontrol);864 int reg = kcontrol->private_value & 0xff;865 int shift = (kcontrol->private_value >> 8) & 0xff;866 int mask = (kcontrol->private_value >> 16) & 0xff;867 int invert = (kcontrol->private_value >> 24) & 0xff;868 long *value = ucontrol->value.integer.value;869 870 value[0] = (fm801_ioread16(chip, reg) >> shift) & mask;871 if (invert)872 value[0] = mask - value[0];873 return 0;874}875 876static int snd_fm801_put_single(struct snd_kcontrol *kcontrol,877 struct snd_ctl_elem_value *ucontrol)878{879 struct fm801 *chip = snd_kcontrol_chip(kcontrol);880 int reg = kcontrol->private_value & 0xff;881 int shift = (kcontrol->private_value >> 8) & 0xff;882 int mask = (kcontrol->private_value >> 16) & 0xff;883 int invert = (kcontrol->private_value >> 24) & 0xff;884 unsigned short val;885 886 val = (ucontrol->value.integer.value[0] & mask);887 if (invert)888 val = mask - val;889 return snd_fm801_update_bits(chip, reg, mask << shift, val << shift);890}891 892#define FM801_DOUBLE(xname, reg, shift_left, shift_right, mask, invert) \893{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .info = snd_fm801_info_double, \894 .get = snd_fm801_get_double, .put = snd_fm801_put_double, \895 .private_value = reg | (shift_left << 8) | (shift_right << 12) | (mask << 16) | (invert << 24) }896#define FM801_DOUBLE_TLV(xname, reg, shift_left, shift_right, mask, invert, xtlv) \897{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \898 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ, \899 .name = xname, .info = snd_fm801_info_double, \900 .get = snd_fm801_get_double, .put = snd_fm801_put_double, \901 .private_value = reg | (shift_left << 8) | (shift_right << 12) | (mask << 16) | (invert << 24), \902 .tlv = { .p = (xtlv) } }903 904static int snd_fm801_info_double(struct snd_kcontrol *kcontrol,905 struct snd_ctl_elem_info *uinfo)906{907 int mask = (kcontrol->private_value >> 16) & 0xff;908 909 uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;910 uinfo->count = 2;911 uinfo->value.integer.min = 0;912 uinfo->value.integer.max = mask;913 return 0;914}915 916static int snd_fm801_get_double(struct snd_kcontrol *kcontrol,917 struct snd_ctl_elem_value *ucontrol)918{919 struct fm801 *chip = snd_kcontrol_chip(kcontrol);920 int reg = kcontrol->private_value & 0xff;921 int shift_left = (kcontrol->private_value >> 8) & 0x0f;922 int shift_right = (kcontrol->private_value >> 12) & 0x0f;923 int mask = (kcontrol->private_value >> 16) & 0xff;924 int invert = (kcontrol->private_value >> 24) & 0xff;925 long *value = ucontrol->value.integer.value;926 927 spin_lock_irq(&chip->reg_lock);928 value[0] = (fm801_ioread16(chip, reg) >> shift_left) & mask;929 value[1] = (fm801_ioread16(chip, reg) >> shift_right) & mask;930 spin_unlock_irq(&chip->reg_lock);931 if (invert) {932 value[0] = mask - value[0];933 value[1] = mask - value[1];934 }935 return 0;936}937 938static int snd_fm801_put_double(struct snd_kcontrol *kcontrol,939 struct snd_ctl_elem_value *ucontrol)940{941 struct fm801 *chip = snd_kcontrol_chip(kcontrol);942 int reg = kcontrol->private_value & 0xff;943 int shift_left = (kcontrol->private_value >> 8) & 0x0f;944 int shift_right = (kcontrol->private_value >> 12) & 0x0f;945 int mask = (kcontrol->private_value >> 16) & 0xff;946 int invert = (kcontrol->private_value >> 24) & 0xff;947 unsigned short val1, val2;948 949 val1 = ucontrol->value.integer.value[0] & mask;950 val2 = ucontrol->value.integer.value[1] & mask;951 if (invert) {952 val1 = mask - val1;953 val2 = mask - val2;954 }955 return snd_fm801_update_bits(chip, reg,956 (mask << shift_left) | (mask << shift_right),957 (val1 << shift_left ) | (val2 << shift_right));958}959 960static int snd_fm801_info_mux(struct snd_kcontrol *kcontrol,961 struct snd_ctl_elem_info *uinfo)962{963 static const char * const texts[5] = {964 "AC97 Primary", "FM", "I2S", "PCM", "AC97 Secondary"965 };966 967 return snd_ctl_enum_info(uinfo, 1, 5, texts);968}969 970static int snd_fm801_get_mux(struct snd_kcontrol *kcontrol,971 struct snd_ctl_elem_value *ucontrol)972{973 struct fm801 *chip = snd_kcontrol_chip(kcontrol);974 unsigned short val;975 976 val = fm801_readw(chip, REC_SRC) & 7;977 if (val > 4)978 val = 4;979 ucontrol->value.enumerated.item[0] = val;980 return 0;981}982 983static int snd_fm801_put_mux(struct snd_kcontrol *kcontrol,984 struct snd_ctl_elem_value *ucontrol)985{986 struct fm801 *chip = snd_kcontrol_chip(kcontrol);987 unsigned short val;988 989 val = ucontrol->value.enumerated.item[0];990 if (val > 4)991 return -EINVAL;992 return snd_fm801_update_bits(chip, FM801_REC_SRC, 7, val);993}994 995static const DECLARE_TLV_DB_SCALE(db_scale_dsp, -3450, 150, 0);996 997#define FM801_CONTROLS ARRAY_SIZE(snd_fm801_controls)998 999static const struct snd_kcontrol_new snd_fm801_controls[] = {1000FM801_DOUBLE_TLV("Wave Playback Volume", FM801_PCM_VOL, 0, 8, 31, 1,1001 db_scale_dsp),1002FM801_SINGLE("Wave Playback Switch", FM801_PCM_VOL, 15, 1, 1),1003FM801_DOUBLE_TLV("I2S Playback Volume", FM801_I2S_VOL, 0, 8, 31, 1,1004 db_scale_dsp),1005FM801_SINGLE("I2S Playback Switch", FM801_I2S_VOL, 15, 1, 1),1006FM801_DOUBLE_TLV("FM Playback Volume", FM801_FM_VOL, 0, 8, 31, 1,1007 db_scale_dsp),1008FM801_SINGLE("FM Playback Switch", FM801_FM_VOL, 15, 1, 1),1009{1010 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,1011 .name = "Digital Capture Source",1012 .info = snd_fm801_info_mux,1013 .get = snd_fm801_get_mux,1014 .put = snd_fm801_put_mux,1015}1016};1017 1018#define FM801_CONTROLS_MULTI ARRAY_SIZE(snd_fm801_controls_multi)1019 1020static const struct snd_kcontrol_new snd_fm801_controls_multi[] = {1021FM801_SINGLE("AC97 2ch->4ch Copy Switch", FM801_CODEC_CTRL, 7, 1, 0),1022FM801_SINGLE("AC97 18-bit Switch", FM801_CODEC_CTRL, 10, 1, 0),1023FM801_SINGLE(SNDRV_CTL_NAME_IEC958("",CAPTURE,SWITCH), FM801_I2S_MODE, 8, 1, 0),1024FM801_SINGLE(SNDRV_CTL_NAME_IEC958("Raw Data ",PLAYBACK,SWITCH), FM801_I2S_MODE, 9, 1, 0),1025FM801_SINGLE(SNDRV_CTL_NAME_IEC958("Raw Data ",CAPTURE,SWITCH), FM801_I2S_MODE, 10, 1, 0),1026FM801_SINGLE(SNDRV_CTL_NAME_IEC958("",PLAYBACK,SWITCH), FM801_GEN_CTRL, 2, 1, 0),1027};1028 1029static int snd_fm801_mixer(struct fm801 *chip)1030{1031 struct snd_ac97_template ac97;1032 unsigned int i;1033 int err;1034 static const struct snd_ac97_bus_ops ops = {1035 .write = snd_fm801_codec_write,1036 .read = snd_fm801_codec_read,1037 };1038 1039 err = snd_ac97_bus(chip->card, 0, &ops, chip, &chip->ac97_bus);1040 if (err < 0)1041 return err;1042 1043 memset(&ac97, 0, sizeof(ac97));1044 ac97.private_data = chip;1045 err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97);1046 if (err < 0)1047 return err;1048 if (chip->secondary) {1049 ac97.num = 1;1050 ac97.addr = chip->secondary_addr;1051 err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97_sec);1052 if (err < 0)1053 return err;1054 }1055 for (i = 0; i < FM801_CONTROLS; i++) {1056 err = snd_ctl_add(chip->card,1057 snd_ctl_new1(&snd_fm801_controls[i], chip));1058 if (err < 0)1059 return err;1060 }1061 if (chip->multichannel) {1062 for (i = 0; i < FM801_CONTROLS_MULTI; i++) {1063 err = snd_ctl_add(chip->card,1064 snd_ctl_new1(&snd_fm801_controls_multi[i], chip));1065 if (err < 0)1066 return err;1067 }1068 }1069 return 0;1070}1071 1072/*1073 * initialization routines1074 */1075 1076static int wait_for_codec(struct fm801 *chip, unsigned int codec_id,1077 unsigned short reg, unsigned long waits)1078{1079 unsigned long timeout = jiffies + waits;1080 1081 fm801_writew(chip, AC97_CMD,1082 reg | (codec_id << FM801_AC97_ADDR_SHIFT) | FM801_AC97_READ);1083 udelay(5);1084 do {1085 if ((fm801_readw(chip, AC97_CMD) &1086 (FM801_AC97_VALID | FM801_AC97_BUSY)) == FM801_AC97_VALID)1087 return 0;1088 schedule_timeout_uninterruptible(1);1089 } while (time_after(timeout, jiffies));1090 return -EIO;1091}1092 1093static int reset_codec(struct fm801 *chip)1094{1095 /* codec cold reset + AC'97 warm reset */1096 fm801_writew(chip, CODEC_CTRL, (1 << 5) | (1 << 6));1097 fm801_readw(chip, CODEC_CTRL); /* flush posting data */1098 udelay(100);1099 fm801_writew(chip, CODEC_CTRL, 0);1100 1101 return wait_for_codec(chip, 0, AC97_RESET, msecs_to_jiffies(750));1102}1103 1104static void snd_fm801_chip_multichannel_init(struct fm801 *chip)1105{1106 unsigned short cmdw;1107 1108 if (chip->multichannel) {1109 if (chip->secondary_addr) {1110 wait_for_codec(chip, chip->secondary_addr,1111 AC97_VENDOR_ID1, msecs_to_jiffies(50));1112 } else {1113 /* my card has the secondary codec */1114 /* at address #3, so the loop is inverted */1115 int i;1116 for (i = 3; i > 0; i--) {1117 if (!wait_for_codec(chip, i, AC97_VENDOR_ID1,1118 msecs_to_jiffies(50))) {1119 cmdw = fm801_readw(chip, AC97_DATA);1120 if (cmdw != 0xffff && cmdw != 0) {1121 chip->secondary = 1;1122 chip->secondary_addr = i;1123 break;1124 }1125 }1126 }1127 }1128 1129 /* the recovery phase, it seems that probing for non-existing codec might */1130 /* cause timeout problems */1131 wait_for_codec(chip, 0, AC97_VENDOR_ID1, msecs_to_jiffies(750));1132 }1133}1134 1135static void snd_fm801_chip_init(struct fm801 *chip)1136{1137 unsigned short cmdw;1138 1139 /* init volume */1140 fm801_writew(chip, PCM_VOL, 0x0808);1141 fm801_writew(chip, FM_VOL, 0x9f1f);1142 fm801_writew(chip, I2S_VOL, 0x8808);1143 1144 /* I2S control - I2S mode */1145 fm801_writew(chip, I2S_MODE, 0x0003);1146 1147 /* interrupt setup */1148 cmdw = fm801_readw(chip, IRQ_MASK);1149 if (chip->irq < 0)1150 cmdw |= 0x00c3; /* mask everything, no PCM nor MPU */1151 else1152 cmdw &= ~0x0083; /* unmask MPU, PLAYBACK & CAPTURE */1153 fm801_writew(chip, IRQ_MASK, cmdw);1154 1155 /* interrupt clear */1156 fm801_writew(chip, IRQ_STATUS,1157 FM801_IRQ_PLAYBACK | FM801_IRQ_CAPTURE | FM801_IRQ_MPU);1158}1159 1160static void snd_fm801_free(struct snd_card *card)1161{1162 struct fm801 *chip = card->private_data;1163 unsigned short cmdw;1164 1165 /* interrupt setup - mask everything */1166 cmdw = fm801_readw(chip, IRQ_MASK);1167 cmdw |= 0x00c3;1168 fm801_writew(chip, IRQ_MASK, cmdw);1169 1170#ifdef CONFIG_SND_FM801_TEA575X_BOOL1171 if (!(chip->tea575x_tuner & TUNER_DISABLED)) {1172 snd_tea575x_exit(&chip->tea);1173 v4l2_device_unregister(&chip->v4l2_dev);1174 }1175#endif1176}1177 1178static int snd_fm801_create(struct snd_card *card,1179 struct pci_dev *pci,1180 int tea575x_tuner,1181 int radio_nr)1182{1183 struct fm801 *chip = card->private_data;1184 int err;1185 1186 err = pcim_enable_device(pci);1187 if (err < 0)1188 return err;1189 spin_lock_init(&chip->reg_lock);1190 chip->card = card;1191 chip->dev = &pci->dev;1192 chip->irq = -1;1193 chip->tea575x_tuner = tea575x_tuner;1194 err = pci_request_regions(pci, "FM801");1195 if (err < 0)1196 return err;1197 chip->port = pci_resource_start(pci, 0);1198 1199 if (pci->revision >= 0xb1) /* FM801-AU */1200 chip->multichannel = 1;1201 1202 if (!(chip->tea575x_tuner & TUNER_ONLY)) {1203 if (reset_codec(chip) < 0) {1204 dev_info(chip->card->dev,1205 "Primary AC'97 codec not found, assume SF64-PCR (tuner-only)\n");1206 chip->tea575x_tuner = 3 | TUNER_ONLY;1207 } else {1208 snd_fm801_chip_multichannel_init(chip);1209 }1210 }1211 1212 if ((chip->tea575x_tuner & TUNER_ONLY) == 0) {1213 if (devm_request_irq(&pci->dev, pci->irq, snd_fm801_interrupt,1214 IRQF_SHARED, KBUILD_MODNAME, chip)) {1215 dev_err(card->dev, "unable to grab IRQ %d\n", pci->irq);1216 return -EBUSY;1217 }1218 chip->irq = pci->irq;1219 card->sync_irq = chip->irq;1220 pci_set_master(pci);1221 }1222 1223 card->private_free = snd_fm801_free;1224 snd_fm801_chip_init(chip);1225 1226#ifdef CONFIG_SND_FM801_TEA575X_BOOL1227 err = v4l2_device_register(&pci->dev, &chip->v4l2_dev);1228 if (err < 0)1229 return err;1230 chip->tea.v4l2_dev = &chip->v4l2_dev;1231 chip->tea.radio_nr = radio_nr;1232 chip->tea.private_data = chip;1233 chip->tea.ops = &snd_fm801_tea_ops;1234 sprintf(chip->tea.bus_info, "PCI:%s", pci_name(pci));1235 if ((chip->tea575x_tuner & TUNER_TYPE_MASK) > 0 &&1236 (chip->tea575x_tuner & TUNER_TYPE_MASK) < 4) {1237 if (snd_tea575x_init(&chip->tea, THIS_MODULE)) {1238 dev_err(card->dev, "TEA575x radio not found\n");1239 return -ENODEV;1240 }1241 } else if ((chip->tea575x_tuner & TUNER_TYPE_MASK) == 0) {1242 unsigned int tuner_only = chip->tea575x_tuner & TUNER_ONLY;1243 1244 /* autodetect tuner connection */1245 for (tea575x_tuner = 1; tea575x_tuner <= 3; tea575x_tuner++) {1246 chip->tea575x_tuner = tea575x_tuner;1247 if (!snd_tea575x_init(&chip->tea, THIS_MODULE)) {1248 dev_info(card->dev,1249 "detected TEA575x radio type %s\n",1250 get_tea575x_gpio(chip)->name);1251 break;1252 }1253 }1254 if (tea575x_tuner == 4) {1255 dev_err(card->dev, "TEA575x radio not found\n");1256 chip->tea575x_tuner = TUNER_DISABLED;1257 }1258 1259 chip->tea575x_tuner |= tuner_only;1260 }1261 if (!(chip->tea575x_tuner & TUNER_DISABLED)) {1262 strscpy(chip->tea.card, get_tea575x_gpio(chip)->name,1263 sizeof(chip->tea.card));1264 }1265#endif1266 return 0;1267}1268 1269static int __snd_card_fm801_probe(struct pci_dev *pci,1270 const struct pci_device_id *pci_id)1271{1272 static int dev;1273 struct snd_card *card;1274 struct fm801 *chip;1275 struct snd_opl3 *opl3;1276 int err;1277 1278 if (dev >= SNDRV_CARDS)1279 return -ENODEV;1280 if (!enable[dev]) {1281 dev++;1282 return -ENOENT;1283 }1284 1285 err = snd_devm_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE,1286 sizeof(*chip), &card);1287 if (err < 0)1288 return err;1289 chip = card->private_data;1290 err = snd_fm801_create(card, pci, tea575x_tuner[dev], radio_nr[dev]);1291 if (err < 0)1292 return err;1293 1294 strcpy(card->driver, "FM801");1295 strcpy(card->shortname, "ForteMedia FM801-");1296 strcat(card->shortname, chip->multichannel ? "AU" : "AS");1297 sprintf(card->longname, "%s at 0x%lx, irq %i",1298 card->shortname, chip->port, chip->irq);1299 1300 if (chip->tea575x_tuner & TUNER_ONLY)1301 goto __fm801_tuner_only;1302 1303 err = snd_fm801_pcm(chip, 0);1304 if (err < 0)1305 return err;1306 err = snd_fm801_mixer(chip);1307 if (err < 0)1308 return err;1309 err = snd_mpu401_uart_new(card, 0, MPU401_HW_FM801,1310 chip->port + FM801_MPU401_DATA,1311 MPU401_INFO_INTEGRATED |1312 MPU401_INFO_IRQ_HOOK,1313 -1, &chip->rmidi);1314 if (err < 0)1315 return err;1316 err = snd_opl3_create(card, chip->port + FM801_OPL3_BANK0,1317 chip->port + FM801_OPL3_BANK1,1318 OPL3_HW_OPL3_FM801, 1, &opl3);1319 if (err < 0)1320 return err;1321 err = snd_opl3_hwdep_new(opl3, 0, 1, NULL);1322 if (err < 0)1323 return err;1324 1325 __fm801_tuner_only:1326 err = snd_card_register(card);1327 if (err < 0)1328 return err;1329 pci_set_drvdata(pci, card);1330 dev++;1331 return 0;1332}1333 1334static int snd_card_fm801_probe(struct pci_dev *pci,1335 const struct pci_device_id *pci_id)1336{1337 return snd_card_free_on_error(&pci->dev, __snd_card_fm801_probe(pci, pci_id));1338}1339 1340static const unsigned char saved_regs[] = {1341 FM801_PCM_VOL, FM801_I2S_VOL, FM801_FM_VOL, FM801_REC_SRC,1342 FM801_PLY_CTRL, FM801_PLY_COUNT, FM801_PLY_BUF1, FM801_PLY_BUF2,1343 FM801_CAP_CTRL, FM801_CAP_COUNT, FM801_CAP_BUF1, FM801_CAP_BUF2,1344 FM801_CODEC_CTRL, FM801_I2S_MODE, FM801_VOLUME, FM801_GEN_CTRL,1345};1346 1347static int snd_fm801_suspend(struct device *dev)1348{1349 struct snd_card *card = dev_get_drvdata(dev);1350 struct fm801 *chip = card->private_data;1351 int i;1352 1353 snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);1354 1355 for (i = 0; i < ARRAY_SIZE(saved_regs); i++)1356 chip->saved_regs[i] = fm801_ioread16(chip, saved_regs[i]);1357 1358 if (chip->tea575x_tuner & TUNER_ONLY) {1359 /* FIXME: tea575x suspend */1360 } else {1361 snd_ac97_suspend(chip->ac97);1362 snd_ac97_suspend(chip->ac97_sec);1363 }1364 1365 return 0;1366}1367 1368static int snd_fm801_resume(struct device *dev)1369{1370 struct snd_card *card = dev_get_drvdata(dev);1371 struct fm801 *chip = card->private_data;1372 int i;1373 1374 if (chip->tea575x_tuner & TUNER_ONLY) {1375 snd_fm801_chip_init(chip);1376 } else {1377 reset_codec(chip);1378 snd_fm801_chip_multichannel_init(chip);1379 snd_fm801_chip_init(chip);1380 snd_ac97_resume(chip->ac97);1381 snd_ac97_resume(chip->ac97_sec);1382 }1383 1384 for (i = 0; i < ARRAY_SIZE(saved_regs); i++)1385 fm801_iowrite16(chip, saved_regs[i], chip->saved_regs[i]);1386 1387#ifdef CONFIG_SND_FM801_TEA575X_BOOL1388 if (!(chip->tea575x_tuner & TUNER_DISABLED))1389 snd_tea575x_set_freq(&chip->tea);1390#endif1391 1392 snd_power_change_state(card, SNDRV_CTL_POWER_D0);1393 return 0;1394}1395 1396static DEFINE_SIMPLE_DEV_PM_OPS(snd_fm801_pm, snd_fm801_suspend, snd_fm801_resume);1397 1398static struct pci_driver fm801_driver = {1399 .name = KBUILD_MODNAME,1400 .id_table = snd_fm801_ids,1401 .probe = snd_card_fm801_probe,1402 .driver = {1403 .pm = &snd_fm801_pm,1404 },1405};1406 1407module_pci_driver(fm801_driver);1408