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1// SPDX-License-Identifier: GPL-2.0-or-later2/* 3 * Driver for NeoMagic 256AV and 256ZX chipsets.4 * Copyright (c) 2000 by Takashi Iwai <tiwai@suse.de>5 *6 * Based on nm256_audio.c OSS driver in linux kernel.7 * The original author of OSS nm256 driver wishes to remain anonymous,8 * so I just put my acknoledgment to him/her here.9 * The original author's web page is found at10 * http://www.uglx.org/sony.html11 */12 13#include <linux/io.h>14#include <linux/delay.h>15#include <linux/interrupt.h>16#include <linux/init.h>17#include <linux/pci.h>18#include <linux/slab.h>19#include <linux/module.h>20#include <linux/mutex.h>21 22#include <sound/core.h>23#include <sound/info.h>24#include <sound/control.h>25#include <sound/pcm.h>26#include <sound/ac97_codec.h>27#include <sound/initval.h>28 29#define CARD_NAME "NeoMagic 256AV/ZX"30#define DRIVER_NAME "NM256"31 32MODULE_AUTHOR("Takashi Iwai <tiwai@suse.de>");33MODULE_DESCRIPTION("NeoMagic NM256AV/ZX");34MODULE_LICENSE("GPL");35 36/*37 * some compile conditions.38 */39 40static int index = SNDRV_DEFAULT_IDX1; /* Index */41static char *id = SNDRV_DEFAULT_STR1; /* ID for this card */42static int playback_bufsize = 16;43static int capture_bufsize = 16;44static bool force_ac97; /* disabled as default */45static int buffer_top; /* not specified */46static bool use_cache; /* disabled */47static bool vaio_hack; /* disabled */48static bool reset_workaround;49static bool reset_workaround_2;50 51module_param(index, int, 0444);52MODULE_PARM_DESC(index, "Index value for " CARD_NAME " soundcard.");53module_param(id, charp, 0444);54MODULE_PARM_DESC(id, "ID string for " CARD_NAME " soundcard.");55module_param(playback_bufsize, int, 0444);56MODULE_PARM_DESC(playback_bufsize, "DAC frame size in kB for " CARD_NAME " soundcard.");57module_param(capture_bufsize, int, 0444);58MODULE_PARM_DESC(capture_bufsize, "ADC frame size in kB for " CARD_NAME " soundcard.");59module_param(force_ac97, bool, 0444);60MODULE_PARM_DESC(force_ac97, "Force to use AC97 codec for " CARD_NAME " soundcard.");61module_param(buffer_top, int, 0444);62MODULE_PARM_DESC(buffer_top, "Set the top address of audio buffer for " CARD_NAME " soundcard.");63module_param(use_cache, bool, 0444);64MODULE_PARM_DESC(use_cache, "Enable the cache for coefficient table access.");65module_param(vaio_hack, bool, 0444);66MODULE_PARM_DESC(vaio_hack, "Enable workaround for Sony VAIO notebooks.");67module_param(reset_workaround, bool, 0444);68MODULE_PARM_DESC(reset_workaround, "Enable AC97 RESET workaround for some laptops.");69module_param(reset_workaround_2, bool, 0444);70MODULE_PARM_DESC(reset_workaround_2, "Enable extended AC97 RESET workaround for some other laptops.");71 72/* just for backward compatibility */73static bool enable;74module_param(enable, bool, 0444);75 76 77 78/*79 * hw definitions80 */81 82/* The BIOS signature. */83#define NM_SIGNATURE 0x4e4d000084/* Signature mask. */85#define NM_SIG_MASK 0xffff000086 87/* Size of the second memory area. */88#define NM_PORT2_SIZE 409689 90/* The base offset of the mixer in the second memory area. */91#define NM_MIXER_OFFSET 0x60092 93/* The maximum size of a coefficient entry. */94#define NM_MAX_PLAYBACK_COEF_SIZE 0x500095#define NM_MAX_RECORD_COEF_SIZE 0x126096 97/* The interrupt register. */98#define NM_INT_REG 0xa0499/* And its bits. */100#define NM_PLAYBACK_INT 0x40101#define NM_RECORD_INT 0x100102#define NM_MISC_INT_1 0x4000103#define NM_MISC_INT_2 0x1104#define NM_ACK_INT(chip, X) snd_nm256_writew(chip, NM_INT_REG, (X) << 1)105 106/* The AV's "mixer ready" status bit and location. */107#define NM_MIXER_STATUS_OFFSET 0xa04108#define NM_MIXER_READY_MASK 0x0800109#define NM_MIXER_PRESENCE 0xa06110#define NM_PRESENCE_MASK 0x0050111#define NM_PRESENCE_VALUE 0x0040112 113/*114 * For the ZX. It uses the same interrupt register, but it holds 32115 * bits instead of 16.116 */117#define NM2_PLAYBACK_INT 0x10000118#define NM2_RECORD_INT 0x80000119#define NM2_MISC_INT_1 0x8120#define NM2_MISC_INT_2 0x2121#define NM2_ACK_INT(chip, X) snd_nm256_writel(chip, NM_INT_REG, (X))122 123/* The ZX's "mixer ready" status bit and location. */124#define NM2_MIXER_STATUS_OFFSET 0xa06125#define NM2_MIXER_READY_MASK 0x0800126 127/* The playback registers start from here. */128#define NM_PLAYBACK_REG_OFFSET 0x0129/* The record registers start from here. */130#define NM_RECORD_REG_OFFSET 0x200131 132/* The rate register is located 2 bytes from the start of the register area. */133#define NM_RATE_REG_OFFSET 2134 135/* Mono/stereo flag, number of bits on playback, and rate mask. */136#define NM_RATE_STEREO 1137#define NM_RATE_BITS_16 2138#define NM_RATE_MASK 0xf0139 140/* Playback enable register. */141#define NM_PLAYBACK_ENABLE_REG (NM_PLAYBACK_REG_OFFSET + 0x1)142#define NM_PLAYBACK_ENABLE_FLAG 1143#define NM_PLAYBACK_ONESHOT 2144#define NM_PLAYBACK_FREERUN 4145 146/* Mutes the audio output. */147#define NM_AUDIO_MUTE_REG (NM_PLAYBACK_REG_OFFSET + 0x18)148#define NM_AUDIO_MUTE_LEFT 0x8000149#define NM_AUDIO_MUTE_RIGHT 0x0080150 151/* Recording enable register. */152#define NM_RECORD_ENABLE_REG (NM_RECORD_REG_OFFSET + 0)153#define NM_RECORD_ENABLE_FLAG 1154#define NM_RECORD_FREERUN 2155 156/* coefficient buffer pointer */157#define NM_COEFF_START_OFFSET 0x1c158#define NM_COEFF_END_OFFSET 0x20159 160/* DMA buffer offsets */161#define NM_RBUFFER_START (NM_RECORD_REG_OFFSET + 0x4)162#define NM_RBUFFER_END (NM_RECORD_REG_OFFSET + 0x10)163#define NM_RBUFFER_WMARK (NM_RECORD_REG_OFFSET + 0xc)164#define NM_RBUFFER_CURRP (NM_RECORD_REG_OFFSET + 0x8)165 166#define NM_PBUFFER_START (NM_PLAYBACK_REG_OFFSET + 0x4)167#define NM_PBUFFER_END (NM_PLAYBACK_REG_OFFSET + 0x14)168#define NM_PBUFFER_WMARK (NM_PLAYBACK_REG_OFFSET + 0xc)169#define NM_PBUFFER_CURRP (NM_PLAYBACK_REG_OFFSET + 0x8)170 171struct nm256_stream {172 173 struct nm256 *chip;174 struct snd_pcm_substream *substream;175 int running;176 int suspended;177 178 u32 buf; /* offset from chip->buffer */179 int bufsize; /* buffer size in bytes */180 void __iomem *bufptr; /* mapped pointer */181 unsigned long bufptr_addr; /* physical address of the mapped pointer */182 183 int dma_size; /* buffer size of the substream in bytes */184 int period_size; /* period size in bytes */185 int periods; /* # of periods */186 int shift; /* bit shifts */187 int cur_period; /* current period # */188 189};190 191struct nm256 {192 193 struct snd_card *card;194 195 void __iomem *cport; /* control port */196 unsigned long cport_addr; /* physical address */197 198 void __iomem *buffer; /* buffer */199 unsigned long buffer_addr; /* buffer phyiscal address */200 201 u32 buffer_start; /* start offset from pci resource 0 */202 u32 buffer_end; /* end offset */203 u32 buffer_size; /* total buffer size */204 205 u32 all_coeff_buf; /* coefficient buffer */206 u32 coeff_buf[2]; /* coefficient buffer for each stream */207 208 unsigned int coeffs_current: 1; /* coeff. table is loaded? */209 unsigned int use_cache: 1; /* use one big coef. table */210 unsigned int reset_workaround: 1; /* Workaround for some laptops to avoid freeze */211 unsigned int reset_workaround_2: 1; /* Extended workaround for some other laptops to avoid freeze */212 unsigned int in_resume: 1;213 214 int mixer_base; /* register offset of ac97 mixer */215 int mixer_status_offset; /* offset of mixer status reg. */216 int mixer_status_mask; /* bit mask to test the mixer status */217 218 int irq;219 int irq_acks;220 irq_handler_t interrupt;221 int badintrcount; /* counter to check bogus interrupts */222 struct mutex irq_mutex;223 224 struct nm256_stream streams[2];225 226 struct snd_ac97 *ac97;227 unsigned short *ac97_regs; /* register caches, only for valid regs */228 229 struct snd_pcm *pcm;230 231 struct pci_dev *pci;232 233 spinlock_t reg_lock;234 235};236 237 238/*239 * include coefficient table240 */241#include "nm256_coef.c"242 243 244/*245 * PCI ids246 */247static const struct pci_device_id snd_nm256_ids[] = {248 {PCI_VDEVICE(NEOMAGIC, PCI_DEVICE_ID_NEOMAGIC_NM256AV_AUDIO), 0},249 {PCI_VDEVICE(NEOMAGIC, PCI_DEVICE_ID_NEOMAGIC_NM256ZX_AUDIO), 0},250 {PCI_VDEVICE(NEOMAGIC, PCI_DEVICE_ID_NEOMAGIC_NM256XL_PLUS_AUDIO), 0},251 {0,},252};253 254MODULE_DEVICE_TABLE(pci, snd_nm256_ids);255 256 257/*258 * lowlvel stuffs259 */260 261static inline u8262snd_nm256_readb(struct nm256 *chip, int offset)263{264 return readb(chip->cport + offset);265}266 267static inline u16268snd_nm256_readw(struct nm256 *chip, int offset)269{270 return readw(chip->cport + offset);271}272 273static inline u32274snd_nm256_readl(struct nm256 *chip, int offset)275{276 return readl(chip->cport + offset);277}278 279static inline void280snd_nm256_writeb(struct nm256 *chip, int offset, u8 val)281{282 writeb(val, chip->cport + offset);283}284 285static inline void286snd_nm256_writew(struct nm256 *chip, int offset, u16 val)287{288 writew(val, chip->cport + offset);289}290 291static inline void292snd_nm256_writel(struct nm256 *chip, int offset, u32 val)293{294 writel(val, chip->cport + offset);295}296 297static inline void298snd_nm256_write_buffer(struct nm256 *chip, const void *src, int offset, int size)299{300 offset -= chip->buffer_start;301#ifdef CONFIG_SND_DEBUG302 if (offset < 0 || offset >= chip->buffer_size) {303 dev_err(chip->card->dev,304 "write_buffer invalid offset = %d size = %d\n",305 offset, size);306 return;307 }308#endif309 memcpy_toio(chip->buffer + offset, src, size);310}311 312/*313 * coefficient handlers -- what a magic!314 */315 316static u16317snd_nm256_get_start_offset(int which)318{319 u16 offset = 0;320 while (which-- > 0)321 offset += coefficient_sizes[which];322 return offset;323}324 325static void326snd_nm256_load_one_coefficient(struct nm256 *chip, int stream, u32 port, int which)327{328 u32 coeff_buf = chip->coeff_buf[stream];329 u16 offset = snd_nm256_get_start_offset(which);330 u16 size = coefficient_sizes[which];331 332 snd_nm256_write_buffer(chip, coefficients + offset, coeff_buf, size);333 snd_nm256_writel(chip, port, coeff_buf);334 /* ??? Record seems to behave differently than playback. */335 if (stream == SNDRV_PCM_STREAM_PLAYBACK)336 size--;337 snd_nm256_writel(chip, port + 4, coeff_buf + size);338}339 340static void341snd_nm256_load_coefficient(struct nm256 *chip, int stream, int number)342{343 /* The enable register for the specified engine. */344 u32 poffset = (stream == SNDRV_PCM_STREAM_CAPTURE ?345 NM_RECORD_ENABLE_REG : NM_PLAYBACK_ENABLE_REG);346 u32 addr = NM_COEFF_START_OFFSET;347 348 addr += (stream == SNDRV_PCM_STREAM_CAPTURE ?349 NM_RECORD_REG_OFFSET : NM_PLAYBACK_REG_OFFSET);350 351 if (snd_nm256_readb(chip, poffset) & 1) {352 dev_dbg(chip->card->dev,353 "NM256: Engine was enabled while loading coefficients!\n");354 return;355 }356 357 /* The recording engine uses coefficient values 8-15. */358 number &= 7;359 if (stream == SNDRV_PCM_STREAM_CAPTURE)360 number += 8;361 362 if (! chip->use_cache) {363 snd_nm256_load_one_coefficient(chip, stream, addr, number);364 return;365 }366 if (! chip->coeffs_current) {367 snd_nm256_write_buffer(chip, coefficients, chip->all_coeff_buf,368 NM_TOTAL_COEFF_COUNT * 4);369 chip->coeffs_current = 1;370 } else {371 u32 base = chip->all_coeff_buf;372 u32 offset = snd_nm256_get_start_offset(number);373 u32 end_offset = offset + coefficient_sizes[number];374 snd_nm256_writel(chip, addr, base + offset);375 if (stream == SNDRV_PCM_STREAM_PLAYBACK)376 end_offset--;377 snd_nm256_writel(chip, addr + 4, base + end_offset);378 }379}380 381 382/* The actual rates supported by the card. */383static const unsigned int samplerates[8] = {384 8000, 11025, 16000, 22050, 24000, 32000, 44100, 48000,385};386static const struct snd_pcm_hw_constraint_list constraints_rates = {387 .count = ARRAY_SIZE(samplerates), 388 .list = samplerates,389 .mask = 0,390};391 392/*393 * return the index of the target rate394 */395static int396snd_nm256_fixed_rate(unsigned int rate)397{398 unsigned int i;399 for (i = 0; i < ARRAY_SIZE(samplerates); i++) {400 if (rate == samplerates[i])401 return i;402 }403 snd_BUG();404 return 0;405}406 407/*408 * set sample rate and format409 */410static void411snd_nm256_set_format(struct nm256 *chip, struct nm256_stream *s,412 struct snd_pcm_substream *substream)413{414 struct snd_pcm_runtime *runtime = substream->runtime;415 int rate_index = snd_nm256_fixed_rate(runtime->rate);416 unsigned char ratebits = (rate_index << 4) & NM_RATE_MASK;417 418 s->shift = 0;419 if (snd_pcm_format_width(runtime->format) == 16) {420 ratebits |= NM_RATE_BITS_16;421 s->shift++;422 }423 if (runtime->channels > 1) {424 ratebits |= NM_RATE_STEREO;425 s->shift++;426 }427 428 runtime->rate = samplerates[rate_index];429 430 switch (substream->stream) {431 case SNDRV_PCM_STREAM_PLAYBACK:432 snd_nm256_load_coefficient(chip, 0, rate_index); /* 0 = playback */433 snd_nm256_writeb(chip,434 NM_PLAYBACK_REG_OFFSET + NM_RATE_REG_OFFSET,435 ratebits);436 break;437 case SNDRV_PCM_STREAM_CAPTURE:438 snd_nm256_load_coefficient(chip, 1, rate_index); /* 1 = record */439 snd_nm256_writeb(chip,440 NM_RECORD_REG_OFFSET + NM_RATE_REG_OFFSET,441 ratebits);442 break;443 }444}445 446/* acquire interrupt */447static int snd_nm256_acquire_irq(struct nm256 *chip)448{449 mutex_lock(&chip->irq_mutex);450 if (chip->irq < 0) {451 if (request_irq(chip->pci->irq, chip->interrupt, IRQF_SHARED,452 KBUILD_MODNAME, chip)) {453 dev_err(chip->card->dev,454 "unable to grab IRQ %d\n", chip->pci->irq);455 mutex_unlock(&chip->irq_mutex);456 return -EBUSY;457 }458 chip->irq = chip->pci->irq;459 chip->card->sync_irq = chip->irq;460 }461 chip->irq_acks++;462 mutex_unlock(&chip->irq_mutex);463 return 0;464}465 466/* release interrupt */467static void snd_nm256_release_irq(struct nm256 *chip)468{469 mutex_lock(&chip->irq_mutex);470 if (chip->irq_acks > 0)471 chip->irq_acks--;472 if (chip->irq_acks == 0 && chip->irq >= 0) {473 free_irq(chip->irq, chip);474 chip->irq = -1;475 chip->card->sync_irq = -1;476 }477 mutex_unlock(&chip->irq_mutex);478}479 480/*481 * start / stop482 */483 484/* update the watermark (current period) */485static void snd_nm256_pcm_mark(struct nm256 *chip, struct nm256_stream *s, int reg)486{487 s->cur_period++;488 s->cur_period %= s->periods;489 snd_nm256_writel(chip, reg, s->buf + s->cur_period * s->period_size);490}491 492#define snd_nm256_playback_mark(chip, s) snd_nm256_pcm_mark(chip, s, NM_PBUFFER_WMARK)493#define snd_nm256_capture_mark(chip, s) snd_nm256_pcm_mark(chip, s, NM_RBUFFER_WMARK)494 495static void496snd_nm256_playback_start(struct nm256 *chip, struct nm256_stream *s,497 struct snd_pcm_substream *substream)498{499 /* program buffer pointers */500 snd_nm256_writel(chip, NM_PBUFFER_START, s->buf);501 snd_nm256_writel(chip, NM_PBUFFER_END, s->buf + s->dma_size - (1 << s->shift));502 snd_nm256_writel(chip, NM_PBUFFER_CURRP, s->buf);503 snd_nm256_playback_mark(chip, s);504 505 /* Enable playback engine and interrupts. */506 snd_nm256_writeb(chip, NM_PLAYBACK_ENABLE_REG,507 NM_PLAYBACK_ENABLE_FLAG | NM_PLAYBACK_FREERUN);508 /* Enable both channels. */509 snd_nm256_writew(chip, NM_AUDIO_MUTE_REG, 0x0);510}511 512static void513snd_nm256_capture_start(struct nm256 *chip, struct nm256_stream *s,514 struct snd_pcm_substream *substream)515{516 /* program buffer pointers */517 snd_nm256_writel(chip, NM_RBUFFER_START, s->buf);518 snd_nm256_writel(chip, NM_RBUFFER_END, s->buf + s->dma_size);519 snd_nm256_writel(chip, NM_RBUFFER_CURRP, s->buf);520 snd_nm256_capture_mark(chip, s);521 522 /* Enable playback engine and interrupts. */523 snd_nm256_writeb(chip, NM_RECORD_ENABLE_REG,524 NM_RECORD_ENABLE_FLAG | NM_RECORD_FREERUN);525}526 527/* Stop the play engine. */528static void529snd_nm256_playback_stop(struct nm256 *chip)530{531 /* Shut off sound from both channels. */532 snd_nm256_writew(chip, NM_AUDIO_MUTE_REG,533 NM_AUDIO_MUTE_LEFT | NM_AUDIO_MUTE_RIGHT);534 /* Disable play engine. */535 snd_nm256_writeb(chip, NM_PLAYBACK_ENABLE_REG, 0);536}537 538static void539snd_nm256_capture_stop(struct nm256 *chip)540{541 /* Disable recording engine. */542 snd_nm256_writeb(chip, NM_RECORD_ENABLE_REG, 0);543}544 545static int546snd_nm256_playback_trigger(struct snd_pcm_substream *substream, int cmd)547{548 struct nm256 *chip = snd_pcm_substream_chip(substream);549 struct nm256_stream *s = substream->runtime->private_data;550 int err = 0;551 552 if (snd_BUG_ON(!s))553 return -ENXIO;554 555 spin_lock(&chip->reg_lock);556 switch (cmd) {557 case SNDRV_PCM_TRIGGER_RESUME:558 s->suspended = 0;559 fallthrough;560 case SNDRV_PCM_TRIGGER_START:561 if (! s->running) {562 snd_nm256_playback_start(chip, s, substream);563 s->running = 1;564 }565 break;566 case SNDRV_PCM_TRIGGER_SUSPEND:567 s->suspended = 1;568 fallthrough;569 case SNDRV_PCM_TRIGGER_STOP:570 if (s->running) {571 snd_nm256_playback_stop(chip);572 s->running = 0;573 }574 break;575 default:576 err = -EINVAL;577 break;578 }579 spin_unlock(&chip->reg_lock);580 return err;581}582 583static int584snd_nm256_capture_trigger(struct snd_pcm_substream *substream, int cmd)585{586 struct nm256 *chip = snd_pcm_substream_chip(substream);587 struct nm256_stream *s = substream->runtime->private_data;588 int err = 0;589 590 if (snd_BUG_ON(!s))591 return -ENXIO;592 593 spin_lock(&chip->reg_lock);594 switch (cmd) {595 case SNDRV_PCM_TRIGGER_START:596 case SNDRV_PCM_TRIGGER_RESUME:597 if (! s->running) {598 snd_nm256_capture_start(chip, s, substream);599 s->running = 1;600 }601 break;602 case SNDRV_PCM_TRIGGER_STOP:603 case SNDRV_PCM_TRIGGER_SUSPEND:604 if (s->running) {605 snd_nm256_capture_stop(chip);606 s->running = 0;607 }608 break;609 default:610 err = -EINVAL;611 break;612 }613 spin_unlock(&chip->reg_lock);614 return err;615}616 617 618/*619 * prepare playback/capture channel620 */621static int snd_nm256_pcm_prepare(struct snd_pcm_substream *substream)622{623 struct nm256 *chip = snd_pcm_substream_chip(substream);624 struct snd_pcm_runtime *runtime = substream->runtime;625 struct nm256_stream *s = runtime->private_data;626 627 if (snd_BUG_ON(!s))628 return -ENXIO;629 s->dma_size = frames_to_bytes(runtime, substream->runtime->buffer_size);630 s->period_size = frames_to_bytes(runtime, substream->runtime->period_size);631 s->periods = substream->runtime->periods;632 s->cur_period = 0;633 634 spin_lock_irq(&chip->reg_lock);635 s->running = 0;636 snd_nm256_set_format(chip, s, substream);637 spin_unlock_irq(&chip->reg_lock);638 639 return 0;640}641 642 643/*644 * get the current pointer645 */646static snd_pcm_uframes_t647snd_nm256_playback_pointer(struct snd_pcm_substream *substream)648{649 struct nm256 *chip = snd_pcm_substream_chip(substream);650 struct nm256_stream *s = substream->runtime->private_data;651 unsigned long curp;652 653 if (snd_BUG_ON(!s))654 return 0;655 curp = snd_nm256_readl(chip, NM_PBUFFER_CURRP) - (unsigned long)s->buf;656 curp %= s->dma_size;657 return bytes_to_frames(substream->runtime, curp);658}659 660static snd_pcm_uframes_t661snd_nm256_capture_pointer(struct snd_pcm_substream *substream)662{663 struct nm256 *chip = snd_pcm_substream_chip(substream);664 struct nm256_stream *s = substream->runtime->private_data;665 unsigned long curp;666 667 if (snd_BUG_ON(!s))668 return 0;669 curp = snd_nm256_readl(chip, NM_RBUFFER_CURRP) - (unsigned long)s->buf;670 curp %= s->dma_size; 671 return bytes_to_frames(substream->runtime, curp);672}673 674/* Remapped I/O space can be accessible as pointer on i386 */675/* This might be changed in the future */676#ifndef __i386__677/*678 * silence / copy for playback679 */680static int681snd_nm256_playback_silence(struct snd_pcm_substream *substream,682 int channel, unsigned long pos, unsigned long count)683{684 struct snd_pcm_runtime *runtime = substream->runtime;685 struct nm256_stream *s = runtime->private_data;686 687 memset_io(s->bufptr + pos, 0, count);688 return 0;689}690 691static int692snd_nm256_playback_copy(struct snd_pcm_substream *substream,693 int channel, unsigned long pos,694 struct iov_iter *src, unsigned long count)695{696 struct snd_pcm_runtime *runtime = substream->runtime;697 struct nm256_stream *s = runtime->private_data;698 699 return copy_from_iter_toio(s->bufptr + pos, src, count);700}701 702/*703 * copy to user704 */705static int706snd_nm256_capture_copy(struct snd_pcm_substream *substream,707 int channel, unsigned long pos,708 struct iov_iter *dst, unsigned long count)709{710 struct snd_pcm_runtime *runtime = substream->runtime;711 struct nm256_stream *s = runtime->private_data;712 713 return copy_to_iter_fromio(dst, s->bufptr + pos, count);714}715 716#endif /* !__i386__ */717 718 719/*720 * update playback/capture watermarks721 */722 723/* spinlock held! */724static void725snd_nm256_playback_update(struct nm256 *chip)726{727 struct nm256_stream *s;728 729 s = &chip->streams[SNDRV_PCM_STREAM_PLAYBACK];730 if (s->running && s->substream) {731 spin_unlock(&chip->reg_lock);732 snd_pcm_period_elapsed(s->substream);733 spin_lock(&chip->reg_lock);734 snd_nm256_playback_mark(chip, s);735 }736}737 738/* spinlock held! */739static void740snd_nm256_capture_update(struct nm256 *chip)741{742 struct nm256_stream *s;743 744 s = &chip->streams[SNDRV_PCM_STREAM_CAPTURE];745 if (s->running && s->substream) {746 spin_unlock(&chip->reg_lock);747 snd_pcm_period_elapsed(s->substream);748 spin_lock(&chip->reg_lock);749 snd_nm256_capture_mark(chip, s);750 }751}752 753/*754 * hardware info755 */756static const struct snd_pcm_hardware snd_nm256_playback =757{758 .info = SNDRV_PCM_INFO_MMAP_IOMEM |SNDRV_PCM_INFO_MMAP_VALID |759 SNDRV_PCM_INFO_INTERLEAVED |760 /*SNDRV_PCM_INFO_PAUSE |*/761 SNDRV_PCM_INFO_RESUME,762 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,763 .rates = SNDRV_PCM_RATE_KNOT/*24k*/ | SNDRV_PCM_RATE_8000_48000,764 .rate_min = 8000,765 .rate_max = 48000,766 .channels_min = 1,767 .channels_max = 2,768 .periods_min = 2,769 .periods_max = 1024,770 .buffer_bytes_max = 128 * 1024,771 .period_bytes_min = 256,772 .period_bytes_max = 128 * 1024,773};774 775static const struct snd_pcm_hardware snd_nm256_capture =776{777 .info = SNDRV_PCM_INFO_MMAP_IOMEM | SNDRV_PCM_INFO_MMAP_VALID |778 SNDRV_PCM_INFO_INTERLEAVED |779 /*SNDRV_PCM_INFO_PAUSE |*/780 SNDRV_PCM_INFO_RESUME,781 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,782 .rates = SNDRV_PCM_RATE_KNOT/*24k*/ | SNDRV_PCM_RATE_8000_48000,783 .rate_min = 8000,784 .rate_max = 48000,785 .channels_min = 1,786 .channels_max = 2,787 .periods_min = 2,788 .periods_max = 1024,789 .buffer_bytes_max = 128 * 1024,790 .period_bytes_min = 256,791 .period_bytes_max = 128 * 1024,792};793 794 795/* set dma transfer size */796static int snd_nm256_pcm_hw_params(struct snd_pcm_substream *substream,797 struct snd_pcm_hw_params *hw_params)798{799 /* area and addr are already set and unchanged */800 substream->runtime->dma_bytes = params_buffer_bytes(hw_params);801 return 0;802}803 804/*805 * open806 */807static void snd_nm256_setup_stream(struct nm256 *chip, struct nm256_stream *s,808 struct snd_pcm_substream *substream,809 const struct snd_pcm_hardware *hw_ptr)810{811 struct snd_pcm_runtime *runtime = substream->runtime;812 813 s->running = 0;814 runtime->hw = *hw_ptr;815 runtime->hw.buffer_bytes_max = s->bufsize;816 runtime->hw.period_bytes_max = s->bufsize / 2;817 runtime->dma_area = (void __force *) s->bufptr;818 runtime->dma_addr = s->bufptr_addr;819 runtime->dma_bytes = s->bufsize;820 runtime->private_data = s;821 s->substream = substream;822 823 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,824 &constraints_rates);825}826 827static int828snd_nm256_playback_open(struct snd_pcm_substream *substream)829{830 struct nm256 *chip = snd_pcm_substream_chip(substream);831 832 if (snd_nm256_acquire_irq(chip) < 0)833 return -EBUSY;834 snd_nm256_setup_stream(chip, &chip->streams[SNDRV_PCM_STREAM_PLAYBACK],835 substream, &snd_nm256_playback);836 return 0;837}838 839static int840snd_nm256_capture_open(struct snd_pcm_substream *substream)841{842 struct nm256 *chip = snd_pcm_substream_chip(substream);843 844 if (snd_nm256_acquire_irq(chip) < 0)845 return -EBUSY;846 snd_nm256_setup_stream(chip, &chip->streams[SNDRV_PCM_STREAM_CAPTURE],847 substream, &snd_nm256_capture);848 return 0;849}850 851/*852 * close - we don't have to do special..853 */854static int855snd_nm256_playback_close(struct snd_pcm_substream *substream)856{857 struct nm256 *chip = snd_pcm_substream_chip(substream);858 859 snd_nm256_release_irq(chip);860 return 0;861}862 863 864static int865snd_nm256_capture_close(struct snd_pcm_substream *substream)866{867 struct nm256 *chip = snd_pcm_substream_chip(substream);868 869 snd_nm256_release_irq(chip);870 return 0;871}872 873/*874 * create a pcm instance875 */876static const struct snd_pcm_ops snd_nm256_playback_ops = {877 .open = snd_nm256_playback_open,878 .close = snd_nm256_playback_close,879 .hw_params = snd_nm256_pcm_hw_params,880 .prepare = snd_nm256_pcm_prepare,881 .trigger = snd_nm256_playback_trigger,882 .pointer = snd_nm256_playback_pointer,883#ifndef __i386__884 .copy = snd_nm256_playback_copy,885 .fill_silence = snd_nm256_playback_silence,886#endif887 .mmap = snd_pcm_lib_mmap_iomem,888};889 890static const struct snd_pcm_ops snd_nm256_capture_ops = {891 .open = snd_nm256_capture_open,892 .close = snd_nm256_capture_close,893 .hw_params = snd_nm256_pcm_hw_params,894 .prepare = snd_nm256_pcm_prepare,895 .trigger = snd_nm256_capture_trigger,896 .pointer = snd_nm256_capture_pointer,897#ifndef __i386__898 .copy = snd_nm256_capture_copy,899#endif900 .mmap = snd_pcm_lib_mmap_iomem,901};902 903static int904snd_nm256_pcm(struct nm256 *chip, int device)905{906 struct snd_pcm *pcm;907 int i, err;908 909 for (i = 0; i < 2; i++) {910 struct nm256_stream *s = &chip->streams[i];911 s->bufptr = chip->buffer + (s->buf - chip->buffer_start);912 s->bufptr_addr = chip->buffer_addr + (s->buf - chip->buffer_start);913 }914 915 err = snd_pcm_new(chip->card, chip->card->driver, device,916 1, 1, &pcm);917 if (err < 0)918 return err;919 920 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_nm256_playback_ops);921 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_nm256_capture_ops);922 923 pcm->private_data = chip;924 pcm->info_flags = 0;925 chip->pcm = pcm;926 927 return 0;928}929 930 931/* 932 * Initialize the hardware. 933 */934static void935snd_nm256_init_chip(struct nm256 *chip)936{937 /* Reset everything. */938 snd_nm256_writeb(chip, 0x0, 0x11);939 snd_nm256_writew(chip, 0x214, 0);940 /* stop sounds.. */941 //snd_nm256_playback_stop(chip);942 //snd_nm256_capture_stop(chip);943}944 945 946static irqreturn_t947snd_nm256_intr_check(struct nm256 *chip)948{949 if (chip->badintrcount++ > 1000) {950 /*951 * I'm not sure if the best thing is to stop the card from952 * playing or just release the interrupt (after all, we're in953 * a bad situation, so doing fancy stuff may not be such a good954 * idea).955 *956 * I worry about the card engine continuing to play noise957 * over and over, however--that could become a very958 * obnoxious problem. And we know that when this usually959 * happens things are fairly safe, it just means the user's960 * inserted a PCMCIA card and someone's spamming us with IRQ 9s.961 */962 if (chip->streams[SNDRV_PCM_STREAM_PLAYBACK].running)963 snd_nm256_playback_stop(chip);964 if (chip->streams[SNDRV_PCM_STREAM_CAPTURE].running)965 snd_nm256_capture_stop(chip);966 chip->badintrcount = 0;967 return IRQ_HANDLED;968 }969 return IRQ_NONE;970}971 972/* 973 * Handle a potential interrupt for the device referred to by DEV_ID. 974 *975 * I don't like the cut-n-paste job here either between the two routines,976 * but there are sufficient differences between the two interrupt handlers977 * that parameterizing it isn't all that great either. (Could use a macro,978 * I suppose...yucky bleah.)979 */980 981static irqreturn_t982snd_nm256_interrupt(int irq, void *dev_id)983{984 struct nm256 *chip = dev_id;985 u16 status;986 u8 cbyte;987 988 status = snd_nm256_readw(chip, NM_INT_REG);989 990 /* Not ours. */991 if (status == 0)992 return snd_nm256_intr_check(chip);993 994 chip->badintrcount = 0;995 996 /* Rather boring; check for individual interrupts and process them. */997 998 spin_lock(&chip->reg_lock);999 if (status & NM_PLAYBACK_INT) {1000 status &= ~NM_PLAYBACK_INT;1001 NM_ACK_INT(chip, NM_PLAYBACK_INT);1002 snd_nm256_playback_update(chip);1003 }1004 1005 if (status & NM_RECORD_INT) {1006 status &= ~NM_RECORD_INT;1007 NM_ACK_INT(chip, NM_RECORD_INT);1008 snd_nm256_capture_update(chip);1009 }1010 1011 if (status & NM_MISC_INT_1) {1012 status &= ~NM_MISC_INT_1;1013 NM_ACK_INT(chip, NM_MISC_INT_1);1014 dev_dbg(chip->card->dev, "NM256: Got misc interrupt #1\n");1015 snd_nm256_writew(chip, NM_INT_REG, 0x8000);1016 cbyte = snd_nm256_readb(chip, 0x400);1017 snd_nm256_writeb(chip, 0x400, cbyte | 2);1018 }1019 1020 if (status & NM_MISC_INT_2) {1021 status &= ~NM_MISC_INT_2;1022 NM_ACK_INT(chip, NM_MISC_INT_2);1023 dev_dbg(chip->card->dev, "NM256: Got misc interrupt #2\n");1024 cbyte = snd_nm256_readb(chip, 0x400);1025 snd_nm256_writeb(chip, 0x400, cbyte & ~2);1026 }1027 1028 /* Unknown interrupt. */1029 if (status) {1030 dev_dbg(chip->card->dev,1031 "NM256: Fire in the hole! Unknown status 0x%x\n",1032 status);1033 /* Pray. */1034 NM_ACK_INT(chip, status);1035 }1036 1037 spin_unlock(&chip->reg_lock);1038 return IRQ_HANDLED;1039}1040 1041/*1042 * Handle a potential interrupt for the device referred to by DEV_ID.1043 * This handler is for the 256ZX, and is very similar to the non-ZX1044 * routine.1045 */1046 1047static irqreturn_t1048snd_nm256_interrupt_zx(int irq, void *dev_id)1049{1050 struct nm256 *chip = dev_id;1051 u32 status;1052 u8 cbyte;1053 1054 status = snd_nm256_readl(chip, NM_INT_REG);1055 1056 /* Not ours. */1057 if (status == 0)1058 return snd_nm256_intr_check(chip);1059 1060 chip->badintrcount = 0;1061 1062 /* Rather boring; check for individual interrupts and process them. */1063 1064 spin_lock(&chip->reg_lock);1065 if (status & NM2_PLAYBACK_INT) {1066 status &= ~NM2_PLAYBACK_INT;1067 NM2_ACK_INT(chip, NM2_PLAYBACK_INT);1068 snd_nm256_playback_update(chip);1069 }1070 1071 if (status & NM2_RECORD_INT) {1072 status &= ~NM2_RECORD_INT;1073 NM2_ACK_INT(chip, NM2_RECORD_INT);1074 snd_nm256_capture_update(chip);1075 }1076 1077 if (status & NM2_MISC_INT_1) {1078 status &= ~NM2_MISC_INT_1;1079 NM2_ACK_INT(chip, NM2_MISC_INT_1);1080 dev_dbg(chip->card->dev, "NM256: Got misc interrupt #1\n");1081 cbyte = snd_nm256_readb(chip, 0x400);1082 snd_nm256_writeb(chip, 0x400, cbyte | 2);1083 }1084 1085 if (status & NM2_MISC_INT_2) {1086 status &= ~NM2_MISC_INT_2;1087 NM2_ACK_INT(chip, NM2_MISC_INT_2);1088 dev_dbg(chip->card->dev, "NM256: Got misc interrupt #2\n");1089 cbyte = snd_nm256_readb(chip, 0x400);1090 snd_nm256_writeb(chip, 0x400, cbyte & ~2);1091 }1092 1093 /* Unknown interrupt. */1094 if (status) {1095 dev_dbg(chip->card->dev,1096 "NM256: Fire in the hole! Unknown status 0x%x\n",1097 status);1098 /* Pray. */1099 NM2_ACK_INT(chip, status);1100 }1101 1102 spin_unlock(&chip->reg_lock);1103 return IRQ_HANDLED;1104}1105 1106/*1107 * AC97 interface1108 */1109 1110/*1111 * Waits for the mixer to become ready to be written; returns a zero value1112 * if it timed out.1113 */1114static int1115snd_nm256_ac97_ready(struct nm256 *chip)1116{1117 int timeout = 10;1118 u32 testaddr;1119 u16 testb;1120 1121 testaddr = chip->mixer_status_offset;1122 testb = chip->mixer_status_mask;1123 1124 /* 1125 * Loop around waiting for the mixer to become ready. 1126 */1127 while (timeout-- > 0) {1128 if ((snd_nm256_readw(chip, testaddr) & testb) == 0)1129 return 1;1130 udelay(100);1131 }1132 return 0;1133}1134 1135/* 1136 * Initial register values to be written to the AC97 mixer.1137 * While most of these are identical to the reset values, we do this1138 * so that we have most of the register contents cached--this avoids1139 * reading from the mixer directly (which seems to be problematic,1140 * probably due to ignorance).1141 */1142 1143struct initialValues {1144 unsigned short reg;1145 unsigned short value;1146};1147 1148static const struct initialValues nm256_ac97_init_val[] =1149{1150 { AC97_MASTER, 0x8000 },1151 { AC97_HEADPHONE, 0x8000 },1152 { AC97_MASTER_MONO, 0x8000 },1153 { AC97_PC_BEEP, 0x8000 },1154 { AC97_PHONE, 0x8008 },1155 { AC97_MIC, 0x8000 },1156 { AC97_LINE, 0x8808 },1157 { AC97_CD, 0x8808 },1158 { AC97_VIDEO, 0x8808 },1159 { AC97_AUX, 0x8808 },1160 { AC97_PCM, 0x8808 },1161 { AC97_REC_SEL, 0x0000 },1162 { AC97_REC_GAIN, 0x0B0B },1163 { AC97_GENERAL_PURPOSE, 0x0000 },1164 { AC97_3D_CONTROL, 0x8000 }, 1165 { AC97_VENDOR_ID1, 0x8384 },1166 { AC97_VENDOR_ID2, 0x7609 },1167};1168 1169static int nm256_ac97_idx(unsigned short reg)1170{1171 int i;1172 for (i = 0; i < ARRAY_SIZE(nm256_ac97_init_val); i++)1173 if (nm256_ac97_init_val[i].reg == reg)1174 return i;1175 return -1;1176}1177 1178/*1179 * some nm256 easily crash when reading from mixer registers1180 * thus we're treating it as a write-only mixer and cache the1181 * written values1182 */1183static unsigned short1184snd_nm256_ac97_read(struct snd_ac97 *ac97, unsigned short reg)1185{1186 struct nm256 *chip = ac97->private_data;1187 int idx = nm256_ac97_idx(reg);1188 1189 if (idx < 0)1190 return 0;1191 return chip->ac97_regs[idx];1192}1193 1194/* 1195 */1196static void1197snd_nm256_ac97_write(struct snd_ac97 *ac97,1198 unsigned short reg, unsigned short val)1199{1200 struct nm256 *chip = ac97->private_data;1201 int tries = 2;1202 int idx = nm256_ac97_idx(reg);1203 u32 base;1204 1205 if (idx < 0)1206 return;1207 1208 base = chip->mixer_base;1209 1210 snd_nm256_ac97_ready(chip);1211 1212 /* Wait for the write to take, too. */1213 while (tries-- > 0) {1214 snd_nm256_writew(chip, base + reg, val);1215 msleep(1); /* a little delay here seems better.. */1216 if (snd_nm256_ac97_ready(chip)) {1217 /* successful write: set cache */1218 chip->ac97_regs[idx] = val;1219 return;1220 }1221 }1222 dev_dbg(chip->card->dev, "nm256: ac97 codec not ready..\n");1223}1224 1225/* static resolution table */1226static const struct snd_ac97_res_table nm256_res_table[] = {1227 { AC97_MASTER, 0x1f1f },1228 { AC97_HEADPHONE, 0x1f1f },1229 { AC97_MASTER_MONO, 0x001f },1230 { AC97_PC_BEEP, 0x001f },1231 { AC97_PHONE, 0x001f },1232 { AC97_MIC, 0x001f },1233 { AC97_LINE, 0x1f1f },1234 { AC97_CD, 0x1f1f },1235 { AC97_VIDEO, 0x1f1f },1236 { AC97_AUX, 0x1f1f },1237 { AC97_PCM, 0x1f1f },1238 { AC97_REC_GAIN, 0x0f0f },1239 { } /* terminator */1240};1241 1242/* initialize the ac97 into a known state */1243static void1244snd_nm256_ac97_reset(struct snd_ac97 *ac97)1245{1246 struct nm256 *chip = ac97->private_data;1247 1248 /* Reset the mixer. 'Tis magic! */1249 snd_nm256_writeb(chip, 0x6c0, 1);1250 if (! chip->reset_workaround) {1251 /* Dell latitude LS will lock up by this */1252 snd_nm256_writeb(chip, 0x6cc, 0x87);1253 }1254 if (! chip->reset_workaround_2) {1255 /* Dell latitude CSx will lock up by this */1256 snd_nm256_writeb(chip, 0x6cc, 0x80);1257 snd_nm256_writeb(chip, 0x6cc, 0x0);1258 }1259 if (! chip->in_resume) {1260 int i;1261 for (i = 0; i < ARRAY_SIZE(nm256_ac97_init_val); i++) {1262 /* preload the cache, so as to avoid even a single1263 * read of the mixer regs1264 */1265 snd_nm256_ac97_write(ac97, nm256_ac97_init_val[i].reg,1266 nm256_ac97_init_val[i].value);1267 }1268 }1269}1270 1271/* create an ac97 mixer interface */1272static int1273snd_nm256_mixer(struct nm256 *chip)1274{1275 struct snd_ac97_bus *pbus;1276 struct snd_ac97_template ac97;1277 int err;1278 static const struct snd_ac97_bus_ops ops = {1279 .reset = snd_nm256_ac97_reset,1280 .write = snd_nm256_ac97_write,1281 .read = snd_nm256_ac97_read,1282 };1283 1284 chip->ac97_regs = devm_kcalloc(chip->card->dev,1285 ARRAY_SIZE(nm256_ac97_init_val),1286 sizeof(short), GFP_KERNEL);1287 if (! chip->ac97_regs)1288 return -ENOMEM;1289 1290 err = snd_ac97_bus(chip->card, 0, &ops, NULL, &pbus);1291 if (err < 0)1292 return err;1293 1294 memset(&ac97, 0, sizeof(ac97));1295 ac97.scaps = AC97_SCAP_AUDIO; /* we support audio! */1296 ac97.private_data = chip;1297 ac97.res_table = nm256_res_table;1298 pbus->no_vra = 1;1299 err = snd_ac97_mixer(pbus, &ac97, &chip->ac97);1300 if (err < 0)1301 return err;1302 if (! (chip->ac97->id & (0xf0000000))) {1303 /* looks like an invalid id */1304 sprintf(chip->card->mixername, "%s AC97", chip->card->driver);1305 }1306 return 0;1307}1308 1309/* 1310 * See if the signature left by the NM256 BIOS is intact; if so, we use1311 * the associated address as the end of our audio buffer in the video1312 * RAM.1313 */1314 1315static int1316snd_nm256_peek_for_sig(struct nm256 *chip)1317{1318 /* The signature is located 1K below the end of video RAM. */1319 void __iomem *temp;1320 /* Default buffer end is 5120 bytes below the top of RAM. */1321 unsigned long pointer_found = chip->buffer_end - 0x1400;1322 u32 sig;1323 1324 temp = ioremap(chip->buffer_addr + chip->buffer_end - 0x400, 16);1325 if (temp == NULL) {1326 dev_err(chip->card->dev,1327 "Unable to scan for card signature in video RAM\n");1328 return -EBUSY;1329 }1330 1331 sig = readl(temp);1332 if ((sig & NM_SIG_MASK) == NM_SIGNATURE) {1333 u32 pointer = readl(temp + 4);1334 1335 /*1336 * If it's obviously invalid, don't use it1337 */1338 if (pointer == 0xffffffff ||1339 pointer < chip->buffer_size ||1340 pointer > chip->buffer_end) {1341 dev_err(chip->card->dev,1342 "invalid signature found: 0x%x\n", pointer);1343 iounmap(temp);1344 return -ENODEV;1345 } else {1346 pointer_found = pointer;1347 dev_info(chip->card->dev,1348 "found card signature in video RAM: 0x%x\n",1349 pointer);1350 }1351 }1352 1353 iounmap(temp);1354 chip->buffer_end = pointer_found;1355 1356 return 0;1357}1358 1359/*1360 * APM event handler, so the card is properly reinitialized after a power1361 * event.1362 */1363static int nm256_suspend(struct device *dev)1364{1365 struct snd_card *card = dev_get_drvdata(dev);1366 struct nm256 *chip = card->private_data;1367 1368 snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);1369 snd_ac97_suspend(chip->ac97);1370 chip->coeffs_current = 0;1371 return 0;1372}1373 1374static int nm256_resume(struct device *dev)1375{1376 struct snd_card *card = dev_get_drvdata(dev);1377 struct nm256 *chip = card->private_data;1378 int i;1379 1380 /* Perform a full reset on the hardware */1381 chip->in_resume = 1;1382 1383 snd_nm256_init_chip(chip);1384 1385 /* restore ac97 */1386 snd_ac97_resume(chip->ac97);1387 1388 for (i = 0; i < 2; i++) {1389 struct nm256_stream *s = &chip->streams[i];1390 if (s->substream && s->suspended) {1391 spin_lock_irq(&chip->reg_lock);1392 snd_nm256_set_format(chip, s, s->substream);1393 spin_unlock_irq(&chip->reg_lock);1394 }1395 }1396 1397 snd_power_change_state(card, SNDRV_CTL_POWER_D0);1398 chip->in_resume = 0;1399 return 0;1400}1401 1402static DEFINE_SIMPLE_DEV_PM_OPS(nm256_pm, nm256_suspend, nm256_resume);1403 1404static void snd_nm256_free(struct snd_card *card)1405{1406 struct nm256 *chip = card->private_data;1407 1408 if (chip->streams[SNDRV_PCM_STREAM_PLAYBACK].running)1409 snd_nm256_playback_stop(chip);1410 if (chip->streams[SNDRV_PCM_STREAM_CAPTURE].running)1411 snd_nm256_capture_stop(chip);1412}1413 1414static int1415snd_nm256_create(struct snd_card *card, struct pci_dev *pci)1416{1417 struct nm256 *chip = card->private_data;1418 int err, pval;1419 u32 addr;1420 1421 err = pcim_enable_device(pci);1422 if (err < 0)1423 return err;1424 1425 chip->card = card;1426 chip->pci = pci;1427 chip->use_cache = use_cache;1428 spin_lock_init(&chip->reg_lock);1429 chip->irq = -1;1430 mutex_init(&chip->irq_mutex);1431 1432 /* store buffer sizes in bytes */1433 chip->streams[SNDRV_PCM_STREAM_PLAYBACK].bufsize = playback_bufsize * 1024;1434 chip->streams[SNDRV_PCM_STREAM_CAPTURE].bufsize = capture_bufsize * 1024;1435 1436 /* 1437 * The NM256 has two memory ports. The first port is nothing1438 * more than a chunk of video RAM, which is used as the I/O ring1439 * buffer. The second port has the actual juicy stuff (like the1440 * mixer and the playback engine control registers).1441 */1442 1443 chip->buffer_addr = pci_resource_start(pci, 0);1444 chip->cport_addr = pci_resource_start(pci, 1);1445 1446 err = pci_request_regions(pci, card->driver);1447 if (err < 0)1448 return err;1449 1450 /* Init the memory port info. */1451 /* remap control port (#2) */1452 chip->cport = devm_ioremap(&pci->dev, chip->cport_addr, NM_PORT2_SIZE);1453 if (!chip->cport) {1454 dev_err(card->dev, "unable to map control port %lx\n",1455 chip->cport_addr);1456 return -ENOMEM;1457 }1458 1459 if (!strcmp(card->driver, "NM256AV")) {1460 /* Ok, try to see if this is a non-AC97 version of the hardware. */1461 pval = snd_nm256_readw(chip, NM_MIXER_PRESENCE);1462 if ((pval & NM_PRESENCE_MASK) != NM_PRESENCE_VALUE) {1463 if (! force_ac97) {1464 dev_err(card->dev,1465 "no ac97 is found!\n");1466 dev_err(card->dev,1467 "force the driver to load by passing in the module parameter\n");1468 dev_err(card->dev,1469 " force_ac97=1\n");1470 dev_err(card->dev,1471 "or try sb16, opl3sa2, or cs423x drivers instead.\n");1472 return -ENXIO;1473 }1474 }1475 chip->buffer_end = 2560 * 1024;1476 chip->interrupt = snd_nm256_interrupt;1477 chip->mixer_status_offset = NM_MIXER_STATUS_OFFSET;1478 chip->mixer_status_mask = NM_MIXER_READY_MASK;1479 } else {1480 /* Not sure if there is any relevant detect for the ZX or not. */1481 if (snd_nm256_readb(chip, 0xa0b) != 0)1482 chip->buffer_end = 6144 * 1024;1483 else1484 chip->buffer_end = 4096 * 1024;1485 1486 chip->interrupt = snd_nm256_interrupt_zx;1487 chip->mixer_status_offset = NM2_MIXER_STATUS_OFFSET;1488 chip->mixer_status_mask = NM2_MIXER_READY_MASK;1489 }1490 1491 chip->buffer_size = chip->streams[SNDRV_PCM_STREAM_PLAYBACK].bufsize +1492 chip->streams[SNDRV_PCM_STREAM_CAPTURE].bufsize;1493 if (chip->use_cache)1494 chip->buffer_size += NM_TOTAL_COEFF_COUNT * 4;1495 else1496 chip->buffer_size += NM_MAX_PLAYBACK_COEF_SIZE + NM_MAX_RECORD_COEF_SIZE;1497 1498 if (buffer_top >= chip->buffer_size && buffer_top < chip->buffer_end)1499 chip->buffer_end = buffer_top;1500 else {1501 /* get buffer end pointer from signature */1502 err = snd_nm256_peek_for_sig(chip);1503 if (err < 0)1504 return err;1505 }1506 1507 chip->buffer_start = chip->buffer_end - chip->buffer_size;1508 chip->buffer_addr += chip->buffer_start;1509 1510 dev_info(card->dev, "Mapping port 1 from 0x%x - 0x%x\n",1511 chip->buffer_start, chip->buffer_end);1512 1513 chip->buffer = devm_ioremap(&pci->dev, chip->buffer_addr,1514 chip->buffer_size);1515 if (!chip->buffer) {1516 dev_err(card->dev, "unable to map ring buffer at %lx\n",1517 chip->buffer_addr);1518 return -ENOMEM;1519 }1520 1521 /* set offsets */1522 addr = chip->buffer_start;1523 chip->streams[SNDRV_PCM_STREAM_PLAYBACK].buf = addr;1524 addr += chip->streams[SNDRV_PCM_STREAM_PLAYBACK].bufsize;1525 chip->streams[SNDRV_PCM_STREAM_CAPTURE].buf = addr;1526 addr += chip->streams[SNDRV_PCM_STREAM_CAPTURE].bufsize;1527 if (chip->use_cache) {1528 chip->all_coeff_buf = addr;1529 } else {1530 chip->coeff_buf[SNDRV_PCM_STREAM_PLAYBACK] = addr;1531 addr += NM_MAX_PLAYBACK_COEF_SIZE;1532 chip->coeff_buf[SNDRV_PCM_STREAM_CAPTURE] = addr;1533 }1534 1535 /* Fixed setting. */1536 chip->mixer_base = NM_MIXER_OFFSET;1537 1538 chip->coeffs_current = 0;1539 1540 snd_nm256_init_chip(chip);1541 1542 // pci_set_master(pci); /* needed? */1543 return 0;1544}1545 1546 1547enum { NM_IGNORED, NM_RESET_WORKAROUND, NM_RESET_WORKAROUND_2 };1548 1549static const struct snd_pci_quirk nm256_quirks[] = {1550 /* HP omnibook 4150 has cs4232 codec internally */1551 SND_PCI_QUIRK(0x103c, 0x0007, "HP omnibook 4150", NM_IGNORED),1552 /* Reset workarounds to avoid lock-ups */1553 SND_PCI_QUIRK(0x104d, 0x8041, "Sony PCG-F305", NM_RESET_WORKAROUND),1554 SND_PCI_QUIRK(0x1028, 0x0080, "Dell Latitude LS", NM_RESET_WORKAROUND),1555 SND_PCI_QUIRK(0x1028, 0x0091, "Dell Latitude CSx", NM_RESET_WORKAROUND_2),1556 { } /* terminator */1557};1558 1559 1560static int snd_nm256_probe(struct pci_dev *pci,1561 const struct pci_device_id *pci_id)1562{1563 struct snd_card *card;1564 struct nm256 *chip;1565 int err;1566 const struct snd_pci_quirk *q;1567 1568 q = snd_pci_quirk_lookup(pci, nm256_quirks);1569 if (q) {1570 dev_dbg(&pci->dev, "Enabled quirk for %s.\n",1571 snd_pci_quirk_name(q));1572 switch (q->value) {1573 case NM_IGNORED:1574 dev_info(&pci->dev,1575 "The device is on the denylist. Loading stopped\n");1576 return -ENODEV;1577 case NM_RESET_WORKAROUND_2:1578 reset_workaround_2 = 1;1579 fallthrough;1580 case NM_RESET_WORKAROUND:1581 reset_workaround = 1;1582 break;1583 }1584 }1585 1586 err = snd_devm_card_new(&pci->dev, index, id, THIS_MODULE,1587 sizeof(*chip), &card);1588 if (err < 0)1589 return err;1590 chip = card->private_data;1591 1592 switch (pci->device) {1593 case PCI_DEVICE_ID_NEOMAGIC_NM256AV_AUDIO:1594 strcpy(card->driver, "NM256AV");1595 break;1596 case PCI_DEVICE_ID_NEOMAGIC_NM256ZX_AUDIO:1597 strcpy(card->driver, "NM256ZX");1598 break;1599 case PCI_DEVICE_ID_NEOMAGIC_NM256XL_PLUS_AUDIO:1600 strcpy(card->driver, "NM256XL+");1601 break;1602 default:1603 dev_err(&pci->dev, "invalid device id 0x%x\n", pci->device);1604 return -EINVAL;1605 }1606 1607 if (vaio_hack)1608 buffer_top = 0x25a800; /* this avoids conflicts with XFree86 server */1609 1610 if (playback_bufsize < 4)1611 playback_bufsize = 4;1612 if (playback_bufsize > 128)1613 playback_bufsize = 128;1614 if (capture_bufsize < 4)1615 capture_bufsize = 4;1616 if (capture_bufsize > 128)1617 capture_bufsize = 128;1618 err = snd_nm256_create(card, pci);1619 if (err < 0)1620 return err;1621 1622 if (reset_workaround) {1623 dev_dbg(&pci->dev, "reset_workaround activated\n");1624 chip->reset_workaround = 1;1625 }1626 1627 if (reset_workaround_2) {1628 dev_dbg(&pci->dev, "reset_workaround_2 activated\n");1629 chip->reset_workaround_2 = 1;1630 }1631 1632 err = snd_nm256_pcm(chip, 0);1633 if (err < 0)1634 return err;1635 err = snd_nm256_mixer(chip);1636 if (err < 0)1637 return err;1638 1639 sprintf(card->shortname, "NeoMagic %s", card->driver);1640 sprintf(card->longname, "%s at 0x%lx & 0x%lx, irq %d",1641 card->shortname,1642 chip->buffer_addr, chip->cport_addr, chip->irq);1643 1644 err = snd_card_register(card);1645 if (err < 0)1646 return err;1647 card->private_free = snd_nm256_free;1648 1649 pci_set_drvdata(pci, card);1650 return 0;1651}1652 1653static struct pci_driver nm256_driver = {1654 .name = KBUILD_MODNAME,1655 .id_table = snd_nm256_ids,1656 .probe = snd_nm256_probe,1657 .driver = {1658 .pm = &nm256_pm,1659 },1660};1661 1662module_pci_driver(nm256_driver);1663