82 lines · c
1/* SPDX-License-Identifier: GPL-2.0 */2#ifndef __ATMEL_PDMIC_H_3#define __ATMEL_PDMIC_H_4 5#include <linux/bitops.h>6 7#define PDMIC_CR 0x000000008 9#define PDMIC_CR_SWRST 0x110#define PDMIC_CR_SWRST_MASK BIT(0)11#define PDMIC_CR_SWRST_SHIFT (0)12 13#define PDMIC_CR_ENPDM_DIS 0x014#define PDMIC_CR_ENPDM_EN 0x115#define PDMIC_CR_ENPDM_MASK BIT(4)16#define PDMIC_CR_ENPDM_SHIFT (4)17 18#define PDMIC_MR 0x0000000419 20#define PDMIC_MR_CLKS_PCK 0x021#define PDMIC_MR_CLKS_GCK 0x122#define PDMIC_MR_CLKS_MASK BIT(4)23#define PDMIC_MR_CLKS_SHIFT (4)24 25#define PDMIC_MR_PRESCAL_MASK GENMASK(14, 8)26#define PDMIC_MR_PRESCAL_SHIFT (8)27 28#define PDMIC_CDR 0x0000001429 30#define PDMIC_IER 0x0000001831#define PDMIC_IER_OVRE BIT(25)32 33#define PDMIC_IDR 0x0000001c34#define PDMIC_IDR_OVRE BIT(25)35 36#define PDMIC_IMR 0x0000002037 38#define PDMIC_ISR 0x0000002439#define PDMIC_ISR_OVRE BIT(25)40 41#define PDMIC_DSPR0 0x0000005842 43#define PDMIC_DSPR0_HPFBYP_DIS 0x144#define PDMIC_DSPR0_HPFBYP_EN 0x045#define PDMIC_DSPR0_HPFBYP_MASK BIT(1)46#define PDMIC_DSPR0_HPFBYP_SHIFT (1)47 48#define PDMIC_DSPR0_SINBYP_DIS 0x149#define PDMIC_DSPR0_SINBYP_EN 0x050#define PDMIC_DSPR0_SINBYP_MASK BIT(2)51#define PDMIC_DSPR0_SINBYP_SHIFT (2)52 53#define PDMIC_DSPR0_SIZE_16_BITS 0x054#define PDMIC_DSPR0_SIZE_32_BITS 0x155#define PDMIC_DSPR0_SIZE_MASK BIT(3)56#define PDMIC_DSPR0_SIZE_SHIFT (3)57 58#define PDMIC_DSPR0_OSR_128 0x059#define PDMIC_DSPR0_OSR_64 0x160#define PDMIC_DSPR0_OSR_MASK GENMASK(6, 4)61#define PDMIC_DSPR0_OSR_SHIFT (4)62 63#define PDMIC_DSPR0_SCALE_MASK GENMASK(11, 8)64#define PDMIC_DSPR0_SCALE_SHIFT (8)65 66#define PDMIC_DSPR0_SHIFT_MASK GENMASK(15, 12)67#define PDMIC_DSPR0_SHIFT_SHIFT (12)68 69#define PDMIC_DSPR1 0x0000005c70 71#define PDMIC_DSPR1_DGAIN_MASK GENMASK(14, 0)72#define PDMIC_DSPR1_DGAIN_SHIFT (0)73 74#define PDMIC_DSPR1_OFFSET_MASK GENMASK(31, 16)75#define PDMIC_DSPR1_OFFSET_SHIFT (16)76 77#define PDMIC_WPMR 0x000000e478 79#define PDMIC_WPSR 0x000000e880 81#endif82