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1// SPDX-License-Identifier: GPL-2.0-or-later2/*3 * Driver for ADAU1701 SigmaDSP processor4 *5 * Copyright 2011 Analog Devices Inc.6 * Author: Lars-Peter Clausen <lars@metafoo.de>7 * based on an inital version by Cliff Cai <cliff.cai@analog.com>8 */9 10#include <linux/module.h>11#include <linux/init.h>12#include <linux/i2c.h>13#include <linux/delay.h>14#include <linux/slab.h>15#include <linux/of.h>16#include <linux/gpio/consumer.h>17#include <linux/regulator/consumer.h>18#include <linux/regmap.h>19#include <sound/core.h>20#include <sound/pcm.h>21#include <sound/pcm_params.h>22#include <sound/soc.h>23 24#include <linux/unaligned.h>25 26#include "sigmadsp.h"27#include "adau1701.h"28 29#define ADAU1701_SAFELOAD_DATA(i) (0x0810 + (i))30#define ADAU1701_SAFELOAD_ADDR(i) (0x0815 + (i))31 32#define ADAU1701_DSPCTRL 0x081c33#define ADAU1701_SEROCTL 0x081e34#define ADAU1701_SERICTL 0x081f35 36#define ADAU1701_AUXNPOW 0x082237#define ADAU1701_PINCONF_0 0x082038#define ADAU1701_PINCONF_1 0x082139#define ADAU1701_AUXNPOW 0x082240 41#define ADAU1701_OSCIPOW 0x082642#define ADAU1701_DACSET 0x082743 44#define ADAU1701_MAX_REGISTER 0x082845 46#define ADAU1701_DSPCTRL_CR (1 << 2)47#define ADAU1701_DSPCTRL_DAM (1 << 3)48#define ADAU1701_DSPCTRL_ADM (1 << 4)49#define ADAU1701_DSPCTRL_IST (1 << 5)50#define ADAU1701_DSPCTRL_SR_48 0x0051#define ADAU1701_DSPCTRL_SR_96 0x0152#define ADAU1701_DSPCTRL_SR_192 0x0253#define ADAU1701_DSPCTRL_SR_MASK 0x0354 55#define ADAU1701_SEROCTL_INV_LRCLK 0x200056#define ADAU1701_SEROCTL_INV_BCLK 0x100057#define ADAU1701_SEROCTL_MASTER 0x080058 59#define ADAU1701_SEROCTL_OBF16 0x000060#define ADAU1701_SEROCTL_OBF8 0x020061#define ADAU1701_SEROCTL_OBF4 0x040062#define ADAU1701_SEROCTL_OBF2 0x060063#define ADAU1701_SEROCTL_OBF_MASK 0x060064 65#define ADAU1701_SEROCTL_OLF1024 0x000066#define ADAU1701_SEROCTL_OLF512 0x008067#define ADAU1701_SEROCTL_OLF256 0x010068#define ADAU1701_SEROCTL_OLF_MASK 0x018069 70#define ADAU1701_SEROCTL_MSB_DEALY1 0x000071#define ADAU1701_SEROCTL_MSB_DEALY0 0x000472#define ADAU1701_SEROCTL_MSB_DEALY8 0x000873#define ADAU1701_SEROCTL_MSB_DEALY12 0x000c74#define ADAU1701_SEROCTL_MSB_DEALY16 0x001075#define ADAU1701_SEROCTL_MSB_DEALY_MASK 0x001c76 77#define ADAU1701_SEROCTL_WORD_LEN_24 0x000078#define ADAU1701_SEROCTL_WORD_LEN_20 0x000179#define ADAU1701_SEROCTL_WORD_LEN_16 0x000280#define ADAU1701_SEROCTL_WORD_LEN_MASK 0x000381 82#define ADAU1701_AUXNPOW_VBPD 0x4083#define ADAU1701_AUXNPOW_VRPD 0x2084 85#define ADAU1701_SERICTL_I2S 086#define ADAU1701_SERICTL_LEFTJ 187#define ADAU1701_SERICTL_TDM 288#define ADAU1701_SERICTL_RIGHTJ_24 389#define ADAU1701_SERICTL_RIGHTJ_20 490#define ADAU1701_SERICTL_RIGHTJ_18 591#define ADAU1701_SERICTL_RIGHTJ_16 692#define ADAU1701_SERICTL_MODE_MASK 793#define ADAU1701_SERICTL_INV_BCLK BIT(3)94#define ADAU1701_SERICTL_INV_LRCLK BIT(4)95 96#define ADAU1701_OSCIPOW_OPD 0x0497#define ADAU1701_DACSET_DACINIT 198 99#define ADAU1707_CLKDIV_UNSET (-1U)100 101#define ADAU1701_FIRMWARE "adau1701.bin"102 103static const char * const supply_names[] = {104 "dvdd", "avdd"105};106 107struct adau1701 {108 struct gpio_desc *gpio_nreset;109 struct gpio_descs *gpio_pll_mode;110 unsigned int dai_fmt;111 unsigned int pll_clkdiv;112 unsigned int sysclk;113 struct regmap *regmap;114 struct i2c_client *client;115 u8 pin_config[12];116 117 struct sigmadsp *sigmadsp;118 struct regulator_bulk_data supplies[ARRAY_SIZE(supply_names)];119};120 121static const struct snd_kcontrol_new adau1701_controls[] = {122 SOC_SINGLE("Master Capture Switch", ADAU1701_DSPCTRL, 4, 1, 0),123};124 125static const struct snd_soc_dapm_widget adau1701_dapm_widgets[] = {126 SND_SOC_DAPM_DAC("DAC0", "Playback", ADAU1701_AUXNPOW, 3, 1),127 SND_SOC_DAPM_DAC("DAC1", "Playback", ADAU1701_AUXNPOW, 2, 1),128 SND_SOC_DAPM_DAC("DAC2", "Playback", ADAU1701_AUXNPOW, 1, 1),129 SND_SOC_DAPM_DAC("DAC3", "Playback", ADAU1701_AUXNPOW, 0, 1),130 SND_SOC_DAPM_ADC("ADC", "Capture", ADAU1701_AUXNPOW, 7, 1),131 132 SND_SOC_DAPM_OUTPUT("OUT0"),133 SND_SOC_DAPM_OUTPUT("OUT1"),134 SND_SOC_DAPM_OUTPUT("OUT2"),135 SND_SOC_DAPM_OUTPUT("OUT3"),136 SND_SOC_DAPM_INPUT("IN0"),137 SND_SOC_DAPM_INPUT("IN1"),138};139 140static const struct snd_soc_dapm_route adau1701_dapm_routes[] = {141 { "OUT0", NULL, "DAC0" },142 { "OUT1", NULL, "DAC1" },143 { "OUT2", NULL, "DAC2" },144 { "OUT3", NULL, "DAC3" },145 146 { "ADC", NULL, "IN0" },147 { "ADC", NULL, "IN1" },148};149 150static unsigned int adau1701_register_size(struct device *dev,151 unsigned int reg)152{153 switch (reg) {154 case ADAU1701_PINCONF_0:155 case ADAU1701_PINCONF_1:156 return 3;157 case ADAU1701_DSPCTRL:158 case ADAU1701_SEROCTL:159 case ADAU1701_AUXNPOW:160 case ADAU1701_OSCIPOW:161 case ADAU1701_DACSET:162 return 2;163 case ADAU1701_SERICTL:164 return 1;165 }166 167 dev_err(dev, "Unsupported register address: %d\n", reg);168 return 0;169}170 171static bool adau1701_volatile_reg(struct device *dev, unsigned int reg)172{173 switch (reg) {174 case ADAU1701_DACSET:175 case ADAU1701_DSPCTRL:176 return true;177 default:178 return false;179 }180}181 182static int adau1701_reg_write(void *context, unsigned int reg,183 unsigned int value)184{185 struct i2c_client *client = context;186 unsigned int i;187 unsigned int size;188 uint8_t buf[5];189 int ret;190 191 size = adau1701_register_size(&client->dev, reg);192 if (size == 0)193 return -EINVAL;194 195 buf[0] = reg >> 8;196 buf[1] = reg & 0xff;197 198 for (i = size + 1; i >= 2; --i) {199 buf[i] = value;200 value >>= 8;201 }202 203 ret = i2c_master_send(client, buf, size + 2);204 if (ret == size + 2)205 return 0;206 else if (ret < 0)207 return ret;208 else209 return -EIO;210}211 212static int adau1701_reg_read(void *context, unsigned int reg,213 unsigned int *value)214{215 int ret;216 unsigned int i;217 unsigned int size;218 uint8_t send_buf[2], recv_buf[3];219 struct i2c_client *client = context;220 struct i2c_msg msgs[2];221 222 size = adau1701_register_size(&client->dev, reg);223 if (size == 0)224 return -EINVAL;225 226 send_buf[0] = reg >> 8;227 send_buf[1] = reg & 0xff;228 229 msgs[0].addr = client->addr;230 msgs[0].len = sizeof(send_buf);231 msgs[0].buf = send_buf;232 msgs[0].flags = 0;233 234 msgs[1].addr = client->addr;235 msgs[1].len = size;236 msgs[1].buf = recv_buf;237 msgs[1].flags = I2C_M_RD;238 239 ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs));240 if (ret < 0)241 return ret;242 else if (ret != ARRAY_SIZE(msgs))243 return -EIO;244 245 *value = 0;246 247 for (i = 0; i < size; i++) {248 *value <<= 8;249 *value |= recv_buf[i];250 }251 252 return 0;253}254 255static int adau1701_safeload(struct sigmadsp *sigmadsp, unsigned int addr,256 const uint8_t bytes[], size_t len)257{258 struct i2c_client *client = to_i2c_client(sigmadsp->dev);259 struct adau1701 *adau1701 = i2c_get_clientdata(client);260 unsigned int val;261 unsigned int i;262 uint8_t buf[10];263 int ret;264 265 ret = regmap_read(adau1701->regmap, ADAU1701_DSPCTRL, &val);266 if (ret)267 return ret;268 269 if (val & ADAU1701_DSPCTRL_IST)270 msleep(50);271 272 for (i = 0; i < len / 4; i++) {273 put_unaligned_le16(ADAU1701_SAFELOAD_DATA(i), buf);274 buf[2] = 0x00;275 memcpy(buf + 3, bytes + i * 4, 4);276 ret = i2c_master_send(client, buf, 7);277 if (ret < 0)278 return ret;279 else if (ret != 7)280 return -EIO;281 282 put_unaligned_le16(ADAU1701_SAFELOAD_ADDR(i), buf);283 put_unaligned_le16(addr + i, buf + 2);284 ret = i2c_master_send(client, buf, 4);285 if (ret < 0)286 return ret;287 else if (ret != 4)288 return -EIO;289 }290 291 return regmap_update_bits(adau1701->regmap, ADAU1701_DSPCTRL,292 ADAU1701_DSPCTRL_IST, ADAU1701_DSPCTRL_IST);293}294 295static const struct sigmadsp_ops adau1701_sigmadsp_ops = {296 .safeload = adau1701_safeload,297};298 299static int adau1701_reset(struct snd_soc_component *component, unsigned int clkdiv,300 unsigned int rate)301{302 struct adau1701 *adau1701 = snd_soc_component_get_drvdata(component);303 int ret;304 305 DECLARE_BITMAP(values, 2);306 sigmadsp_reset(adau1701->sigmadsp);307 308 if (clkdiv != ADAU1707_CLKDIV_UNSET && adau1701->gpio_pll_mode) {309 switch (clkdiv) {310 case 64:311 __assign_bit(0, values, 0);312 __assign_bit(1, values, 0);313 break;314 case 256:315 __assign_bit(0, values, 0);316 __assign_bit(1, values, 1);317 break;318 case 384:319 __assign_bit(0, values, 1);320 __assign_bit(1, values, 0);321 break;322 case 0: /* fallback */323 case 512:324 __assign_bit(0, values, 1);325 __assign_bit(1, values, 1);326 break;327 }328 gpiod_set_array_value_cansleep(adau1701->gpio_pll_mode->ndescs,329 adau1701->gpio_pll_mode->desc, adau1701->gpio_pll_mode->info,330 values);331 }332 333 adau1701->pll_clkdiv = clkdiv;334 335 if (adau1701->gpio_nreset) {336 gpiod_set_value_cansleep(adau1701->gpio_nreset, 0);337 /* minimum reset time is 20ns */338 udelay(1);339 gpiod_set_value_cansleep(adau1701->gpio_nreset, 1);340 /* power-up time may be as long as 85ms */341 mdelay(85);342 }343 344 /*345 * Postpone the firmware download to a point in time when we346 * know the correct PLL setup347 */348 if (clkdiv != ADAU1707_CLKDIV_UNSET) {349 ret = sigmadsp_setup(adau1701->sigmadsp, rate);350 if (ret) {351 dev_warn(component->dev, "Failed to load firmware\n");352 return ret;353 }354 }355 356 regmap_write(adau1701->regmap, ADAU1701_DACSET, ADAU1701_DACSET_DACINIT);357 regmap_write(adau1701->regmap, ADAU1701_DSPCTRL, ADAU1701_DSPCTRL_CR);358 359 regcache_mark_dirty(adau1701->regmap);360 regcache_sync(adau1701->regmap);361 362 return 0;363}364 365static int adau1701_set_capture_pcm_format(struct snd_soc_component *component,366 struct snd_pcm_hw_params *params)367{368 struct adau1701 *adau1701 = snd_soc_component_get_drvdata(component);369 unsigned int mask = ADAU1701_SEROCTL_WORD_LEN_MASK;370 unsigned int val;371 372 switch (params_width(params)) {373 case 16:374 val = ADAU1701_SEROCTL_WORD_LEN_16;375 break;376 case 20:377 val = ADAU1701_SEROCTL_WORD_LEN_20;378 break;379 case 24:380 val = ADAU1701_SEROCTL_WORD_LEN_24;381 break;382 default:383 return -EINVAL;384 }385 386 if (adau1701->dai_fmt == SND_SOC_DAIFMT_RIGHT_J) {387 switch (params_width(params)) {388 case 16:389 val |= ADAU1701_SEROCTL_MSB_DEALY16;390 break;391 case 20:392 val |= ADAU1701_SEROCTL_MSB_DEALY12;393 break;394 case 24:395 val |= ADAU1701_SEROCTL_MSB_DEALY8;396 break;397 }398 mask |= ADAU1701_SEROCTL_MSB_DEALY_MASK;399 }400 401 regmap_update_bits(adau1701->regmap, ADAU1701_SEROCTL, mask, val);402 403 return 0;404}405 406static int adau1701_set_playback_pcm_format(struct snd_soc_component *component,407 struct snd_pcm_hw_params *params)408{409 struct adau1701 *adau1701 = snd_soc_component_get_drvdata(component);410 unsigned int val;411 412 if (adau1701->dai_fmt != SND_SOC_DAIFMT_RIGHT_J)413 return 0;414 415 switch (params_width(params)) {416 case 16:417 val = ADAU1701_SERICTL_RIGHTJ_16;418 break;419 case 20:420 val = ADAU1701_SERICTL_RIGHTJ_20;421 break;422 case 24:423 val = ADAU1701_SERICTL_RIGHTJ_24;424 break;425 default:426 return -EINVAL;427 }428 429 regmap_update_bits(adau1701->regmap, ADAU1701_SERICTL,430 ADAU1701_SERICTL_MODE_MASK, val);431 432 return 0;433}434 435static int adau1701_hw_params(struct snd_pcm_substream *substream,436 struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)437{438 struct snd_soc_component *component = dai->component;439 struct adau1701 *adau1701 = snd_soc_component_get_drvdata(component);440 unsigned int clkdiv = adau1701->sysclk / params_rate(params);441 unsigned int val;442 int ret;443 444 /*445 * If the mclk/lrclk ratio changes, the chip needs updated PLL446 * mode GPIO settings, and a full reset cycle, including a new447 * firmware upload.448 */449 if (clkdiv != adau1701->pll_clkdiv) {450 ret = adau1701_reset(component, clkdiv, params_rate(params));451 if (ret < 0)452 return ret;453 }454 455 switch (params_rate(params)) {456 case 192000:457 val = ADAU1701_DSPCTRL_SR_192;458 break;459 case 96000:460 val = ADAU1701_DSPCTRL_SR_96;461 break;462 case 48000:463 val = ADAU1701_DSPCTRL_SR_48;464 break;465 default:466 return -EINVAL;467 }468 469 regmap_update_bits(adau1701->regmap, ADAU1701_DSPCTRL,470 ADAU1701_DSPCTRL_SR_MASK, val);471 472 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)473 return adau1701_set_playback_pcm_format(component, params);474 else475 return adau1701_set_capture_pcm_format(component, params);476}477 478static int adau1701_set_dai_fmt(struct snd_soc_dai *codec_dai,479 unsigned int fmt)480{481 struct snd_soc_component *component = codec_dai->component;482 struct adau1701 *adau1701 = snd_soc_component_get_drvdata(component);483 unsigned int serictl = 0x00, seroctl = 0x00;484 bool invert_lrclk;485 486 switch (fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) {487 case SND_SOC_DAIFMT_CBP_CFP:488 /* master, 64-bits per sample, 1 frame per sample */489 seroctl |= ADAU1701_SEROCTL_MASTER | ADAU1701_SEROCTL_OBF16490 | ADAU1701_SEROCTL_OLF1024;491 break;492 case SND_SOC_DAIFMT_CBC_CFC:493 break;494 default:495 return -EINVAL;496 }497 498 /* clock inversion */499 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {500 case SND_SOC_DAIFMT_NB_NF:501 invert_lrclk = false;502 break;503 case SND_SOC_DAIFMT_NB_IF:504 invert_lrclk = true;505 break;506 case SND_SOC_DAIFMT_IB_NF:507 invert_lrclk = false;508 serictl |= ADAU1701_SERICTL_INV_BCLK;509 seroctl |= ADAU1701_SEROCTL_INV_BCLK;510 break;511 case SND_SOC_DAIFMT_IB_IF:512 invert_lrclk = true;513 serictl |= ADAU1701_SERICTL_INV_BCLK;514 seroctl |= ADAU1701_SEROCTL_INV_BCLK;515 break;516 default:517 return -EINVAL;518 }519 520 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {521 case SND_SOC_DAIFMT_I2S:522 break;523 case SND_SOC_DAIFMT_LEFT_J:524 serictl |= ADAU1701_SERICTL_LEFTJ;525 seroctl |= ADAU1701_SEROCTL_MSB_DEALY0;526 invert_lrclk = !invert_lrclk;527 break;528 case SND_SOC_DAIFMT_RIGHT_J:529 serictl |= ADAU1701_SERICTL_RIGHTJ_24;530 seroctl |= ADAU1701_SEROCTL_MSB_DEALY8;531 invert_lrclk = !invert_lrclk;532 break;533 default:534 return -EINVAL;535 }536 537 if (invert_lrclk) {538 seroctl |= ADAU1701_SEROCTL_INV_LRCLK;539 serictl |= ADAU1701_SERICTL_INV_LRCLK;540 }541 542 adau1701->dai_fmt = fmt & SND_SOC_DAIFMT_FORMAT_MASK;543 544 regmap_write(adau1701->regmap, ADAU1701_SERICTL, serictl);545 regmap_update_bits(adau1701->regmap, ADAU1701_SEROCTL,546 ~ADAU1701_SEROCTL_WORD_LEN_MASK, seroctl);547 548 return 0;549}550 551static int adau1701_set_bias_level(struct snd_soc_component *component,552 enum snd_soc_bias_level level)553{554 unsigned int mask = ADAU1701_AUXNPOW_VBPD | ADAU1701_AUXNPOW_VRPD;555 struct adau1701 *adau1701 = snd_soc_component_get_drvdata(component);556 557 switch (level) {558 case SND_SOC_BIAS_ON:559 break;560 case SND_SOC_BIAS_PREPARE:561 break;562 case SND_SOC_BIAS_STANDBY:563 /* Enable VREF and VREF buffer */564 regmap_update_bits(adau1701->regmap,565 ADAU1701_AUXNPOW, mask, 0x00);566 break;567 case SND_SOC_BIAS_OFF:568 /* Disable VREF and VREF buffer */569 regmap_update_bits(adau1701->regmap,570 ADAU1701_AUXNPOW, mask, mask);571 break;572 }573 574 return 0;575}576 577static int adau1701_mute_stream(struct snd_soc_dai *dai, int mute, int direction)578{579 struct snd_soc_component *component = dai->component;580 unsigned int mask = ADAU1701_DSPCTRL_DAM;581 struct adau1701 *adau1701 = snd_soc_component_get_drvdata(component);582 unsigned int val;583 584 if (mute)585 val = 0;586 else587 val = mask;588 589 regmap_update_bits(adau1701->regmap, ADAU1701_DSPCTRL, mask, val);590 591 return 0;592}593 594static int adau1701_set_sysclk(struct snd_soc_component *component, int clk_id,595 int source, unsigned int freq, int dir)596{597 unsigned int val;598 struct adau1701 *adau1701 = snd_soc_component_get_drvdata(component);599 600 switch (clk_id) {601 case ADAU1701_CLK_SRC_OSC:602 val = 0x0;603 break;604 case ADAU1701_CLK_SRC_MCLK:605 val = ADAU1701_OSCIPOW_OPD;606 break;607 default:608 return -EINVAL;609 }610 611 regmap_update_bits(adau1701->regmap, ADAU1701_OSCIPOW,612 ADAU1701_OSCIPOW_OPD, val);613 adau1701->sysclk = freq;614 615 return 0;616}617 618static int adau1701_startup(struct snd_pcm_substream *substream,619 struct snd_soc_dai *dai)620{621 struct adau1701 *adau1701 = snd_soc_component_get_drvdata(dai->component);622 623 return sigmadsp_restrict_params(adau1701->sigmadsp, substream);624}625 626#define ADAU1701_RATES (SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_96000 | \627 SNDRV_PCM_RATE_192000)628 629#define ADAU1701_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\630 SNDRV_PCM_FMTBIT_S24_LE)631 632static const struct snd_soc_dai_ops adau1701_dai_ops = {633 .set_fmt = adau1701_set_dai_fmt,634 .hw_params = adau1701_hw_params,635 .mute_stream = adau1701_mute_stream,636 .startup = adau1701_startup,637 .no_capture_mute = 1,638};639 640static struct snd_soc_dai_driver adau1701_dai = {641 .name = "adau1701",642 .playback = {643 .stream_name = "Playback",644 .channels_min = 2,645 .channels_max = 8,646 .rates = ADAU1701_RATES,647 .formats = ADAU1701_FORMATS,648 },649 .capture = {650 .stream_name = "Capture",651 .channels_min = 2,652 .channels_max = 8,653 .rates = ADAU1701_RATES,654 .formats = ADAU1701_FORMATS,655 },656 .ops = &adau1701_dai_ops,657 .symmetric_rate = 1,658};659 660#ifdef CONFIG_OF661static const struct of_device_id adau1701_dt_ids[] = {662 { .compatible = "adi,adau1701", },663 { }664};665MODULE_DEVICE_TABLE(of, adau1701_dt_ids);666#endif667 668static int adau1701_probe(struct snd_soc_component *component)669{670 int i, ret;671 unsigned int val;672 struct adau1701 *adau1701 = snd_soc_component_get_drvdata(component);673 674 ret = sigmadsp_attach(adau1701->sigmadsp, component);675 if (ret)676 return ret;677 678 ret = regulator_bulk_enable(ARRAY_SIZE(adau1701->supplies),679 adau1701->supplies);680 if (ret < 0) {681 dev_err(component->dev, "Failed to enable regulators: %d\n", ret);682 return ret;683 }684 685 /*686 * Let the pll_clkdiv variable default to something that won't happen687 * at runtime. That way, we can postpone the firmware download from688 * adau1701_reset() to a point in time when we know the correct PLL689 * mode parameters.690 */691 adau1701->pll_clkdiv = ADAU1707_CLKDIV_UNSET;692 693 /* initalize with pre-configured pll mode settings */694 ret = adau1701_reset(component, adau1701->pll_clkdiv, 0);695 if (ret < 0)696 goto exit_regulators_disable;697 698 /* set up pin config */699 val = 0;700 for (i = 0; i < 6; i++)701 val |= adau1701->pin_config[i] << (i * 4);702 703 regmap_write(adau1701->regmap, ADAU1701_PINCONF_0, val);704 705 val = 0;706 for (i = 0; i < 6; i++)707 val |= adau1701->pin_config[i + 6] << (i * 4);708 709 regmap_write(adau1701->regmap, ADAU1701_PINCONF_1, val);710 711 return 0;712 713exit_regulators_disable:714 715 regulator_bulk_disable(ARRAY_SIZE(adau1701->supplies), adau1701->supplies);716 return ret;717}718 719static void adau1701_remove(struct snd_soc_component *component)720{721 struct adau1701 *adau1701 = snd_soc_component_get_drvdata(component);722 723 if (adau1701->gpio_nreset)724 gpiod_set_value_cansleep(adau1701->gpio_nreset, 0);725 726 regulator_bulk_disable(ARRAY_SIZE(adau1701->supplies), adau1701->supplies);727}728 729#ifdef CONFIG_PM730static int adau1701_suspend(struct snd_soc_component *component)731{732 struct adau1701 *adau1701 = snd_soc_component_get_drvdata(component);733 734 regulator_bulk_disable(ARRAY_SIZE(adau1701->supplies),735 adau1701->supplies);736 737 return 0;738}739 740static int adau1701_resume(struct snd_soc_component *component)741{742 struct adau1701 *adau1701 = snd_soc_component_get_drvdata(component);743 int ret;744 745 ret = regulator_bulk_enable(ARRAY_SIZE(adau1701->supplies),746 adau1701->supplies);747 if (ret < 0) {748 dev_err(component->dev, "Failed to enable regulators: %d\n", ret);749 return ret;750 }751 752 return adau1701_reset(component, adau1701->pll_clkdiv, 0);753}754#else755#define adau1701_resume NULL756#define adau1701_suspend NULL757#endif /* CONFIG_PM */758 759static const struct snd_soc_component_driver adau1701_component_drv = {760 .probe = adau1701_probe,761 .remove = adau1701_remove,762 .resume = adau1701_resume,763 .suspend = adau1701_suspend,764 .set_bias_level = adau1701_set_bias_level,765 .controls = adau1701_controls,766 .num_controls = ARRAY_SIZE(adau1701_controls),767 .dapm_widgets = adau1701_dapm_widgets,768 .num_dapm_widgets = ARRAY_SIZE(adau1701_dapm_widgets),769 .dapm_routes = adau1701_dapm_routes,770 .num_dapm_routes = ARRAY_SIZE(adau1701_dapm_routes),771 .set_sysclk = adau1701_set_sysclk,772 .use_pmdown_time = 1,773 .endianness = 1,774};775 776static const struct regmap_config adau1701_regmap = {777 .reg_bits = 16,778 .val_bits = 32,779 .max_register = ADAU1701_MAX_REGISTER,780 .cache_type = REGCACHE_MAPLE,781 .volatile_reg = adau1701_volatile_reg,782 .reg_write = adau1701_reg_write,783 .reg_read = adau1701_reg_read,784};785 786static int adau1701_i2c_probe(struct i2c_client *client)787{788 struct adau1701 *adau1701;789 struct device *dev = &client->dev;790 int ret, i;791 792 adau1701 = devm_kzalloc(dev, sizeof(*adau1701), GFP_KERNEL);793 if (!adau1701)794 return -ENOMEM;795 796 for (i = 0; i < ARRAY_SIZE(supply_names); i++)797 adau1701->supplies[i].supply = supply_names[i];798 799 ret = devm_regulator_bulk_get(dev, ARRAY_SIZE(adau1701->supplies),800 adau1701->supplies);801 if (ret < 0) {802 dev_err(dev, "Failed to get regulators: %d\n", ret);803 return ret;804 }805 806 ret = regulator_bulk_enable(ARRAY_SIZE(adau1701->supplies),807 adau1701->supplies);808 if (ret < 0) {809 dev_err(dev, "Failed to enable regulators: %d\n", ret);810 return ret;811 }812 813 adau1701->client = client;814 adau1701->regmap = devm_regmap_init(dev, NULL, client,815 &adau1701_regmap);816 if (IS_ERR(adau1701->regmap)) {817 ret = PTR_ERR(adau1701->regmap);818 goto exit_regulators_disable;819 }820 821 822 if (dev->of_node) {823 of_property_read_u32(dev->of_node, "adi,pll-clkdiv",824 &adau1701->pll_clkdiv);825 826 of_property_read_u8_array(dev->of_node, "adi,pin-config",827 adau1701->pin_config,828 ARRAY_SIZE(adau1701->pin_config));829 }830 831 adau1701->gpio_nreset = devm_gpiod_get_optional(dev, "reset", GPIOD_IN);832 833 if (IS_ERR(adau1701->gpio_nreset)) {834 ret = PTR_ERR(adau1701->gpio_nreset);835 goto exit_regulators_disable;836 }837 838 adau1701->gpio_pll_mode = devm_gpiod_get_array_optional(dev, "adi,pll-mode", GPIOD_OUT_LOW);839 840 if (IS_ERR(adau1701->gpio_pll_mode)) {841 ret = PTR_ERR(adau1701->gpio_pll_mode);842 goto exit_regulators_disable;843 }844 845 i2c_set_clientdata(client, adau1701);846 847 adau1701->sigmadsp = devm_sigmadsp_init_i2c(client,848 &adau1701_sigmadsp_ops, ADAU1701_FIRMWARE);849 if (IS_ERR(adau1701->sigmadsp)) {850 ret = PTR_ERR(adau1701->sigmadsp);851 goto exit_regulators_disable;852 }853 854 ret = devm_snd_soc_register_component(&client->dev,855 &adau1701_component_drv,856 &adau1701_dai, 1);857 858exit_regulators_disable:859 860 regulator_bulk_disable(ARRAY_SIZE(adau1701->supplies), adau1701->supplies);861 return ret;862}863 864static const struct i2c_device_id adau1701_i2c_id[] = {865 { "adau1401" },866 { "adau1401a" },867 { "adau1701" },868 { "adau1702" },869 { }870};871MODULE_DEVICE_TABLE(i2c, adau1701_i2c_id);872 873static struct i2c_driver adau1701_i2c_driver = {874 .driver = {875 .name = "adau1701",876 .of_match_table = of_match_ptr(adau1701_dt_ids),877 },878 .probe = adau1701_i2c_probe,879 .id_table = adau1701_i2c_id,880};881 882module_i2c_driver(adau1701_i2c_driver);883 884MODULE_DESCRIPTION("ASoC ADAU1701 SigmaDSP driver");885MODULE_AUTHOR("Cliff Cai <cliff.cai@analog.com>");886MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");887MODULE_LICENSE("GPL");888