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1// SPDX-License-Identifier: GPL-2.0-only2//3// Driver for Cirrus Logic CS35L56 smart amp4//5// Copyright (C) 2023 Cirrus Logic, Inc. and6// Cirrus Logic International Semiconductor Ltd.7 8#include <linux/acpi.h>9#include <linux/array_size.h>10#include <linux/completion.h>11#include <linux/debugfs.h>12#include <linux/delay.h>13#include <linux/err.h>14#include <linux/gpio/consumer.h>15#include <linux/interrupt.h>16#include <linux/math.h>17#include <linux/module.h>18#include <linux/pm.h>19#include <linux/pm_runtime.h>20#include <linux/property.h>21#include <linux/regmap.h>22#include <linux/regulator/consumer.h>23#include <linux/slab.h>24#include <linux/soundwire/sdw.h>25#include <linux/types.h>26#include <linux/workqueue.h>27#include <sound/cs-amp-lib.h>28#include <sound/pcm.h>29#include <sound/pcm_params.h>30#include <sound/soc.h>31#include <sound/soc-dapm.h>32#include <sound/tlv.h>33 34#include "wm_adsp.h"35#include "cs35l56.h"36 37static int cs35l56_dsp_event(struct snd_soc_dapm_widget *w,38 struct snd_kcontrol *kcontrol, int event);39 40static void cs35l56_wait_dsp_ready(struct cs35l56_private *cs35l56)41{42 /* Wait for patching to complete */43 flush_work(&cs35l56->dsp_work);44}45 46static int cs35l56_dspwait_get_volsw(struct snd_kcontrol *kcontrol,47 struct snd_ctl_elem_value *ucontrol)48{49 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);50 struct cs35l56_private *cs35l56 = snd_soc_component_get_drvdata(component);51 52 cs35l56_wait_dsp_ready(cs35l56);53 return snd_soc_get_volsw(kcontrol, ucontrol);54}55 56static int cs35l56_dspwait_put_volsw(struct snd_kcontrol *kcontrol,57 struct snd_ctl_elem_value *ucontrol)58{59 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);60 struct cs35l56_private *cs35l56 = snd_soc_component_get_drvdata(component);61 62 cs35l56_wait_dsp_ready(cs35l56);63 return snd_soc_put_volsw(kcontrol, ucontrol);64}65 66static DECLARE_TLV_DB_SCALE(vol_tlv, -10000, 25, 0);67 68static const struct snd_kcontrol_new cs35l56_controls[] = {69 SOC_SINGLE_EXT("Speaker Switch",70 CS35L56_MAIN_RENDER_USER_MUTE, 0, 1, 1,71 cs35l56_dspwait_get_volsw, cs35l56_dspwait_put_volsw),72 SOC_SINGLE_S_EXT_TLV("Speaker Volume",73 CS35L56_MAIN_RENDER_USER_VOLUME,74 CS35L56_MAIN_RENDER_USER_VOLUME_SHIFT,75 CS35L56_MAIN_RENDER_USER_VOLUME_MIN,76 CS35L56_MAIN_RENDER_USER_VOLUME_MAX,77 CS35L56_MAIN_RENDER_USER_VOLUME_SIGNBIT,78 0,79 cs35l56_dspwait_get_volsw,80 cs35l56_dspwait_put_volsw,81 vol_tlv),82 SOC_SINGLE_EXT("Posture Number", CS35L56_MAIN_POSTURE_NUMBER,83 0, 255, 0,84 cs35l56_dspwait_get_volsw, cs35l56_dspwait_put_volsw),85};86 87static SOC_VALUE_ENUM_SINGLE_DECL(cs35l56_asp1tx1_enum,88 CS35L56_ASP1TX1_INPUT,89 0, CS35L56_ASP_TXn_SRC_MASK,90 cs35l56_tx_input_texts,91 cs35l56_tx_input_values);92 93static const struct snd_kcontrol_new asp1_tx1_mux =94 SOC_DAPM_ENUM("ASP1TX1 SRC", cs35l56_asp1tx1_enum);95 96static SOC_VALUE_ENUM_SINGLE_DECL(cs35l56_asp1tx2_enum,97 CS35L56_ASP1TX2_INPUT,98 0, CS35L56_ASP_TXn_SRC_MASK,99 cs35l56_tx_input_texts,100 cs35l56_tx_input_values);101 102static const struct snd_kcontrol_new asp1_tx2_mux =103 SOC_DAPM_ENUM("ASP1TX2 SRC", cs35l56_asp1tx2_enum);104 105static SOC_VALUE_ENUM_SINGLE_DECL(cs35l56_asp1tx3_enum,106 CS35L56_ASP1TX3_INPUT,107 0, CS35L56_ASP_TXn_SRC_MASK,108 cs35l56_tx_input_texts,109 cs35l56_tx_input_values);110 111static const struct snd_kcontrol_new asp1_tx3_mux =112 SOC_DAPM_ENUM("ASP1TX3 SRC", cs35l56_asp1tx3_enum);113 114static SOC_VALUE_ENUM_SINGLE_DECL(cs35l56_asp1tx4_enum,115 CS35L56_ASP1TX4_INPUT,116 0, CS35L56_ASP_TXn_SRC_MASK,117 cs35l56_tx_input_texts,118 cs35l56_tx_input_values);119 120static const struct snd_kcontrol_new asp1_tx4_mux =121 SOC_DAPM_ENUM("ASP1TX4 SRC", cs35l56_asp1tx4_enum);122 123static SOC_VALUE_ENUM_SINGLE_DECL(cs35l56_sdw1tx1_enum,124 CS35L56_SWIRE_DP3_CH1_INPUT,125 0, CS35L56_SWIRETXn_SRC_MASK,126 cs35l56_tx_input_texts,127 cs35l56_tx_input_values);128 129static const struct snd_kcontrol_new sdw1_tx1_mux =130 SOC_DAPM_ENUM("SDW1TX1 SRC", cs35l56_sdw1tx1_enum);131 132static SOC_VALUE_ENUM_SINGLE_DECL(cs35l56_sdw1tx2_enum,133 CS35L56_SWIRE_DP3_CH2_INPUT,134 0, CS35L56_SWIRETXn_SRC_MASK,135 cs35l56_tx_input_texts,136 cs35l56_tx_input_values);137 138static const struct snd_kcontrol_new sdw1_tx2_mux =139 SOC_DAPM_ENUM("SDW1TX2 SRC", cs35l56_sdw1tx2_enum);140 141static SOC_VALUE_ENUM_SINGLE_DECL(cs35l56_sdw1tx3_enum,142 CS35L56_SWIRE_DP3_CH3_INPUT,143 0, CS35L56_SWIRETXn_SRC_MASK,144 cs35l56_tx_input_texts,145 cs35l56_tx_input_values);146 147static const struct snd_kcontrol_new sdw1_tx3_mux =148 SOC_DAPM_ENUM("SDW1TX3 SRC", cs35l56_sdw1tx3_enum);149 150static SOC_VALUE_ENUM_SINGLE_DECL(cs35l56_sdw1tx4_enum,151 CS35L56_SWIRE_DP3_CH4_INPUT,152 0, CS35L56_SWIRETXn_SRC_MASK,153 cs35l56_tx_input_texts,154 cs35l56_tx_input_values);155 156static const struct snd_kcontrol_new sdw1_tx4_mux =157 SOC_DAPM_ENUM("SDW1TX4 SRC", cs35l56_sdw1tx4_enum);158 159static int cs35l56_play_event(struct snd_soc_dapm_widget *w,160 struct snd_kcontrol *kcontrol, int event)161{162 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);163 struct cs35l56_private *cs35l56 = snd_soc_component_get_drvdata(component);164 unsigned int val;165 int ret;166 167 dev_dbg(cs35l56->base.dev, "play: %d\n", event);168 169 switch (event) {170 case SND_SOC_DAPM_PRE_PMU:171 /* Don't wait for ACK, we check in POST_PMU that it completed */172 return regmap_write(cs35l56->base.regmap, CS35L56_DSP_VIRTUAL1_MBOX_1,173 CS35L56_MBOX_CMD_AUDIO_PLAY);174 case SND_SOC_DAPM_POST_PMU:175 /* Wait for firmware to enter PS0 power state */176 ret = regmap_read_poll_timeout(cs35l56->base.regmap,177 CS35L56_TRANSDUCER_ACTUAL_PS,178 val, (val == CS35L56_PS0),179 CS35L56_PS0_POLL_US,180 CS35L56_PS0_TIMEOUT_US);181 if (ret)182 dev_err(cs35l56->base.dev, "PS0 wait failed: %d\n", ret);183 return ret;184 case SND_SOC_DAPM_POST_PMD:185 return cs35l56_mbox_send(&cs35l56->base, CS35L56_MBOX_CMD_AUDIO_PAUSE);186 default:187 return 0;188 }189}190 191static const struct snd_soc_dapm_widget cs35l56_dapm_widgets[] = {192 SND_SOC_DAPM_REGULATOR_SUPPLY("VDD_B", 0, 0),193 SND_SOC_DAPM_REGULATOR_SUPPLY("VDD_AMP", 0, 0),194 195 SND_SOC_DAPM_SUPPLY("PLAY", SND_SOC_NOPM, 0, 0, cs35l56_play_event,196 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),197 198 SND_SOC_DAPM_OUT_DRV("AMP", SND_SOC_NOPM, 0, 0, NULL, 0),199 SND_SOC_DAPM_OUTPUT("SPK"),200 201 SND_SOC_DAPM_PGA_E("DSP1", SND_SOC_NOPM, 0, 0, NULL, 0, cs35l56_dsp_event,202 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),203 204 SND_SOC_DAPM_AIF_IN("ASP1RX1", NULL, 0, CS35L56_ASP1_ENABLES1,205 CS35L56_ASP_RX1_EN_SHIFT, 0),206 SND_SOC_DAPM_AIF_IN("ASP1RX2", NULL, 1, CS35L56_ASP1_ENABLES1,207 CS35L56_ASP_RX2_EN_SHIFT, 0),208 SND_SOC_DAPM_AIF_OUT("ASP1TX1", NULL, 0, CS35L56_ASP1_ENABLES1,209 CS35L56_ASP_TX1_EN_SHIFT, 0),210 SND_SOC_DAPM_AIF_OUT("ASP1TX2", NULL, 1, CS35L56_ASP1_ENABLES1,211 CS35L56_ASP_TX2_EN_SHIFT, 0),212 SND_SOC_DAPM_AIF_OUT("ASP1TX3", NULL, 2, CS35L56_ASP1_ENABLES1,213 CS35L56_ASP_TX3_EN_SHIFT, 0),214 SND_SOC_DAPM_AIF_OUT("ASP1TX4", NULL, 3, CS35L56_ASP1_ENABLES1,215 CS35L56_ASP_TX4_EN_SHIFT, 0),216 217 SND_SOC_DAPM_MUX("ASP1 TX1 Source", SND_SOC_NOPM, 0, 0, &asp1_tx1_mux),218 SND_SOC_DAPM_MUX("ASP1 TX2 Source", SND_SOC_NOPM, 0, 0, &asp1_tx2_mux),219 SND_SOC_DAPM_MUX("ASP1 TX3 Source", SND_SOC_NOPM, 0, 0, &asp1_tx3_mux),220 SND_SOC_DAPM_MUX("ASP1 TX4 Source", SND_SOC_NOPM, 0, 0, &asp1_tx4_mux),221 222 SND_SOC_DAPM_MUX("SDW1 TX1 Source", SND_SOC_NOPM, 0, 0, &sdw1_tx1_mux),223 SND_SOC_DAPM_MUX("SDW1 TX2 Source", SND_SOC_NOPM, 0, 0, &sdw1_tx2_mux),224 SND_SOC_DAPM_MUX("SDW1 TX3 Source", SND_SOC_NOPM, 0, 0, &sdw1_tx3_mux),225 SND_SOC_DAPM_MUX("SDW1 TX4 Source", SND_SOC_NOPM, 0, 0, &sdw1_tx4_mux),226 227 SND_SOC_DAPM_SIGGEN("VMON ADC"),228 SND_SOC_DAPM_SIGGEN("IMON ADC"),229 SND_SOC_DAPM_SIGGEN("ERRVOL ADC"),230 SND_SOC_DAPM_SIGGEN("CLASSH ADC"),231 SND_SOC_DAPM_SIGGEN("VDDBMON ADC"),232 SND_SOC_DAPM_SIGGEN("VBSTMON ADC"),233 SND_SOC_DAPM_SIGGEN("TEMPMON ADC"),234};235 236#define CS35L56_SRC_ROUTE(name) \237 { name" Source", "ASP1RX1", "ASP1RX1" }, \238 { name" Source", "ASP1RX2", "ASP1RX2" }, \239 { name" Source", "VMON", "VMON ADC" }, \240 { name" Source", "IMON", "IMON ADC" }, \241 { name" Source", "ERRVOL", "ERRVOL ADC" }, \242 { name" Source", "CLASSH", "CLASSH ADC" }, \243 { name" Source", "VDDBMON", "VDDBMON ADC" }, \244 { name" Source", "VBSTMON", "VBSTMON ADC" }, \245 { name" Source", "DSP1TX1", "DSP1" }, \246 { name" Source", "DSP1TX2", "DSP1" }, \247 { name" Source", "DSP1TX3", "DSP1" }, \248 { name" Source", "DSP1TX4", "DSP1" }, \249 { name" Source", "DSP1TX5", "DSP1" }, \250 { name" Source", "DSP1TX6", "DSP1" }, \251 { name" Source", "DSP1TX7", "DSP1" }, \252 { name" Source", "DSP1TX8", "DSP1" }, \253 { name" Source", "TEMPMON", "TEMPMON ADC" }, \254 { name" Source", "INTERPOLATOR", "AMP" }, \255 { name" Source", "SDW1RX1", "SDW1 Playback" }, \256 { name" Source", "SDW1RX2", "SDW1 Playback" },257 258static const struct snd_soc_dapm_route cs35l56_audio_map[] = {259 { "AMP", NULL, "VDD_B" },260 { "AMP", NULL, "VDD_AMP" },261 262 { "ASP1 Playback", NULL, "PLAY" },263 { "SDW1 Playback", NULL, "PLAY" },264 265 { "ASP1RX1", NULL, "ASP1 Playback" },266 { "ASP1RX2", NULL, "ASP1 Playback" },267 { "DSP1", NULL, "ASP1RX1" },268 { "DSP1", NULL, "ASP1RX2" },269 { "DSP1", NULL, "SDW1 Playback" },270 { "AMP", NULL, "DSP1" },271 { "SPK", NULL, "AMP" },272 273 CS35L56_SRC_ROUTE("ASP1 TX1")274 CS35L56_SRC_ROUTE("ASP1 TX2")275 CS35L56_SRC_ROUTE("ASP1 TX3")276 CS35L56_SRC_ROUTE("ASP1 TX4")277 278 { "ASP1TX1", NULL, "ASP1 TX1 Source" },279 { "ASP1TX2", NULL, "ASP1 TX2 Source" },280 { "ASP1TX3", NULL, "ASP1 TX3 Source" },281 { "ASP1TX4", NULL, "ASP1 TX4 Source" },282 { "ASP1 Capture", NULL, "ASP1TX1" },283 { "ASP1 Capture", NULL, "ASP1TX2" },284 { "ASP1 Capture", NULL, "ASP1TX3" },285 { "ASP1 Capture", NULL, "ASP1TX4" },286 287 CS35L56_SRC_ROUTE("SDW1 TX1")288 CS35L56_SRC_ROUTE("SDW1 TX2")289 CS35L56_SRC_ROUTE("SDW1 TX3")290 CS35L56_SRC_ROUTE("SDW1 TX4")291 { "SDW1 Capture", NULL, "SDW1 TX1 Source" },292 { "SDW1 Capture", NULL, "SDW1 TX2 Source" },293 { "SDW1 Capture", NULL, "SDW1 TX3 Source" },294 { "SDW1 Capture", NULL, "SDW1 TX4 Source" },295};296 297static int cs35l56_dsp_event(struct snd_soc_dapm_widget *w,298 struct snd_kcontrol *kcontrol, int event)299{300 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);301 struct cs35l56_private *cs35l56 = snd_soc_component_get_drvdata(component);302 303 dev_dbg(cs35l56->base.dev, "%s: %d\n", __func__, event);304 305 return wm_adsp_event(w, kcontrol, event);306}307 308static int cs35l56_asp_dai_set_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt)309{310 struct cs35l56_private *cs35l56 = snd_soc_component_get_drvdata(codec_dai->component);311 unsigned int val;312 313 dev_dbg(cs35l56->base.dev, "%s: %#x\n", __func__, fmt);314 315 switch (fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) {316 case SND_SOC_DAIFMT_CBC_CFC:317 break;318 default:319 dev_err(cs35l56->base.dev, "Unsupported clock source mode\n");320 return -EINVAL;321 }322 323 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {324 case SND_SOC_DAIFMT_DSP_A:325 val = CS35L56_ASP_FMT_DSP_A << CS35L56_ASP_FMT_SHIFT;326 cs35l56->tdm_mode = true;327 break;328 case SND_SOC_DAIFMT_I2S:329 val = CS35L56_ASP_FMT_I2S << CS35L56_ASP_FMT_SHIFT;330 cs35l56->tdm_mode = false;331 break;332 default:333 dev_err(cs35l56->base.dev, "Unsupported DAI format\n");334 return -EINVAL;335 }336 337 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {338 case SND_SOC_DAIFMT_NB_IF:339 val |= CS35L56_ASP_FSYNC_INV_MASK;340 break;341 case SND_SOC_DAIFMT_IB_NF:342 val |= CS35L56_ASP_BCLK_INV_MASK;343 break;344 case SND_SOC_DAIFMT_IB_IF:345 val |= CS35L56_ASP_BCLK_INV_MASK | CS35L56_ASP_FSYNC_INV_MASK;346 break;347 case SND_SOC_DAIFMT_NB_NF:348 break;349 default:350 dev_err(cs35l56->base.dev, "Invalid clock invert\n");351 return -EINVAL;352 }353 354 regmap_update_bits(cs35l56->base.regmap,355 CS35L56_ASP1_CONTROL2,356 CS35L56_ASP_FMT_MASK |357 CS35L56_ASP_BCLK_INV_MASK | CS35L56_ASP_FSYNC_INV_MASK,358 val);359 360 /* Hi-Z DOUT in unused slots and when all TX are disabled */361 regmap_update_bits(cs35l56->base.regmap, CS35L56_ASP1_CONTROL3,362 CS35L56_ASP1_DOUT_HIZ_CTRL_MASK,363 CS35L56_ASP_UNUSED_HIZ_OFF_HIZ);364 365 return 0;366}367 368static unsigned int cs35l56_make_tdm_config_word(unsigned int reg_val, unsigned long mask)369{370 unsigned int channel_shift;371 int bit_num;372 373 /* Enable consecutive TX1..TXn for each of the slots set in mask */374 channel_shift = 0;375 for_each_set_bit(bit_num, &mask, 32) {376 reg_val &= ~(0x3f << channel_shift);377 reg_val |= bit_num << channel_shift;378 channel_shift += 8;379 }380 381 return reg_val;382}383 384static int cs35l56_asp_dai_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask,385 unsigned int rx_mask, int slots, int slot_width)386{387 struct cs35l56_private *cs35l56 = snd_soc_component_get_drvdata(dai->component);388 389 if ((slots == 0) || (slot_width == 0)) {390 dev_dbg(cs35l56->base.dev, "tdm config cleared\n");391 cs35l56->asp_slot_width = 0;392 cs35l56->asp_slot_count = 0;393 return 0;394 }395 396 if (slot_width > (CS35L56_ASP_RX_WIDTH_MASK >> CS35L56_ASP_RX_WIDTH_SHIFT)) {397 dev_err(cs35l56->base.dev, "tdm invalid slot width %d\n", slot_width);398 return -EINVAL;399 }400 401 /* More than 32 slots would give an unsupportable BCLK frequency */402 if (slots > 32) {403 dev_err(cs35l56->base.dev, "tdm invalid slot count %d\n", slots);404 return -EINVAL;405 }406 407 cs35l56->asp_slot_width = (u8)slot_width;408 cs35l56->asp_slot_count = (u8)slots;409 410 // Note: rx/tx is from point of view of the CPU end411 if (tx_mask == 0)412 tx_mask = 0x3; // ASPRX1/RX2 in slots 0 and 1413 414 if (rx_mask == 0)415 rx_mask = 0xf; // ASPTX1..TX4 in slots 0..3416 417 /* Default unused slots to 63 */418 regmap_write(cs35l56->base.regmap, CS35L56_ASP1_FRAME_CONTROL1,419 cs35l56_make_tdm_config_word(0x3f3f3f3f, rx_mask));420 regmap_write(cs35l56->base.regmap, CS35L56_ASP1_FRAME_CONTROL5,421 cs35l56_make_tdm_config_word(0x3f3f3f, tx_mask));422 423 dev_dbg(cs35l56->base.dev, "tdm slot width: %u count: %u tx_mask: %#x rx_mask: %#x\n",424 cs35l56->asp_slot_width, cs35l56->asp_slot_count, tx_mask, rx_mask);425 426 return 0;427}428 429static int cs35l56_asp_dai_hw_params(struct snd_pcm_substream *substream,430 struct snd_pcm_hw_params *params,431 struct snd_soc_dai *dai)432{433 struct cs35l56_private *cs35l56 = snd_soc_component_get_drvdata(dai->component);434 unsigned int rate = params_rate(params);435 u8 asp_width, asp_wl;436 437 asp_wl = params_width(params);438 if (cs35l56->asp_slot_width)439 asp_width = cs35l56->asp_slot_width;440 else441 asp_width = asp_wl;442 443 dev_dbg(cs35l56->base.dev, "%s: wl=%d, width=%d, rate=%d",444 __func__, asp_wl, asp_width, rate);445 446 if (!cs35l56->sysclk_set) {447 unsigned int slots = cs35l56->asp_slot_count;448 unsigned int bclk_freq;449 int freq_id;450 451 if (slots == 0) {452 slots = params_channels(params);453 454 /* I2S always has an even number of slots */455 if (!cs35l56->tdm_mode)456 slots = round_up(slots, 2);457 }458 459 bclk_freq = asp_width * slots * rate;460 freq_id = cs35l56_get_bclk_freq_id(bclk_freq);461 if (freq_id < 0) {462 dev_err(cs35l56->base.dev, "%s: Invalid BCLK %u\n", __func__, bclk_freq);463 return -EINVAL;464 }465 466 regmap_update_bits(cs35l56->base.regmap, CS35L56_ASP1_CONTROL1,467 CS35L56_ASP_BCLK_FREQ_MASK,468 freq_id << CS35L56_ASP_BCLK_FREQ_SHIFT);469 }470 471 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {472 regmap_update_bits(cs35l56->base.regmap, CS35L56_ASP1_CONTROL2,473 CS35L56_ASP_RX_WIDTH_MASK, asp_width <<474 CS35L56_ASP_RX_WIDTH_SHIFT);475 regmap_update_bits(cs35l56->base.regmap, CS35L56_ASP1_DATA_CONTROL5,476 CS35L56_ASP_RX_WL_MASK, asp_wl);477 } else {478 regmap_update_bits(cs35l56->base.regmap, CS35L56_ASP1_CONTROL2,479 CS35L56_ASP_TX_WIDTH_MASK, asp_width <<480 CS35L56_ASP_TX_WIDTH_SHIFT);481 regmap_update_bits(cs35l56->base.regmap, CS35L56_ASP1_DATA_CONTROL1,482 CS35L56_ASP_TX_WL_MASK, asp_wl);483 }484 485 return 0;486}487 488static int cs35l56_asp_dai_set_sysclk(struct snd_soc_dai *dai,489 int clk_id, unsigned int freq, int dir)490{491 struct cs35l56_private *cs35l56 = snd_soc_component_get_drvdata(dai->component);492 int freq_id;493 494 if (freq == 0) {495 cs35l56->sysclk_set = false;496 return 0;497 }498 499 freq_id = cs35l56_get_bclk_freq_id(freq);500 if (freq_id < 0)501 return freq_id;502 503 regmap_update_bits(cs35l56->base.regmap, CS35L56_ASP1_CONTROL1,504 CS35L56_ASP_BCLK_FREQ_MASK,505 freq_id << CS35L56_ASP_BCLK_FREQ_SHIFT);506 cs35l56->sysclk_set = true;507 508 return 0;509}510 511static const struct snd_soc_dai_ops cs35l56_ops = {512 .set_fmt = cs35l56_asp_dai_set_fmt,513 .set_tdm_slot = cs35l56_asp_dai_set_tdm_slot,514 .hw_params = cs35l56_asp_dai_hw_params,515 .set_sysclk = cs35l56_asp_dai_set_sysclk,516};517 518static void cs35l56_sdw_dai_shutdown(struct snd_pcm_substream *substream,519 struct snd_soc_dai *dai)520{521 snd_soc_dai_set_dma_data(dai, substream, NULL);522}523 524static int cs35l56_sdw_dai_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask,525 unsigned int rx_mask, int slots, int slot_width)526{527 struct cs35l56_private *cs35l56 = snd_soc_component_get_drvdata(dai->component);528 529 /* rx/tx are from point of view of the CPU end so opposite to our rx/tx */530 cs35l56->rx_mask = tx_mask;531 cs35l56->tx_mask = rx_mask;532 533 return 0;534}535 536static int cs35l56_sdw_dai_hw_params(struct snd_pcm_substream *substream,537 struct snd_pcm_hw_params *params,538 struct snd_soc_dai *dai)539{540 struct cs35l56_private *cs35l56 = snd_soc_component_get_drvdata(dai->component);541 struct sdw_stream_runtime *sdw_stream = snd_soc_dai_get_dma_data(dai, substream);542 struct sdw_stream_config sconfig;543 struct sdw_port_config pconfig;544 int ret;545 546 dev_dbg(cs35l56->base.dev, "%s: rate %d\n", __func__, params_rate(params));547 548 if (!cs35l56->base.init_done)549 return -ENODEV;550 551 if (!sdw_stream)552 return -EINVAL;553 554 memset(&sconfig, 0, sizeof(sconfig));555 memset(&pconfig, 0, sizeof(pconfig));556 557 sconfig.frame_rate = params_rate(params);558 sconfig.bps = snd_pcm_format_width(params_format(params));559 560 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {561 sconfig.direction = SDW_DATA_DIR_RX;562 pconfig.num = CS35L56_SDW1_PLAYBACK_PORT;563 pconfig.ch_mask = cs35l56->rx_mask;564 } else {565 sconfig.direction = SDW_DATA_DIR_TX;566 pconfig.num = CS35L56_SDW1_CAPTURE_PORT;567 pconfig.ch_mask = cs35l56->tx_mask;568 }569 570 if (pconfig.ch_mask == 0) {571 sconfig.ch_count = params_channels(params);572 pconfig.ch_mask = GENMASK(sconfig.ch_count - 1, 0);573 } else {574 sconfig.ch_count = hweight32(pconfig.ch_mask);575 }576 577 ret = sdw_stream_add_slave(cs35l56->sdw_peripheral, &sconfig, &pconfig,578 1, sdw_stream);579 if (ret) {580 dev_err(dai->dev, "Failed to add sdw stream: %d\n", ret);581 return ret;582 }583 584 return 0;585}586 587static int cs35l56_sdw_dai_hw_free(struct snd_pcm_substream *substream,588 struct snd_soc_dai *dai)589{590 struct cs35l56_private *cs35l56 = snd_soc_component_get_drvdata(dai->component);591 struct sdw_stream_runtime *sdw_stream = snd_soc_dai_get_dma_data(dai, substream);592 593 if (!cs35l56->sdw_peripheral)594 return -EINVAL;595 596 sdw_stream_remove_slave(cs35l56->sdw_peripheral, sdw_stream);597 598 return 0;599}600 601static int cs35l56_sdw_dai_set_stream(struct snd_soc_dai *dai,602 void *sdw_stream, int direction)603{604 snd_soc_dai_dma_data_set(dai, direction, sdw_stream);605 606 return 0;607}608 609static const struct snd_soc_dai_ops cs35l56_sdw_dai_ops = {610 .set_tdm_slot = cs35l56_sdw_dai_set_tdm_slot,611 .shutdown = cs35l56_sdw_dai_shutdown,612 .hw_params = cs35l56_sdw_dai_hw_params,613 .hw_free = cs35l56_sdw_dai_hw_free,614 .set_stream = cs35l56_sdw_dai_set_stream,615};616 617static struct snd_soc_dai_driver cs35l56_dai[] = {618 {619 .name = "cs35l56-asp1",620 .id = 0,621 .playback = {622 .stream_name = "ASP1 Playback",623 .channels_min = 1,624 .channels_max = 2,625 .rates = CS35L56_RATES,626 .formats = CS35L56_RX_FORMATS,627 },628 .capture = {629 .stream_name = "ASP1 Capture",630 .channels_min = 1,631 .channels_max = 4,632 .rates = CS35L56_RATES,633 .formats = CS35L56_TX_FORMATS,634 },635 .ops = &cs35l56_ops,636 .symmetric_rate = 1,637 .symmetric_sample_bits = 1,638 },639 {640 .name = "cs35l56-sdw1",641 .id = 1,642 .playback = {643 .stream_name = "SDW1 Playback",644 .channels_min = 1,645 .channels_max = 2,646 .rates = CS35L56_RATES,647 .formats = CS35L56_RX_FORMATS,648 },649 .capture = {650 .stream_name = "SDW1 Capture",651 .channels_min = 1,652 .channels_max = 4,653 .rates = CS35L56_RATES,654 .formats = CS35L56_TX_FORMATS,655 },656 .symmetric_rate = 1,657 .ops = &cs35l56_sdw_dai_ops,658 }659};660 661static int cs35l56_write_cal(struct cs35l56_private *cs35l56)662{663 int ret;664 665 if (cs35l56->base.secured || !cs35l56->base.cal_data_valid)666 return -ENODATA;667 668 ret = wm_adsp_run(&cs35l56->dsp);669 if (ret)670 return ret;671 672 ret = cs_amp_write_cal_coeffs(&cs35l56->dsp.cs_dsp,673 &cs35l56_calibration_controls,674 &cs35l56->base.cal_data);675 676 wm_adsp_stop(&cs35l56->dsp);677 678 if (ret == 0)679 dev_info(cs35l56->base.dev, "Calibration applied\n");680 681 return ret;682}683 684static void cs35l56_reinit_patch(struct cs35l56_private *cs35l56)685{686 int ret;687 688 /* Use wm_adsp to load and apply the firmware patch and coefficient files */689 ret = wm_adsp_power_up(&cs35l56->dsp, true);690 if (ret) {691 dev_dbg(cs35l56->base.dev, "%s: wm_adsp_power_up ret %d\n", __func__, ret);692 return;693 }694 695 cs35l56_write_cal(cs35l56);696 697 /* Always REINIT after applying patch or coefficients */698 cs35l56_mbox_send(&cs35l56->base, CS35L56_MBOX_CMD_AUDIO_REINIT);699}700 701static void cs35l56_patch(struct cs35l56_private *cs35l56, bool firmware_missing)702{703 int ret;704 705 /*706 * Disable SoundWire interrupts to prevent race with IRQ work.707 * Setting sdw_irq_no_unmask prevents the handler re-enabling708 * the SoundWire interrupt.709 */710 if (cs35l56->sdw_peripheral) {711 cs35l56->sdw_irq_no_unmask = true;712 flush_work(&cs35l56->sdw_irq_work);713 sdw_write_no_pm(cs35l56->sdw_peripheral, CS35L56_SDW_GEN_INT_MASK_1, 0);714 sdw_read_no_pm(cs35l56->sdw_peripheral, CS35L56_SDW_GEN_INT_STAT_1);715 sdw_write_no_pm(cs35l56->sdw_peripheral, CS35L56_SDW_GEN_INT_STAT_1, 0xFF);716 flush_work(&cs35l56->sdw_irq_work);717 }718 719 ret = cs35l56_firmware_shutdown(&cs35l56->base);720 if (ret)721 goto err;722 723 /*724 * Use wm_adsp to load and apply the firmware patch and coefficient files,725 * but only if firmware is missing. If firmware is already patched just726 * power-up wm_adsp without downloading firmware.727 */728 ret = wm_adsp_power_up(&cs35l56->dsp, !!firmware_missing);729 if (ret) {730 dev_dbg(cs35l56->base.dev, "%s: wm_adsp_power_up ret %d\n", __func__, ret);731 goto err;732 }733 734 mutex_lock(&cs35l56->base.irq_lock);735 736 reinit_completion(&cs35l56->init_completion);737 738 cs35l56->soft_resetting = true;739 cs35l56_system_reset(&cs35l56->base, !!cs35l56->sdw_peripheral);740 741 if (cs35l56->sdw_peripheral) {742 /*743 * The system-reset causes the CS35L56 to detach from the bus.744 * Wait for the manager to re-enumerate the CS35L56 and745 * cs35l56_init() to run again.746 */747 if (!wait_for_completion_timeout(&cs35l56->init_completion,748 msecs_to_jiffies(5000))) {749 dev_err(cs35l56->base.dev, "%s: init_completion timed out (SDW)\n",750 __func__);751 goto err_unlock;752 }753 } else if (cs35l56_init(cs35l56)) {754 goto err_unlock;755 }756 757 regmap_clear_bits(cs35l56->base.regmap, CS35L56_PROTECTION_STATUS,758 CS35L56_FIRMWARE_MISSING);759 cs35l56->base.fw_patched = true;760 761 if (cs35l56_write_cal(cs35l56) == 0)762 cs35l56_mbox_send(&cs35l56->base, CS35L56_MBOX_CMD_AUDIO_REINIT);763 764err_unlock:765 mutex_unlock(&cs35l56->base.irq_lock);766err:767 /* Re-enable SoundWire interrupts */768 if (cs35l56->sdw_peripheral) {769 cs35l56->sdw_irq_no_unmask = false;770 sdw_write_no_pm(cs35l56->sdw_peripheral, CS35L56_SDW_GEN_INT_MASK_1,771 CS35L56_SDW_INT_MASK_CODEC_IRQ);772 }773}774 775static void cs35l56_dsp_work(struct work_struct *work)776{777 struct cs35l56_private *cs35l56 = container_of(work,778 struct cs35l56_private,779 dsp_work);780 unsigned int firmware_version;781 bool firmware_missing;782 int ret;783 784 if (!cs35l56->base.init_done)785 return;786 787 pm_runtime_get_sync(cs35l56->base.dev);788 789 ret = cs35l56_read_prot_status(&cs35l56->base, &firmware_missing, &firmware_version);790 if (ret)791 goto err;792 793 /* Populate fw file qualifier with the revision and security state */794 kfree(cs35l56->dsp.fwf_name);795 if (firmware_missing) {796 cs35l56->dsp.fwf_name = kasprintf(GFP_KERNEL, "%02x-dsp1", cs35l56->base.rev);797 } else {798 /* Firmware files must match the running firmware version */799 cs35l56->dsp.fwf_name = kasprintf(GFP_KERNEL,800 "%02x%s-%06x-dsp1",801 cs35l56->base.rev,802 cs35l56->base.secured ? "-s" : "",803 firmware_version);804 }805 806 if (!cs35l56->dsp.fwf_name)807 goto err;808 809 dev_dbg(cs35l56->base.dev, "DSP fwf name: '%s' system name: '%s'\n",810 cs35l56->dsp.fwf_name, cs35l56->dsp.system_name);811 812 /*813 * The firmware cannot be patched if it is already running from814 * patch RAM. In this case the firmware files are versioned to815 * match the running firmware version and will only contain816 * tunings. We do not need to shutdown the firmware to apply817 * tunings so can use the lower cost reinit sequence instead.818 */819 if (!firmware_missing)820 cs35l56_reinit_patch(cs35l56);821 else822 cs35l56_patch(cs35l56, firmware_missing);823 824err:825 pm_runtime_mark_last_busy(cs35l56->base.dev);826 pm_runtime_put_autosuspend(cs35l56->base.dev);827}828 829static int cs35l56_component_probe(struct snd_soc_component *component)830{831 struct cs35l56_private *cs35l56 = snd_soc_component_get_drvdata(component);832 struct dentry *debugfs_root = component->debugfs_root;833 unsigned short vendor, device;834 835 BUILD_BUG_ON(ARRAY_SIZE(cs35l56_tx_input_texts) != ARRAY_SIZE(cs35l56_tx_input_values));836 837 if (!cs35l56->dsp.system_name &&838 (snd_soc_card_get_pci_ssid(component->card, &vendor, &device) == 0)) {839 /* Append a speaker qualifier if there is a speaker ID */840 if (cs35l56->speaker_id >= 0) {841 cs35l56->dsp.system_name = devm_kasprintf(cs35l56->base.dev,842 GFP_KERNEL,843 "%04x%04x-spkid%d",844 vendor, device,845 cs35l56->speaker_id);846 } else {847 cs35l56->dsp.system_name = devm_kasprintf(cs35l56->base.dev,848 GFP_KERNEL,849 "%04x%04x",850 vendor, device);851 }852 if (!cs35l56->dsp.system_name)853 return -ENOMEM;854 }855 856 if (!wait_for_completion_timeout(&cs35l56->init_completion,857 msecs_to_jiffies(5000))) {858 dev_err(cs35l56->base.dev, "%s: init_completion timed out\n", __func__);859 return -ENODEV;860 }861 862 cs35l56->dsp.part = kasprintf(GFP_KERNEL, "cs35l%02x", cs35l56->base.type);863 if (!cs35l56->dsp.part)864 return -ENOMEM;865 866 cs35l56->component = component;867 wm_adsp2_component_probe(&cs35l56->dsp, component);868 869 debugfs_create_bool("init_done", 0444, debugfs_root, &cs35l56->base.init_done);870 debugfs_create_bool("can_hibernate", 0444, debugfs_root, &cs35l56->base.can_hibernate);871 debugfs_create_bool("fw_patched", 0444, debugfs_root, &cs35l56->base.fw_patched);872 873 queue_work(cs35l56->dsp_wq, &cs35l56->dsp_work);874 875 return 0;876}877 878static void cs35l56_component_remove(struct snd_soc_component *component)879{880 struct cs35l56_private *cs35l56 = snd_soc_component_get_drvdata(component);881 882 cancel_work_sync(&cs35l56->dsp_work);883 884 if (cs35l56->dsp.cs_dsp.booted)885 wm_adsp_power_down(&cs35l56->dsp);886 887 wm_adsp2_component_remove(&cs35l56->dsp, component);888 889 kfree(cs35l56->dsp.part);890 cs35l56->dsp.part = NULL;891 892 kfree(cs35l56->dsp.fwf_name);893 cs35l56->dsp.fwf_name = NULL;894 895 cs35l56->component = NULL;896}897 898static int cs35l56_set_bias_level(struct snd_soc_component *component,899 enum snd_soc_bias_level level)900{901 struct cs35l56_private *cs35l56 = snd_soc_component_get_drvdata(component);902 903 switch (level) {904 case SND_SOC_BIAS_STANDBY:905 /*906 * Wait for patching to complete when transitioning from907 * BIAS_OFF to BIAS_STANDBY908 */909 if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_OFF)910 cs35l56_wait_dsp_ready(cs35l56);911 912 break;913 default:914 break;915 }916 917 return 0;918}919 920static const struct snd_soc_component_driver soc_component_dev_cs35l56 = {921 .probe = cs35l56_component_probe,922 .remove = cs35l56_component_remove,923 924 .dapm_widgets = cs35l56_dapm_widgets,925 .num_dapm_widgets = ARRAY_SIZE(cs35l56_dapm_widgets),926 .dapm_routes = cs35l56_audio_map,927 .num_dapm_routes = ARRAY_SIZE(cs35l56_audio_map),928 .controls = cs35l56_controls,929 .num_controls = ARRAY_SIZE(cs35l56_controls),930 931 .set_bias_level = cs35l56_set_bias_level,932 933 .suspend_bias_off = 1, /* see cs35l56_system_resume() */934};935 936static int __maybe_unused cs35l56_runtime_suspend_i2c_spi(struct device *dev)937{938 struct cs35l56_private *cs35l56 = dev_get_drvdata(dev);939 940 return cs35l56_runtime_suspend_common(&cs35l56->base);941}942 943static int __maybe_unused cs35l56_runtime_resume_i2c_spi(struct device *dev)944{945 struct cs35l56_private *cs35l56 = dev_get_drvdata(dev);946 947 return cs35l56_runtime_resume_common(&cs35l56->base, false);948}949 950int cs35l56_system_suspend(struct device *dev)951{952 struct cs35l56_private *cs35l56 = dev_get_drvdata(dev);953 954 dev_dbg(dev, "system_suspend\n");955 956 if (cs35l56->component)957 flush_work(&cs35l56->dsp_work);958 959 /*960 * The interrupt line is normally shared, but after we start suspending961 * we can't check if our device is the source of an interrupt, and can't962 * clear it. Prevent this race by temporarily disabling the parent irq963 * until we reach _no_irq.964 */965 if (cs35l56->base.irq)966 disable_irq(cs35l56->base.irq);967 968 return pm_runtime_force_suspend(dev);969}970EXPORT_SYMBOL_GPL(cs35l56_system_suspend);971 972int cs35l56_system_suspend_late(struct device *dev)973{974 struct cs35l56_private *cs35l56 = dev_get_drvdata(dev);975 976 dev_dbg(dev, "system_suspend_late\n");977 978 /*979 * Assert RESET before removing supplies.980 * RESET is usually shared by all amps so it must not be asserted until981 * all driver instances have done their suspend() stage.982 */983 if (cs35l56->base.reset_gpio) {984 gpiod_set_value_cansleep(cs35l56->base.reset_gpio, 0);985 cs35l56_wait_min_reset_pulse();986 }987 988 regulator_bulk_disable(ARRAY_SIZE(cs35l56->supplies), cs35l56->supplies);989 990 return 0;991}992EXPORT_SYMBOL_GPL(cs35l56_system_suspend_late);993 994int cs35l56_system_suspend_no_irq(struct device *dev)995{996 struct cs35l56_private *cs35l56 = dev_get_drvdata(dev);997 998 dev_dbg(dev, "system_suspend_no_irq\n");999 1000 /* Handlers are now disabled so the parent IRQ can safely be re-enabled. */1001 if (cs35l56->base.irq)1002 enable_irq(cs35l56->base.irq);1003 1004 return 0;1005}1006EXPORT_SYMBOL_GPL(cs35l56_system_suspend_no_irq);1007 1008int cs35l56_system_resume_no_irq(struct device *dev)1009{1010 struct cs35l56_private *cs35l56 = dev_get_drvdata(dev);1011 1012 dev_dbg(dev, "system_resume_no_irq\n");1013 1014 /*1015 * WAKE interrupts unmask if the CS35L56 hibernates, which can cause1016 * spurious interrupts, and the interrupt line is normally shared.1017 * We can't check if our device is the source of an interrupt, and can't1018 * clear it, until it has fully resumed. Prevent this race by temporarily1019 * disabling the parent irq until we complete resume().1020 */1021 if (cs35l56->base.irq)1022 disable_irq(cs35l56->base.irq);1023 1024 return 0;1025}1026EXPORT_SYMBOL_GPL(cs35l56_system_resume_no_irq);1027 1028int cs35l56_system_resume_early(struct device *dev)1029{1030 struct cs35l56_private *cs35l56 = dev_get_drvdata(dev);1031 int ret;1032 1033 dev_dbg(dev, "system_resume_early\n");1034 1035 /* Ensure a spec-compliant RESET pulse. */1036 if (cs35l56->base.reset_gpio) {1037 gpiod_set_value_cansleep(cs35l56->base.reset_gpio, 0);1038 cs35l56_wait_min_reset_pulse();1039 }1040 1041 /* Enable supplies before releasing RESET. */1042 ret = regulator_bulk_enable(ARRAY_SIZE(cs35l56->supplies), cs35l56->supplies);1043 if (ret) {1044 dev_err(dev, "system_resume_early failed to enable supplies: %d\n", ret);1045 return ret;1046 }1047 1048 /* Release shared RESET before drivers start resume(). */1049 gpiod_set_value_cansleep(cs35l56->base.reset_gpio, 1);1050 1051 return 0;1052}1053EXPORT_SYMBOL_GPL(cs35l56_system_resume_early);1054 1055int cs35l56_system_resume(struct device *dev)1056{1057 struct cs35l56_private *cs35l56 = dev_get_drvdata(dev);1058 int ret;1059 1060 dev_dbg(dev, "system_resume\n");1061 1062 /*1063 * We might have done a hard reset or the CS35L56 was power-cycled1064 * so wait for control port to be ready.1065 */1066 cs35l56_wait_control_port_ready();1067 1068 /* Undo pm_runtime_force_suspend() before re-enabling the irq */1069 ret = pm_runtime_force_resume(dev);1070 if (cs35l56->base.irq)1071 enable_irq(cs35l56->base.irq);1072 1073 if (ret)1074 return ret;1075 1076 /* Firmware won't have been loaded if the component hasn't probed */1077 if (!cs35l56->component)1078 return 0;1079 1080 ret = cs35l56_is_fw_reload_needed(&cs35l56->base);1081 dev_dbg(cs35l56->base.dev, "fw_reload_needed: %d\n", ret);1082 if (ret < 1)1083 return ret;1084 1085 cs35l56->base.fw_patched = false;1086 wm_adsp_power_down(&cs35l56->dsp);1087 queue_work(cs35l56->dsp_wq, &cs35l56->dsp_work);1088 1089 /*1090 * suspend_bias_off ensures we are now in BIAS_OFF so there will be1091 * a BIAS_OFF->BIAS_STANDBY transition to complete dsp patching.1092 */1093 1094 return 0;1095}1096EXPORT_SYMBOL_GPL(cs35l56_system_resume);1097 1098static int cs35l56_control_add_nop(struct wm_adsp *dsp, struct cs_dsp_coeff_ctl *cs_ctl)1099{1100 return 0;1101}1102 1103static int cs35l56_dsp_init(struct cs35l56_private *cs35l56)1104{1105 struct wm_adsp *dsp;1106 int ret;1107 1108 cs35l56->dsp_wq = create_singlethread_workqueue("cs35l56-dsp");1109 if (!cs35l56->dsp_wq)1110 return -ENOMEM;1111 1112 INIT_WORK(&cs35l56->dsp_work, cs35l56_dsp_work);1113 1114 dsp = &cs35l56->dsp;1115 cs35l56_init_cs_dsp(&cs35l56->base, &dsp->cs_dsp);1116 1117 /*1118 * dsp->part is filled in later as it is based on the DEVID. In a1119 * SoundWire system that cannot be read until enumeration has occurred1120 * and the device has attached.1121 */1122 dsp->fw = 12;1123 dsp->wmfw_optional = true;1124 1125 /*1126 * None of the firmware controls need to be exported so add a no-op1127 * callback that suppresses creating an ALSA control.1128 */1129 dsp->control_add = &cs35l56_control_add_nop;1130 1131 dev_dbg(cs35l56->base.dev, "DSP system name: '%s'\n", dsp->system_name);1132 1133 ret = wm_halo_init(dsp);1134 if (ret != 0) {1135 dev_err(cs35l56->base.dev, "wm_halo_init failed\n");1136 return ret;1137 }1138 1139 return 0;1140}1141 1142static int cs35l56_get_firmware_uid(struct cs35l56_private *cs35l56)1143{1144 struct device *dev = cs35l56->base.dev;1145 const char *prop;1146 int ret;1147 1148 ret = device_property_read_string(dev, "cirrus,firmware-uid", &prop);1149 /* If bad sw node property, return 0 and fallback to legacy firmware path */1150 if (ret < 0)1151 return 0;1152 1153 /* Append a speaker qualifier if there is a speaker ID */1154 if (cs35l56->speaker_id >= 0)1155 cs35l56->dsp.system_name = devm_kasprintf(dev, GFP_KERNEL, "%s-spkid%d",1156 prop, cs35l56->speaker_id);1157 else1158 cs35l56->dsp.system_name = devm_kstrdup(dev, prop, GFP_KERNEL);1159 1160 if (cs35l56->dsp.system_name == NULL)1161 return -ENOMEM;1162 1163 dev_dbg(dev, "Firmware UID: %s\n", cs35l56->dsp.system_name);1164 1165 return 0;1166}1167 1168/*1169 * Some SoundWire laptops have a spk-id-gpios property but it points to1170 * the wrong ACPI Device node so can't be used to get the GPIO. Try to1171 * find the SDCA node containing the GpioIo resource and add a GPIO1172 * mapping to it.1173 */1174static const struct acpi_gpio_params cs35l56_af01_first_gpio = { 0, 0, false };1175static const struct acpi_gpio_mapping cs35l56_af01_spkid_gpios_mapping[] = {1176 { "spk-id-gpios", &cs35l56_af01_first_gpio, 1 },1177 { }1178};1179 1180static void cs35l56_acpi_dev_release_driver_gpios(void *adev)1181{1182 acpi_dev_remove_driver_gpios(adev);1183}1184 1185static int cs35l56_try_get_broken_sdca_spkid_gpio(struct cs35l56_private *cs35l56)1186{1187 struct fwnode_handle *af01_fwnode;1188 const union acpi_object *obj;1189 struct gpio_desc *desc;1190 int ret;1191 1192 /* Find the SDCA node containing the GpioIo */1193 af01_fwnode = device_get_named_child_node(cs35l56->base.dev, "AF01");1194 if (!af01_fwnode) {1195 dev_dbg(cs35l56->base.dev, "No AF01 node\n");1196 return -ENOENT;1197 }1198 1199 ret = acpi_dev_get_property(ACPI_COMPANION(cs35l56->base.dev),1200 "spk-id-gpios", ACPI_TYPE_PACKAGE, &obj);1201 if (ret) {1202 dev_dbg(cs35l56->base.dev, "Could not get spk-id-gpios package: %d\n", ret);1203 fwnode_handle_put(af01_fwnode);1204 return -ENOENT;1205 }1206 1207 /* The broken properties we can handle are a 4-element package (one GPIO) */1208 if (obj->package.count != 4) {1209 dev_warn(cs35l56->base.dev, "Unexpected spk-id element count %d\n",1210 obj->package.count);1211 fwnode_handle_put(af01_fwnode);1212 return -ENOENT;1213 }1214 1215 /* Add a GPIO mapping if it doesn't already have one */1216 if (!fwnode_property_present(af01_fwnode, "spk-id-gpios")) {1217 struct acpi_device *adev = to_acpi_device_node(af01_fwnode);1218 1219 /*1220 * Can't use devm_acpi_dev_add_driver_gpios() because the1221 * mapping isn't being added to the node pointed to by1222 * ACPI_COMPANION().1223 */1224 ret = acpi_dev_add_driver_gpios(adev, cs35l56_af01_spkid_gpios_mapping);1225 if (ret) {1226 fwnode_handle_put(af01_fwnode);1227 return dev_err_probe(cs35l56->base.dev, ret,1228 "Failed to add gpio mapping to AF01\n");1229 }1230 1231 ret = devm_add_action_or_reset(cs35l56->base.dev,1232 cs35l56_acpi_dev_release_driver_gpios,1233 adev);1234 if (ret) {1235 fwnode_handle_put(af01_fwnode);1236 return ret;1237 }1238 1239 dev_dbg(cs35l56->base.dev, "Added spk-id-gpios mapping to AF01\n");1240 }1241 1242 desc = fwnode_gpiod_get_index(af01_fwnode, "spk-id", 0, GPIOD_IN, NULL);1243 if (IS_ERR(desc)) {1244 fwnode_handle_put(af01_fwnode);1245 ret = PTR_ERR(desc);1246 return dev_err_probe(cs35l56->base.dev, ret, "Get GPIO from AF01 failed\n");1247 }1248 1249 ret = gpiod_get_value_cansleep(desc);1250 gpiod_put(desc);1251 1252 if (ret < 0) {1253 fwnode_handle_put(af01_fwnode);1254 dev_err_probe(cs35l56->base.dev, ret, "Error reading spk-id GPIO\n");1255 return ret;1256 }1257 1258 fwnode_handle_put(af01_fwnode);1259 1260 dev_info(cs35l56->base.dev, "Got spk-id from AF01\n");1261 1262 return ret;1263}1264 1265int cs35l56_common_probe(struct cs35l56_private *cs35l56)1266{1267 int ret;1268 1269 init_completion(&cs35l56->init_completion);1270 mutex_init(&cs35l56->base.irq_lock);1271 cs35l56->base.cal_index = -1;1272 cs35l56->speaker_id = -ENOENT;1273 1274 dev_set_drvdata(cs35l56->base.dev, cs35l56);1275 1276 cs35l56_fill_supply_names(cs35l56->supplies);1277 ret = devm_regulator_bulk_get(cs35l56->base.dev, ARRAY_SIZE(cs35l56->supplies),1278 cs35l56->supplies);1279 if (ret != 0)1280 return dev_err_probe(cs35l56->base.dev, ret, "Failed to request supplies\n");1281 1282 /* Reset could be controlled by the BIOS or shared by multiple amps */1283 cs35l56->base.reset_gpio = devm_gpiod_get_optional(cs35l56->base.dev, "reset",1284 GPIOD_OUT_LOW);1285 if (IS_ERR(cs35l56->base.reset_gpio)) {1286 ret = PTR_ERR(cs35l56->base.reset_gpio);1287 /*1288 * If RESET is shared the first amp to probe will grab the reset1289 * line and reset all the amps1290 */1291 if (ret != -EBUSY)1292 return dev_err_probe(cs35l56->base.dev, ret, "Failed to get reset GPIO\n");1293 1294 dev_info(cs35l56->base.dev, "Reset GPIO busy, assume shared reset\n");1295 cs35l56->base.reset_gpio = NULL;1296 }1297 1298 ret = regulator_bulk_enable(ARRAY_SIZE(cs35l56->supplies), cs35l56->supplies);1299 if (ret != 0)1300 return dev_err_probe(cs35l56->base.dev, ret, "Failed to enable supplies\n");1301 1302 if (cs35l56->base.reset_gpio) {1303 /* ACPI can override GPIOD_OUT_LOW flag so force it to start low */1304 gpiod_set_value_cansleep(cs35l56->base.reset_gpio, 0);1305 cs35l56_wait_min_reset_pulse();1306 gpiod_set_value_cansleep(cs35l56->base.reset_gpio, 1);1307 }1308 1309 ret = cs35l56_get_speaker_id(&cs35l56->base);1310 if (ACPI_COMPANION(cs35l56->base.dev) && cs35l56->sdw_peripheral && (ret == -ENOENT))1311 ret = cs35l56_try_get_broken_sdca_spkid_gpio(cs35l56);1312 1313 if ((ret < 0) && (ret != -ENOENT))1314 goto err;1315 1316 cs35l56->speaker_id = ret;1317 1318 ret = cs35l56_get_firmware_uid(cs35l56);1319 if (ret != 0)1320 goto err;1321 1322 ret = cs35l56_dsp_init(cs35l56);1323 if (ret < 0) {1324 dev_err_probe(cs35l56->base.dev, ret, "DSP init failed\n");1325 goto err;1326 }1327 1328 ret = devm_snd_soc_register_component(cs35l56->base.dev,1329 &soc_component_dev_cs35l56,1330 cs35l56_dai, ARRAY_SIZE(cs35l56_dai));1331 if (ret < 0) {1332 dev_err_probe(cs35l56->base.dev, ret, "Register codec failed\n");1333 goto err;1334 }1335 1336 return 0;1337 1338err:1339 gpiod_set_value_cansleep(cs35l56->base.reset_gpio, 0);1340 regulator_bulk_disable(ARRAY_SIZE(cs35l56->supplies), cs35l56->supplies);1341 1342 return ret;1343}1344EXPORT_SYMBOL_NS_GPL(cs35l56_common_probe, SND_SOC_CS35L56_CORE);1345 1346int cs35l56_init(struct cs35l56_private *cs35l56)1347{1348 int ret;1349 1350 /*1351 * Check whether the actions associated with soft reset or one time1352 * init need to be performed.1353 */1354 if (cs35l56->soft_resetting)1355 goto post_soft_reset;1356 1357 if (cs35l56->base.init_done)1358 return 0;1359 1360 pm_runtime_set_autosuspend_delay(cs35l56->base.dev, 100);1361 pm_runtime_use_autosuspend(cs35l56->base.dev);1362 pm_runtime_set_active(cs35l56->base.dev);1363 pm_runtime_enable(cs35l56->base.dev);1364 1365 ret = cs35l56_hw_init(&cs35l56->base);1366 if (ret < 0)1367 return ret;1368 1369 ret = cs35l56_set_patch(&cs35l56->base);1370 if (ret)1371 return ret;1372 1373 ret = cs35l56_get_calibration(&cs35l56->base);1374 if (ret)1375 return ret;1376 1377 if (!cs35l56->base.reset_gpio) {1378 dev_dbg(cs35l56->base.dev, "No reset gpio: using soft reset\n");1379 cs35l56->soft_resetting = true;1380 cs35l56_system_reset(&cs35l56->base, !!cs35l56->sdw_peripheral);1381 if (cs35l56->sdw_peripheral) {1382 /* Keep alive while we wait for re-enumeration */1383 pm_runtime_get_noresume(cs35l56->base.dev);1384 return 0;1385 }1386 }1387 1388post_soft_reset:1389 if (cs35l56->soft_resetting) {1390 cs35l56->soft_resetting = false;1391 1392 /* Done re-enumerating after one-time init so release the keep-alive */1393 if (cs35l56->sdw_peripheral && !cs35l56->base.init_done)1394 pm_runtime_put_noidle(cs35l56->base.dev);1395 1396 regcache_mark_dirty(cs35l56->base.regmap);1397 ret = cs35l56_wait_for_firmware_boot(&cs35l56->base);1398 if (ret)1399 return ret;1400 1401 dev_dbg(cs35l56->base.dev, "Firmware rebooted after soft reset\n");1402 1403 regcache_cache_only(cs35l56->base.regmap, false);1404 }1405 1406 /* Disable auto-hibernate so that runtime_pm has control */1407 ret = cs35l56_mbox_send(&cs35l56->base, CS35L56_MBOX_CMD_PREVENT_AUTO_HIBERNATE);1408 if (ret)1409 return ret;1410 1411 /* Registers could be dirty after soft reset or SoundWire enumeration */1412 regcache_sync(cs35l56->base.regmap);1413 1414 /* Set ASP1 DOUT to high-impedance when it is not transmitting audio data. */1415 ret = regmap_set_bits(cs35l56->base.regmap, CS35L56_ASP1_CONTROL3,1416 CS35L56_ASP1_DOUT_HIZ_CTRL_MASK);1417 if (ret)1418 return dev_err_probe(cs35l56->base.dev, ret, "Failed to write ASP1_CONTROL3\n");1419 1420 cs35l56->base.init_done = true;1421 complete(&cs35l56->init_completion);1422 1423 return 0;1424}1425EXPORT_SYMBOL_NS_GPL(cs35l56_init, SND_SOC_CS35L56_CORE);1426 1427void cs35l56_remove(struct cs35l56_private *cs35l56)1428{1429 cs35l56->base.init_done = false;1430 1431 /*1432 * WAKE IRQs unmask if CS35L56 hibernates so free the handler to1433 * prevent it racing with remove().1434 */1435 if (cs35l56->base.irq)1436 devm_free_irq(cs35l56->base.dev, cs35l56->base.irq, &cs35l56->base);1437 1438 flush_workqueue(cs35l56->dsp_wq);1439 destroy_workqueue(cs35l56->dsp_wq);1440 1441 pm_runtime_dont_use_autosuspend(cs35l56->base.dev);1442 pm_runtime_suspend(cs35l56->base.dev);1443 pm_runtime_disable(cs35l56->base.dev);1444 1445 regcache_cache_only(cs35l56->base.regmap, true);1446 1447 gpiod_set_value_cansleep(cs35l56->base.reset_gpio, 0);1448 regulator_bulk_disable(ARRAY_SIZE(cs35l56->supplies), cs35l56->supplies);1449}1450EXPORT_SYMBOL_NS_GPL(cs35l56_remove, SND_SOC_CS35L56_CORE);1451 1452#if IS_ENABLED(CONFIG_SND_SOC_CS35L56_I2C) || IS_ENABLED(CONFIG_SND_SOC_CS35L56_SPI)1453EXPORT_NS_GPL_DEV_PM_OPS(cs35l56_pm_ops_i2c_spi, SND_SOC_CS35L56_CORE) = {1454 SET_RUNTIME_PM_OPS(cs35l56_runtime_suspend_i2c_spi, cs35l56_runtime_resume_i2c_spi, NULL)1455 SYSTEM_SLEEP_PM_OPS(cs35l56_system_suspend, cs35l56_system_resume)1456 LATE_SYSTEM_SLEEP_PM_OPS(cs35l56_system_suspend_late, cs35l56_system_resume_early)1457 NOIRQ_SYSTEM_SLEEP_PM_OPS(cs35l56_system_suspend_no_irq, cs35l56_system_resume_no_irq)1458};1459#endif1460 1461MODULE_DESCRIPTION("ASoC CS35L56 driver");1462MODULE_IMPORT_NS(SND_SOC_CS35L56_SHARED);1463MODULE_IMPORT_NS(SND_SOC_CS_AMP_LIB);1464MODULE_AUTHOR("Richard Fitzgerald <rf@opensource.cirrus.com>");1465MODULE_AUTHOR("Simon Trimmer <simont@opensource.cirrus.com>");1466MODULE_LICENSE("GPL");1467