288 lines · c
1/* SPDX-License-Identifier: GPL-2.0-only */2/*3 * ALSA SoC Audio driver for CS4234 codec4 *5 * Copyright (C) 2020 Cirrus Logic, Inc. and6 * Cirrus Logic International Semiconductor Ltd.7 */8 9#ifndef CS4234_H10#define CS4234_H11 12#define CS4234_DEVID_AB 0x0113#define CS4234_DEVID_CD 0x0214#define CS4234_DEVID_EF 0x0315#define CS4234_REVID 0x0516 17#define CS4234_CLOCK_SP 0x0618#define CS4234_BASE_RATE_MASK 0xC019#define CS4234_BASE_RATE_SHIFT 620#define CS4234_SPEED_MODE_MASK 0x3021#define CS4234_SPEED_MODE_SHIFT 422#define CS4234_MCLK_RATE_MASK 0x0E23#define CS4234_MCLK_RATE_SHIFT 124 25#define CS4234_SAMPLE_WIDTH 0x0726#define CS4234_SDOUTX_SW_MASK 0xC027#define CS4234_SDOUTX_SW_SHIFT 628#define CS4234_INPUT_SW_MASK 0x3029#define CS4234_INPUT_SW_SHIFT 430#define CS4234_LOW_LAT_SW_MASK 0x0C31#define CS4234_LOW_LAT_SW_SHIFT 232#define CS4234_DAC5_SW_MASK 0x0333#define CS4234_DAC5_SW_SHIFT 034 35#define CS4234_SP_CTRL 0x0836#define CS4234_INVT_SCLK_MASK 0x8037#define CS4234_INVT_SCLK_SHIFT 738#define CS4234_DAC5_SRC_MASK 0x7039#define CS4234_DAC5_SRC_SHIFT 440#define CS4234_SP_FORMAT_MASK 0x0C41#define CS4234_SP_FORMAT_SHIFT 242#define CS4234_SDO_CHAIN_MASK 0x0243#define CS4234_SDO_CHAIN_SHIFT 144#define CS4234_MST_SLV_MASK 0x0145#define CS4234_MST_SLV_SHIFT 046 47#define CS4234_SP_DATA_SEL 0x0948#define CS4234_DAC14_SRC_MASK 0x3849#define CS4234_DAC14_SRC_SHIFT 350#define CS4234_LL_SRC_MASK 0x0751#define CS4234_LL_SRC_SHIFT 052 53#define CS4234_SDIN1_MASK1 0x0A54#define CS4234_SDIN1_MASK2 0x0B55#define CS4234_SDIN2_MASK1 0x0C56#define CS4234_SDIN2_MASK2 0x0D57 58#define CS4234_TPS_CTRL 0x0E59#define CS4234_TPS_MODE_MASK 0x8060#define CS4234_TPS_MODE_SHIFT 761#define CS4234_TPS_OFST_MASK 0x7062#define CS4234_TPS_OFST_SHIFT 463#define CS4234_GRP_DELAY_MASK 0x0F64#define CS4234_GRP_DELAY_SHIFT 065 66#define CS4234_ADC_CTRL1 0x0F67#define CS4234_VA_SEL_MASK 0x2068#define CS4234_VA_SEL_SHIFT 569#define CS4234_ENA_HPF_MASK 0x1070#define CS4234_ENA_HPF_SHIFT 471#define CS4234_INV_ADC_MASK 0x0F72#define CS4234_INV_ADC4_MASK 0x0873#define CS4234_INV_ADC4_SHIFT 374#define CS4234_INV_ADC3_MASK 0x0475#define CS4234_INV_ADC3_SHIFT 276#define CS4234_INV_ADC2_MASK 0x0277#define CS4234_INV_ADC2_SHIFT 178#define CS4234_INV_ADC1_MASK 0x0179#define CS4234_INV_ADC1_SHIFT 080 81#define CS4234_ADC_CTRL2 0x1082#define CS4234_MUTE_ADC4_MASK 0x8083#define CS4234_MUTE_ADC4_SHIFT 784#define CS4234_MUTE_ADC3_MASK 0x4085#define CS4234_MUTE_ADC3_SHIFT 686#define CS4234_MUTE_ADC2_MASK 0x2087#define CS4234_MUTE_ADC2_SHIFT 588#define CS4234_MUTE_ADC1_MASK 0x1089#define CS4234_MUTE_ADC1_SHIFT 490#define CS4234_PDN_ADC4_MASK 0x0891#define CS4234_PDN_ADC4_SHIFT 392#define CS4234_PDN_ADC3_MASK 0x0493#define CS4234_PDN_ADC3_SHIFT 294#define CS4234_PDN_ADC2_MASK 0x0295#define CS4234_PDN_ADC2_SHIFT 196#define CS4234_PDN_ADC1_MASK 0x0197#define CS4234_PDN_ADC1_SHIFT 098 99#define CS4234_LOW_LAT_CTRL1 0x11100#define CS4234_LL_NG_MASK 0xE0101#define CS4234_LL_NG_SHIFT 5102#define CS4234_INV_LL_MASK 0x0F103#define CS4234_INV_LL4_MASK 0x08104#define CS4234_INV_LL4_SHIFT 3105#define CS4234_INV_LL3_MASK 0x04106#define CS4234_INV_LL3_SHIFT 2107#define CS4234_INV_LL2_MASK 0x02108#define CS4234_INV_LL2_SHIFT 1109#define CS4234_INV_LL1_MASK 0x01110#define CS4234_INV_LL1_SHIFT 0111 112#define CS4234_DAC_CTRL1 0x12113#define CS4234_DAC14_NG_MASK 0xE0114#define CS4234_DAC14_NG_SHIFT 5115#define CS4234_DAC14_DE_MASK 0x10116#define CS4234_DAC14_DE_SHIFT 4117#define CS4234_DAC5_DE_MASK 0x08118#define CS4234_DAC5_DE_SHIFT 3119#define CS4234_DAC5_MVC_MASK 0x04120#define CS4234_DAC5_MVC_SHIFT 2121#define CS4234_DAC5_CFG_FLTR_MASK 0x03122#define CS4234_DAC5_CFG_FLTR_SHIFT 0123 124#define CS4234_DAC_CTRL2 0x13125#define CS4234_DAC5_NG_MASK 0xE0126#define CS4234_DAC5_NG_SHIFT 5127#define CS4234_INV_DAC_MASK 0x1F128#define CS4234_INV_DAC5_MASK 0x10129#define CS4234_INV_DAC5_SHIFT 4130#define CS4234_INV_DAC4_MASK 0x08131#define CS4234_INV_DAC4_SHIFT 3132#define CS4234_INV_DAC3_MASK 0x04133#define CS4234_INV_DAC3_SHIFT 2134#define CS4234_INV_DAC2_MASK 0x02135#define CS4234_INV_DAC2_SHIFT 1136#define CS4234_INV_DAC1_MASK 0x01137#define CS4234_INV_DAC1_SHIFT 0138 139#define CS4234_DAC_CTRL3 0x14140#define CS4234_DAC5_ATT_MASK 0x80141#define CS4234_DAC5_ATT_SHIFT 7142#define CS4234_DAC14_ATT_MASK 0x40143#define CS4234_DAC14_ATT_SHIFT 6144#define CS4234_MUTE_LL_MASK 0x20145#define CS4234_MUTE_LL_SHIFT 5146#define CS4234_MUTE_DAC5_MASK 0x10147#define CS4234_MUTE_DAC5_SHIFT 4148#define CS4234_MUTE_DAC4_MASK 0x08149#define CS4234_MUTE_DAC4_SHIFT 3150#define CS4234_MUTE_DAC3_MASK 0x04151#define CS4234_MUTE_DAC3_SHIFT 2152#define CS4234_MUTE_DAC2_MASK 0x02153#define CS4234_MUTE_DAC2_SHIFT 1154#define CS4234_MUTE_DAC1_MASK 0x01155#define CS4234_MUTE_DAC1_SHIFT 0156 157#define CS4234_DAC_CTRL4 0x15158#define CS4234_VQ_RAMP_MASK 0x80159#define CS4234_VQ_RAMP_SHIFT 7160#define CS4234_TPS_GAIN_MASK 0x40161#define CS4234_TPS_GAIN_SHIFT 6162#define CS4234_PDN_DAC5_MASK 0x10163#define CS4234_PDN_DAC5_SHIFT 4164#define CS4234_PDN_DAC4_MASK 0x08165#define CS4234_PDN_DAC4_SHIFT 3166#define CS4234_PDN_DAC3_MASK 0x04167#define CS4234_PDN_DAC3_SHIFT 2168#define CS4234_PDN_DAC2_MASK 0x02169#define CS4234_PDN_DAC2_SHIFT 1170#define CS4234_PDN_DAC1_MASK 0x01171#define CS4234_PDN_DAC1_SHIFT 0172 173#define CS4234_VOLUME_MODE 0x16174#define CS4234_MUTE_DELAY_MASK 0xC0175#define CS4234_MUTE_DELAY_SHIFT 6176#define CS4234_MIN_DELAY_MASK 0x38177#define CS4234_MIN_DELAY_SHIFT 3178#define CS4234_MAX_DELAY_MASK 0x07179#define CS4234_MAX_DELAY_SHIFT 0180 181#define CS4234_MASTER_VOL 0x17182#define CS4234_DAC1_VOL 0x18183#define CS4234_DAC2_VOL 0x19184#define CS4234_DAC3_VOL 0x1A185#define CS4234_DAC4_VOL 0x1B186#define CS4234_DAC5_VOL 0x1C187 188#define CS4234_INT_CTRL 0x1E189#define CS4234_INT_MODE_MASK 0x80190#define CS4234_INT_MODE_SHIFT 7191#define CS4234_INT_PIN_MASK 0x60192#define CS4234_INT_PIN_SHIFT 5193 194#define CS4234_INT_MASK1 0x1F195#define CS4234_MSK_TST_MODE_MASK 0x80196#define CS4234_MSK_TST_MODE_ERR_SHIFT 7197#define CS4234_MSK_SP_ERR_MASK 0x40198#define CS4234_MSK_SP_ERR_SHIFT 6199#define CS4234_MSK_CLK_ERR_MASK 0x08200#define CS4234_MSK_CLK_ERR_SHIFT 5201#define CS4234_MSK_ADC4_OVFL_MASK 0x08202#define CS4234_MSK_ADC4_OVFL_SHIFT 3203#define CS4234_MSK_ADC3_OVFL_MASK 0x04204#define CS4234_MSK_ADC3_OVFL_SHIFT 2205#define CS4234_MSK_ADC2_OVFL_MASK 0x02206#define CS4234_MSK_ADC2_OVFL_SHIFT 1207#define CS4234_MSK_ADC1_OVFL_MASK 0x01208#define CS4234_MSK_ADC1_OVFL_SHIFT 0209 210#define CS4234_INT_MASK2 0x20211#define CS4234_MSK_DAC5_CLIP_MASK 0x10212#define CS4234_MSK_DAC5_CLIP_SHIFT 4213#define CS4234_MSK_DAC4_CLIP_MASK 0x08214#define CS4234_MSK_DAC4_CLIP_SHIFT 3215#define CS4234_MSK_DAC3_CLIP_MASK 0x04216#define CS4234_MSK_DAC3_CLIP_SHIFT 2217#define CS4234_MSK_DAC2_CLIP_MASK 0x02218#define CS4234_MSK_DAC2_CLIP_SHIFT 1219#define CS4234_MSK_DAC1_CLIP_MASK 0x01220#define CS4234_MSK_DAC1_CLIP_SHIFT 0221 222#define CS4234_INT_NOTIFY1 0x21223#define CS4234_TST_MODE_MASK 0x80224#define CS4234_TST_MODE_SHIFT 7225#define CS4234_SP_ERR_MASK 0x40226#define CS4234_SP_ERR_SHIFT 6227#define CS4234_CLK_MOD_ERR_MASK 0x08228#define CS4234_CLK_MOD_ERR_SHIFT 5229#define CS4234_ADC4_OVFL_MASK 0x08230#define CS4234_ADC4_OVFL_SHIFT 3231#define CS4234_ADC3_OVFL_MASK 0x04232#define CS4234_ADC3_OVFL_SHIFT 2233#define CS4234_ADC2_OVFL_MASK 0x02234#define CS4234_ADC2_OVFL_SHIFT 1235#define CS4234_ADC1_OVFL_MASK 0x01236#define CS4234_ADC1_OVFL_SHIFT 0237 238#define CS4234_INT_NOTIFY2 0x22239#define CS4234_DAC5_CLIP_MASK 0x10240#define CS4234_DAC5_CLIP_SHIFT 4241#define CS4234_DAC4_CLIP_MASK 0x08242#define CS4234_DAC4_CLIP_SHIFT 3243#define CS4234_DAC3_CLIP_MASK 0x04244#define CS4234_DAC3_CLIP_SHIFT 2245#define CS4234_DAC2_CLIP_MASK 0x02246#define CS4234_DAC2_CLIP_SHIFT 1247#define CS4234_DAC1_CLIP_MASK 0x01248#define CS4234_DAC1_CLIP_SHIFT 0249 250#define CS4234_MAX_REGISTER CS4234_INT_NOTIFY2251 252#define CS4234_SUPPORTED_ID 0x423400253#define CS4234_BOOT_TIME_US 3000254#define CS4234_HOLD_RESET_TIME_US 1000255#define CS4234_VQ_CHARGE_MS 1000256 257#define CS4234_PCM_RATES (SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | \258 SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_64000 | \259 SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000)260 261#define CS4234_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S18_3LE | \262 SNDRV_PCM_FMTBIT_S20_LE | SNDRV_PCM_FMTBIT_S24_LE | \263 SNDRV_PCM_FMTBIT_S24_3LE)264 265enum cs4234_supplies {266 CS4234_SUPPLY_VA = 0,267 CS4234_SUPPLY_VL,268};269 270enum cs4234_va_sel {271 CS4234_3V3 = 0,272 CS4234_5V,273};274 275enum cs4234_sp_format {276 CS4234_LEFT_J = 0,277 CS4234_I2S,278 CS4234_TDM,279};280 281enum cs4234_base_rate_advisory {282 CS4234_48K = 0,283 CS4234_44K1,284 CS4234_32K,285};286 287#endif288