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1/* SPDX-License-Identifier: GPL-2.0-only */2/*3 * cs42l52.h -- CS42L56 ALSA SoC audio driver4 *5 * Copyright 2014 CirrusLogic, Inc.6 *7 * Author: Brian Austin <brian.austin@cirrus.com>8 */9 10#ifndef __CS42L56_H__11#define __CS42L56_H__12 13#define CS42L56_CHIP_ID_1 0x0114#define CS42L56_CHIP_ID_2 0x0215#define CS42L56_PWRCTL_1 0x0316#define CS42L56_PWRCTL_2 0x0417#define CS42L56_CLKCTL_1 0x0518#define CS42L56_CLKCTL_2 0x0619#define CS42L56_SERIAL_FMT 0x0720#define CS42L56_CLASSH_CTL 0x0821#define CS42L56_MISC_CTL 0x0922#define CS42L56_INT_STATUS 0x0a23#define CS42L56_PLAYBACK_CTL 0x0b24#define CS42L56_DSP_MUTE_CTL 0x0c25#define CS42L56_ADCA_MIX_VOLUME 0x0d26#define CS42L56_ADCB_MIX_VOLUME 0x0e27#define CS42L56_PCMA_MIX_VOLUME 0x0f28#define CS42L56_PCMB_MIX_VOLUME 0x1029#define CS42L56_ANAINPUT_ADV_VOLUME 0x1130#define CS42L56_DIGINPUT_ADV_VOLUME 0x1231#define CS42L56_MASTER_A_VOLUME 0x1332#define CS42L56_MASTER_B_VOLUME 0x1433#define CS42L56_BEEP_FREQ_ONTIME 0x1534#define CS42L56_BEEP_FREQ_OFFTIME 0x1635#define CS42L56_BEEP_TONE_CFG 0x1736#define CS42L56_TONE_CTL 0x1837#define CS42L56_CHAN_MIX_SWAP 0x1938#define CS42L56_AIN_REFCFG_ADC_MUX 0x1a39#define CS42L56_HPF_CTL 0x1b40#define CS42L56_MISC_ADC_CTL 0x1c41#define CS42L56_GAIN_BIAS_CTL 0x1d42#define CS42L56_PGAA_MUX_VOLUME 0x1e43#define CS42L56_PGAB_MUX_VOLUME 0x1f44#define CS42L56_ADCA_ATTENUATOR 0x2045#define CS42L56_ADCB_ATTENUATOR 0x2146#define CS42L56_ALC_EN_ATTACK_RATE 0x2247#define CS42L56_ALC_RELEASE_RATE 0x2348#define CS42L56_ALC_THRESHOLD 0x2449#define CS42L56_NOISE_GATE_CTL 0x2550#define CS42L56_ALC_LIM_SFT_ZC 0x2651#define CS42L56_AMUTE_HPLO_MUX 0x2752#define CS42L56_HPA_VOLUME 0x2853#define CS42L56_HPB_VOLUME 0x2954#define CS42L56_LOA_VOLUME 0x2a55#define CS42L56_LOB_VOLUME 0x2b56#define CS42L56_LIM_THRESHOLD_CTL 0x2c57#define CS42L56_LIM_CTL_RELEASE_RATE 0x2d58#define CS42L56_LIM_ATTACK_RATE 0x2e59 60/* Device ID and Rev ID Masks */61#define CS42L56_DEVID 0x5662#define CS42L56_CHIP_ID_MASK 0xff63#define CS42L56_AREV_MASK 0x1c64#define CS42L56_MTLREV_MASK 0x0365 66/* Power bit masks */67#define CS42L56_PDN_ALL_MASK 0x0168#define CS42L56_PDN_ADCA_MASK 0x0269#define CS42L56_PDN_ADCB_MASK 0x0470#define CS42L56_PDN_CHRG_MASK 0x0871#define CS42L56_PDN_BIAS_MASK 0x1072#define CS42L56_PDN_VBUF_MASK 0x2073#define CS42L56_PDN_LOA_MASK 0x0374#define CS42L56_PDN_LOB_MASK 0x0c75#define CS42L56_PDN_HPA_MASK 0x3076#define CS42L56_PDN_HPB_MASK 0xc077 78/* serial port and clk masks */79#define CS42L56_MASTER_MODE 0x4080#define CS42L56_SLAVE_MODE 081#define CS42L56_MS_MODE_MASK 0x4082#define CS42L56_SCLK_INV 0x2083#define CS42L56_SCLK_INV_MASK 0x2084#define CS42L56_SCLK_MCLK_MASK 0x1885#define CS42L56_MCLK_PREDIV 0x0486#define CS42L56_MCLK_PREDIV_MASK 0x0487#define CS42L56_MCLK_DIV2 0x0288#define CS42L56_MCLK_DIV2_MASK 0x0289#define CS42L56_MCLK_DIS_MASK 0x0190#define CS42L56_CLK_AUTO_MASK 0x2091#define CS42L56_CLK_RATIO_MASK 0x1f92#define CS42L56_DIG_FMT_I2S 093#define CS42L56_DIG_FMT_LEFT_J 0x0894#define CS42L56_DIG_FMT_MASK 0x0895 96/* Class H and misc ctl masks */97#define CS42L56_ADAPT_PWR_MASK 0xc098#define CS42L56_CHRG_FREQ_MASK 0x0f99#define CS42L56_DIG_MUX_MASK 0x80100#define CS42L56_ANLGSFT_MASK 0x10101#define CS42L56_ANLGZC_MASK 0x08102#define CS42L56_DIGSFT_MASK 0x04103#define CS42L56_FREEZE_MASK 0x01104#define CS42L56_MIC_BIAS_MASK 0x03105#define CS42L56_HPFA_FREQ_MASK 0x03106#define CS42L56_HPFB_FREQ_MASK 0xc0107#define CS42L56_AIN1A_REF_MASK 0x10108#define CS42L56_AIN2A_REF_MASK 0x40109#define CS42L56_AIN1B_REF_MASK 0x20110#define CS42L56_AIN2B_REF_MASK 0x80111 112/* Playback Capture ctl masks */113#define CS42L56_PDN_DSP_MASK 0x80114#define CS42L56_DEEMPH_MASK 0x40115#define CS42L56_PLYBCK_GANG_MASK 0x10116#define CS42L56_PCM_INV_MASK 0x0c117#define CS42L56_MUTE_ALL 0xff118#define CS42L56_UNMUTE 0119#define CS42L56_ADCAMIX_MUTE_MASK 0x40120#define CS42L56_ADCBMIX_MUTE_MASK 0x80121#define CS42L56_PCMAMIX_MUTE_MASK 0x10122#define CS42L56_PCMBMIX_MUTE_MASK 0x20123#define CS42L56_MSTB_MUTE_MASK 0x02124#define CS42L56_MSTA_MUTE_MASK 0x01125#define CS42L56_ADCA_MUTE_MASK 0x01126#define CS42L56_ADCB_MUTE_MASK 0x02127#define CS42L56_HP_MUTE_MASK 0x80128#define CS42L56_LO_MUTE_MASK 0x80129 130/* Beep masks */131#define CS42L56_BEEP_FREQ_MASK 0xf0132#define CS42L56_BEEP_ONTIME_MASK 0x0f133#define CS42L56_BEEP_OFFTIME_MASK 0xe0134#define CS42L56_BEEP_CFG_MASK 0xc0135#define CS42L56_BEEP_TREBCF_MASK 0x18136#define CS42L56_BEEP_BASSCF_MASK 0x06137#define CS42L56_BEEP_TCEN_MASK 0x01138#define CS42L56_BEEP_RATE_SHIFT 4139#define CS42L56_BEEP_EN_MASK 0x3f140 141 142/* Supported MCLKS */143#define CS42L56_MCLK_5P6448MHZ 5644800144#define CS42L56_MCLK_6MHZ 6000000145#define CS42L56_MCLK_6P144MHZ 6144000146#define CS42L56_MCLK_11P2896MHZ 11289600147#define CS42L56_MCLK_12MHZ 12000000148#define CS42L56_MCLK_12P288MHZ 12288000149#define CS42L56_MCLK_22P5792MHZ 22579200150#define CS42L56_MCLK_24MHZ 24000000151#define CS42L56_MCLK_24P576MHZ 24576000152 153/* Clock ratios */154#define CS42L56_MCLK_LRCLK_128 0x08155#define CS42L56_MCLK_LRCLK_125 0x09156#define CS42L56_MCLK_LRCLK_136 0x0b157#define CS42L56_MCLK_LRCLK_192 0x0c158#define CS42L56_MCLK_LRCLK_187P5 0x0d159#define CS42L56_MCLK_LRCLK_256 0x10160#define CS42L56_MCLK_LRCLK_250 0x11161#define CS42L56_MCLK_LRCLK_272 0x13162#define CS42L56_MCLK_LRCLK_384 0x14163#define CS42L56_MCLK_LRCLK_375 0x15164#define CS42L56_MCLK_LRCLK_512 0x18165#define CS42L56_MCLK_LRCLK_500 0x19166#define CS42L56_MCLK_LRCLK_544 0x1b167#define CS42L56_MCLK_LRCLK_750 0x1c168#define CS42L56_MCLK_LRCLK_768 0x1d169 170 171#define CS42L56_MAX_REGISTER 0x34172 173#endif174