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1/* SPDX-License-Identifier: GPL-2.0-only */2/*3 * ALSA SoC CS4349 codec driver4 *5 * Copyright 2015 Cirrus Logic, Inc.6 *7 * Author: Tim Howe <Tim.Howe@cirrus.com>8 */9 10#ifndef __CS4349_H__11#define __CS4349_H__12 13/* CS4349 registers addresses */14#define CS4349_CHIPID 0x01 /* Device and Rev ID, Read Only */15#define CS4349_MODE 0x02 /* Mode Control */16#define CS4349_VMI 0x03 /* Volume, Mixing, Inversion Control */17#define CS4349_MUTE 0x04 /* Mute Control */18#define CS4349_VOLA 0x05 /* DAC Channel A Volume Control */19#define CS4349_VOLB 0x06 /* DAC Channel B Volume Control */20#define CS4349_RMPFLT 0x07 /* Ramp and Filter Control */21#define CS4349_MISC 0x08 /* Power Down,Freeze Control,Pop Stop*/22 23#define CS4349_I2C_INCR 0x8024 25 26/* Device and Revision ID */27#define CS4349_REVA 0xF0 /* Rev A */28#define CS4349_REVB 0xF1 /* Rev B */29#define CS4349_REVC2 0xFF /* Rev C2 */30 31 32/* PDN_DONE Poll Maximum33 * If soft ramp is set it will take much longer to power down34 * the system.35 */36#define PDN_POLL_MAX 90037 38 39/* Bitfield Definitions */40 41/* CS4349_MODE */42/* (Digital Interface Format, De-Emphasis Control, Functional Mode */43#define DIF2 (1 << 6)44#define DIF1 (1 << 5)45#define DIF0 (1 << 4)46#define DEM1 (1 << 3)47#define DEM0 (1 << 2)48#define FM1 (1 << 1)49#define DIF_LEFT_JST 0x0050#define DIF_I2S 0x0151#define DIF_RGHT_JST16 0x0252#define DIF_RGHT_JST24 0x0353#define DIF_TDM0 0x0454#define DIF_TDM1 0x0555#define DIF_TDM2 0x0656#define DIF_TDM3 0x0757#define DIF_MASK 0x7058#define MODE_FORMAT(x) (((x)&7)<<4)59#define DEM_MASK 0x0C60#define NO_DEM 0x0061#define DEM_441 0x0462#define DEM_48K 0x0863#define DEM_32K 0x0C64#define FM_AUTO 0x0065#define FM_SNGL 0x0166#define FM_DBL 0x0267#define FM_QUAD 0x0368#define FM_SNGL_MIN 3000069#define FM_SNGL_MAX 5400070#define FM_DBL_MAX 10800071#define FM_QUAD_MAX 21600072#define FM_MASK 0x0373 74/* CS4349_VMI (VMI = Volume, Mixing and Inversion Controls) */75#define VOLBISA (1 << 7)76#define VOLAISB (1 << 7)77/* INVERT_A only available for Left Jstfd, Right Jstfd16 and Right Jstfd24 */78#define INVERT_A (1 << 6)79/* INVERT_B only available for Left Jstfd, Right Jstfd16 and Right Jstfd24 */80#define INVERT_B (1 << 5)81#define ATAPI3 (1 << 3)82#define ATAPI2 (1 << 2)83#define ATAPI1 (1 << 1)84#define ATAPI0 (1 << 0)85#define MUTEAB 0x0086#define MUTEA_RIGHTB 0x0187#define MUTEA_LEFTB 0x0288#define MUTEA_SUMLRDIV2B 0x0389#define RIGHTA_MUTEB 0x0490#define RIGHTA_RIGHTB 0x0591#define RIGHTA_LEFTB 0x0692#define RIGHTA_SUMLRDIV2B 0x0793#define LEFTA_MUTEB 0x0894#define LEFTA_RIGHTB 0x09 /* Default */95#define LEFTA_LEFTB 0x0A96#define LEFTA_SUMLRDIV2B 0x0B97#define SUMLRDIV2A_MUTEB 0x0C98#define SUMLRDIV2A_RIGHTB 0x0D99#define SUMLRDIV2A_LEFTB 0x0E100#define SUMLRDIV2_AB 0x0F101#define CHMIX_MASK 0x0F102 103/* CS4349_MUTE */104#define AUTOMUTE (1 << 7)105#define MUTEC_AB (1 << 5)106#define MUTE_A (1 << 4)107#define MUTE_B (1 << 3)108#define MUTE_AB_MASK 0x18109 110/* CS4349_RMPFLT (Ramp and Filter Control) */111#define SCZ1 (1 << 7)112#define SCZ0 (1 << 6)113#define RMP_UP (1 << 5)114#define RMP_DN (1 << 4)115#define FILT_SEL (1 << 2)116#define IMMDT_CHNG 0x31117#define ZEROCRSS 0x71118#define SOFT_RMP 0xB1119#define SFTRMP_ZEROCRSS 0xF1120#define SR_ZC_MASK 0xC0121 122/* CS4349_MISC */123#define PWR_DWN (1 << 7)124#define FREEZE (1 << 5)125#define POPG_EN (1 << 4)126 127#endif /* __CS4349_H__ */128