1349 lines · c
1// SPDX-License-Identifier: GPL-2.0-only2//3// es8326.c -- es8326 ALSA SoC audio driver4// Copyright Everest Semiconductor Co., Ltd5//6// Authors: David Yang <yangxiaohua@everest-semi.com>7//8 9#include <linux/clk.h>10#include <linux/i2c.h>11#include <linux/interrupt.h>12#include <linux/irq.h>13#include <linux/module.h>14#include <sound/jack.h>15#include <sound/pcm_params.h>16#include <sound/soc.h>17#include <sound/soc-dapm.h>18#include <sound/tlv.h>19#include "es8326.h"20 21struct es8326_priv {22 struct clk *mclk;23 struct i2c_client *i2c;24 struct regmap *regmap;25 struct snd_soc_component *component;26 struct delayed_work jack_detect_work;27 struct delayed_work button_press_work;28 struct snd_soc_jack *jack;29 int irq;30 /* The lock protects the situation that an irq is generated31 * while enabling or disabling or during an irq.32 */33 struct mutex lock;34 u8 jack_pol;35 u8 interrupt_src;36 u8 interrupt_clk;37 u8 hpl_vol;38 u8 hpr_vol;39 bool jd_inverted;40 unsigned int sysclk;41 42 bool calibrated;43 int version;44 int hp;45 int jack_remove_retry;46};47 48static int es8326_crosstalk1_get(struct snd_kcontrol *kcontrol,49 struct snd_ctl_elem_value *ucontrol)50{51 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);52 struct es8326_priv *es8326 = snd_soc_component_get_drvdata(component);53 unsigned int crosstalk_h, crosstalk_l;54 unsigned int crosstalk;55 56 regmap_read(es8326->regmap, ES8326_DAC_RAMPRATE, &crosstalk_h);57 regmap_read(es8326->regmap, ES8326_DAC_CROSSTALK, &crosstalk_l);58 crosstalk_h &= 0x20;59 crosstalk_l &= 0xf0;60 crosstalk = crosstalk_h >> 1 | crosstalk_l >> 4;61 ucontrol->value.integer.value[0] = crosstalk;62 63 return 0;64}65 66static int es8326_crosstalk1_set(struct snd_kcontrol *kcontrol,67 struct snd_ctl_elem_value *ucontrol)68{69 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);70 struct es8326_priv *es8326 = snd_soc_component_get_drvdata(component);71 unsigned int crosstalk_h, crosstalk_l;72 unsigned int crosstalk;73 74 crosstalk = ucontrol->value.integer.value[0];75 regmap_read(es8326->regmap, ES8326_DAC_CROSSTALK, &crosstalk_l);76 crosstalk_h = (crosstalk & 0x10) << 1;77 crosstalk_l &= 0x0f;78 crosstalk_l |= (crosstalk & 0x0f) << 4;79 regmap_update_bits(es8326->regmap, ES8326_DAC_RAMPRATE,80 0x20, crosstalk_h);81 regmap_write(es8326->regmap, ES8326_DAC_CROSSTALK, crosstalk_l);82 83 return 0;84}85 86static int es8326_crosstalk2_get(struct snd_kcontrol *kcontrol,87 struct snd_ctl_elem_value *ucontrol)88{89 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);90 struct es8326_priv *es8326 = snd_soc_component_get_drvdata(component);91 unsigned int crosstalk_h, crosstalk_l;92 unsigned int crosstalk;93 94 regmap_read(es8326->regmap, ES8326_DAC_RAMPRATE, &crosstalk_h);95 regmap_read(es8326->regmap, ES8326_DAC_CROSSTALK, &crosstalk_l);96 crosstalk_h &= 0x10;97 crosstalk_l &= 0x0f;98 crosstalk = crosstalk_h | crosstalk_l;99 ucontrol->value.integer.value[0] = crosstalk;100 101 return 0;102}103 104static int es8326_crosstalk2_set(struct snd_kcontrol *kcontrol,105 struct snd_ctl_elem_value *ucontrol)106{107 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);108 struct es8326_priv *es8326 = snd_soc_component_get_drvdata(component);109 unsigned int crosstalk_h, crosstalk_l;110 unsigned int crosstalk;111 112 crosstalk = ucontrol->value.integer.value[0];113 regmap_read(es8326->regmap, ES8326_DAC_CROSSTALK, &crosstalk_l);114 crosstalk_h = crosstalk & 0x10;115 crosstalk_l &= 0xf0;116 crosstalk_l |= crosstalk & 0x0f;117 regmap_update_bits(es8326->regmap, ES8326_DAC_RAMPRATE,118 0x10, crosstalk_h);119 regmap_write(es8326->regmap, ES8326_DAC_CROSSTALK, crosstalk_l);120 121 return 0;122}123 124static int es8326_hplvol_get(struct snd_kcontrol *kcontrol,125 struct snd_ctl_elem_value *ucontrol)126{127 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);128 struct es8326_priv *es8326 = snd_soc_component_get_drvdata(component);129 130 ucontrol->value.integer.value[0] = es8326->hpl_vol;131 132 return 0;133}134 135static int es8326_hplvol_set(struct snd_kcontrol *kcontrol,136 struct snd_ctl_elem_value *ucontrol)137{138 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);139 struct es8326_priv *es8326 = snd_soc_component_get_drvdata(component);140 unsigned int hp_vol;141 142 hp_vol = ucontrol->value.integer.value[0];143 if (hp_vol > 5)144 return -EINVAL;145 if (es8326->hpl_vol != hp_vol) {146 es8326->hpl_vol = hp_vol;147 if (hp_vol >= 3)148 hp_vol++;149 regmap_update_bits(es8326->regmap, ES8326_HP_VOL,150 0x70, (hp_vol << 4));151 return 1;152 }153 154 return 0;155}156 157static int es8326_hprvol_get(struct snd_kcontrol *kcontrol,158 struct snd_ctl_elem_value *ucontrol)159{160 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);161 struct es8326_priv *es8326 = snd_soc_component_get_drvdata(component);162 163 ucontrol->value.integer.value[0] = es8326->hpr_vol;164 165 return 0;166}167 168static int es8326_hprvol_set(struct snd_kcontrol *kcontrol,169 struct snd_ctl_elem_value *ucontrol)170{171 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);172 struct es8326_priv *es8326 = snd_soc_component_get_drvdata(component);173 unsigned int hp_vol;174 175 hp_vol = ucontrol->value.integer.value[0];176 if (hp_vol > 5)177 return -EINVAL;178 if (es8326->hpr_vol != hp_vol) {179 es8326->hpr_vol = hp_vol;180 if (hp_vol >= 3)181 hp_vol++;182 regmap_update_bits(es8326->regmap, ES8326_HP_VOL,183 0x07, hp_vol);184 return 1;185 }186 187 return 0;188}189 190static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(dac_vol_tlv, -9550, 50, 0);191static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(adc_vol_tlv, -9550, 50, 0);192static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(adc_analog_pga_tlv, 0, 300, 0);193static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(adc_pga_tlv, 0, 600, 0);194static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(softramp_rate, 0, 100, 0);195static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(drc_target_tlv, -3200, 200, 0);196static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(drc_recovery_tlv, -125, 250, 0);197 198static const char *const winsize[] = {199 "0.25db/2 LRCK",200 "0.25db/4 LRCK",201 "0.25db/8 LRCK",202 "0.25db/16 LRCK",203 "0.25db/32 LRCK",204 "0.25db/64 LRCK",205 "0.25db/128 LRCK",206 "0.25db/256 LRCK",207 "0.25db/512 LRCK",208 "0.25db/1024 LRCK",209 "0.25db/2048 LRCK",210 "0.25db/4096 LRCK",211 "0.25db/8192 LRCK",212 "0.25db/16384 LRCK",213 "0.25db/32768 LRCK",214 "0.25db/65536 LRCK",215};216 217static const char *const dacpol_txt[] = {218 "Normal", "R Invert", "L Invert", "L + R Invert" };219 220static const char *const hp_spkvol_switch[] = {221 "HPVOL: HPL+HPL, SPKVOL: HPL+HPL",222 "HPVOL: HPL+HPR, SPKVOL: HPL+HPR",223 "HPVOL: HPL+HPL, SPKVOL: SPKL+SPKR",224 "HPVOL: HPL+HPR, SPKVOL: SPKL+SPKR",225};226 227static const struct soc_enum dacpol =228 SOC_ENUM_SINGLE(ES8326_DAC_DSM, 4, 4, dacpol_txt);229static const struct soc_enum alc_winsize =230 SOC_ENUM_SINGLE(ES8326_ADC_RAMPRATE, 4, 16, winsize);231static const struct soc_enum drc_winsize =232 SOC_ENUM_SINGLE(ES8326_DRC_WINSIZE, 4, 16, winsize);233static const struct soc_enum hpvol_spkvol_switch =234 SOC_ENUM_SINGLE(ES8326_HP_MISC, 6, 4, hp_spkvol_switch);235 236static const struct snd_kcontrol_new es8326_snd_controls[] = {237 SOC_SINGLE_TLV("DAC Playback Volume", ES8326_DACL_VOL, 0, 0xbf, 0, dac_vol_tlv),238 SOC_ENUM("Playback Polarity", dacpol),239 SOC_SINGLE_TLV("DAC Ramp Rate", ES8326_DAC_RAMPRATE, 0, 0x0f, 0, softramp_rate),240 SOC_SINGLE_TLV("DRC Recovery Level", ES8326_DRC_RECOVERY, 0, 4, 0, drc_recovery_tlv),241 SOC_ENUM("DRC Winsize", drc_winsize),242 SOC_SINGLE_TLV("DRC Target Level", ES8326_DRC_WINSIZE, 0, 0x0f, 0, drc_target_tlv),243 244 SOC_DOUBLE_R_TLV("ADC Capture Volume", ES8326_ADC1_VOL, ES8326_ADC2_VOL, 0, 0xff, 0,245 adc_vol_tlv),246 SOC_DOUBLE_TLV("ADC PGA Volume", ES8326_ADC_SCALE, 4, 0, 5, 0, adc_pga_tlv),247 SOC_SINGLE_TLV("ADC PGA Gain Volume", ES8326_PGAGAIN, 0, 10, 0, adc_analog_pga_tlv),248 SOC_SINGLE_TLV("ADC Ramp Rate", ES8326_ADC_RAMPRATE, 0, 0x0f, 0, softramp_rate),249 SOC_SINGLE("ALC Capture Switch", ES8326_ALC_RECOVERY, 3, 1, 0),250 SOC_SINGLE_TLV("ALC Capture Recovery Level", ES8326_ALC_LEVEL,251 0, 4, 0, drc_recovery_tlv),252 SOC_ENUM("ALC Capture Winsize", alc_winsize),253 SOC_SINGLE_TLV("ALC Capture Target Level", ES8326_ALC_LEVEL,254 0, 0x0f, 0, drc_target_tlv),255 256 SOC_SINGLE_EXT("CROSSTALK1", SND_SOC_NOPM, 0, 31, 0,257 es8326_crosstalk1_get, es8326_crosstalk1_set),258 SOC_SINGLE_EXT("CROSSTALK2", SND_SOC_NOPM, 0, 31, 0,259 es8326_crosstalk2_get, es8326_crosstalk2_set),260 SOC_SINGLE_EXT("HPL Volume", SND_SOC_NOPM, 0, 5, 0,261 es8326_hplvol_get, es8326_hplvol_set),262 SOC_SINGLE_EXT("HPR Volume", SND_SOC_NOPM, 0, 5, 0,263 es8326_hprvol_get, es8326_hprvol_set),264 265 SOC_SINGLE_TLV("HPL Playback Volume", ES8326_DACL_VOL, 0, 0xbf, 0, dac_vol_tlv),266 SOC_SINGLE_TLV("HPR Playback Volume", ES8326_DACR_VOL, 0, 0xbf, 0, dac_vol_tlv),267 SOC_SINGLE_TLV("SPKL Playback Volume", ES8326_SPKL_VOL, 0, 0xbf, 0, dac_vol_tlv),268 SOC_SINGLE_TLV("SPKR Playback Volume", ES8326_SPKR_VOL, 0, 0xbf, 0, dac_vol_tlv),269 270 SOC_ENUM("HPVol SPKVol Switch", hpvol_spkvol_switch),271};272 273static const struct snd_soc_dapm_widget es8326_dapm_widgets[] = {274 SND_SOC_DAPM_INPUT("MIC1"),275 SND_SOC_DAPM_INPUT("MIC2"),276 SND_SOC_DAPM_INPUT("MIC3"),277 SND_SOC_DAPM_INPUT("MIC4"),278 279 SND_SOC_DAPM_ADC("ADC L", NULL, SND_SOC_NOPM, 0, 0),280 SND_SOC_DAPM_ADC("ADC R", NULL, SND_SOC_NOPM, 0, 0),281 282 /* Digital Interface */283 SND_SOC_DAPM_AIF_OUT("I2S OUT", "I2S1 Capture", 0, SND_SOC_NOPM, 0, 0),284 SND_SOC_DAPM_AIF_IN("I2S IN", "I2S1 Playback", 0, SND_SOC_NOPM, 0, 0),285 286 /* Analog Power Supply*/287 SND_SOC_DAPM_DAC("Right DAC", NULL, ES8326_ANA_PDN, 0, 1),288 SND_SOC_DAPM_DAC("Left DAC", NULL, ES8326_ANA_PDN, 1, 1),289 SND_SOC_DAPM_SUPPLY("MICBIAS1", ES8326_ANA_MICBIAS, 2, 0, NULL, 0),290 SND_SOC_DAPM_SUPPLY("MICBIAS2", ES8326_ANA_MICBIAS, 3, 0, NULL, 0),291 292 SND_SOC_DAPM_PGA("LHPMIX", ES8326_DAC2HPMIX, 7, 0, NULL, 0),293 SND_SOC_DAPM_PGA("RHPMIX", ES8326_DAC2HPMIX, 3, 0, NULL, 0),294 295 SND_SOC_DAPM_OUTPUT("HPOL"),296 SND_SOC_DAPM_OUTPUT("HPOR"),297};298 299static const struct snd_soc_dapm_route es8326_dapm_routes[] = {300 {"ADC L", NULL, "MIC1"},301 {"ADC R", NULL, "MIC2"},302 {"ADC L", NULL, "MIC3"},303 {"ADC R", NULL, "MIC4"},304 305 {"I2S OUT", NULL, "ADC L"},306 {"I2S OUT", NULL, "ADC R"},307 308 {"Right DAC", NULL, "I2S IN"},309 {"Left DAC", NULL, "I2S IN"},310 311 {"LHPMIX", NULL, "Left DAC"},312 {"RHPMIX", NULL, "Right DAC"},313 314 {"HPOL", NULL, "LHPMIX"},315 {"HPOR", NULL, "RHPMIX"},316};317 318static bool es8326_volatile_register(struct device *dev, unsigned int reg)319{320 switch (reg) {321 case ES8326_HPL_OFFSET_INI:322 case ES8326_HPR_OFFSET_INI:323 case ES8326_HPDET_STA:324 case ES8326_CTIA_OMTP_STA:325 case ES8326_CSM_MUTE_STA:326 return true;327 default:328 return false;329 }330}331 332static bool es8326_writeable_register(struct device *dev, unsigned int reg)333{334 switch (reg) {335 case ES8326_BIAS_SW1:336 case ES8326_BIAS_SW2:337 case ES8326_BIAS_SW3:338 case ES8326_BIAS_SW4:339 case ES8326_ADC_HPFS1:340 case ES8326_ADC_HPFS2:341 return false;342 default:343 return true;344 }345}346 347static const struct regmap_config es8326_regmap_config = {348 .reg_bits = 8,349 .val_bits = 8,350 .max_register = 0xff,351 .use_single_read = true,352 .use_single_write = true,353 .volatile_reg = es8326_volatile_register,354 .writeable_reg = es8326_writeable_register,355 .cache_type = REGCACHE_RBTREE,356};357 358struct _coeff_div {359 u16 fs;360 u32 rate;361 u32 mclk;362 u8 reg4;363 u8 reg5;364 u8 reg6;365 u8 reg7;366 u8 reg8;367 u8 reg9;368 u8 rega;369 u8 regb;370};371 372/* codec hifi mclk clock divider coefficients */373/* {ratio, LRCK, MCLK, REG04, REG05, REG06, REG07, REG08, REG09, REG10, REG11} */374static const struct _coeff_div coeff_div_v0[] = {375 {64, 8000, 512000, 0x60, 0x01, 0x0F, 0x75, 0x0A, 0x1B, 0x1F, 0x7F},376 {64, 16000, 1024000, 0x20, 0x00, 0x33, 0x35, 0x0A, 0x1B, 0x1F, 0x3F},377 {64, 44100, 2822400, 0xE0, 0x00, 0x03, 0x2D, 0x4A, 0x0A, 0x1F, 0x1F},378 {64, 48000, 3072000, 0xE0, 0x00, 0x03, 0x2D, 0x4A, 0x0A, 0x1F, 0x1F},379 {128, 8000, 1024000, 0x60, 0x00, 0x33, 0x35, 0x0A, 0x1B, 0x1F, 0x7F},380 {128, 16000, 2048000, 0x20, 0x00, 0x03, 0x35, 0x0A, 0x1B, 0x1F, 0x3F},381 {128, 44100, 5644800, 0xE0, 0x01, 0x03, 0x2D, 0x4A, 0x0A, 0x1F, 0x1F},382 {128, 48000, 6144000, 0xE0, 0x01, 0x03, 0x2D, 0x4A, 0x0A, 0x1F, 0x1F},383 384 {192, 32000, 6144000, 0xE0, 0x02, 0x03, 0x2D, 0x4A, 0x0A, 0x1F, 0x1F},385 {256, 8000, 2048000, 0x60, 0x00, 0x03, 0x35, 0x0A, 0x1B, 0x1F, 0x7F},386 {256, 16000, 4096000, 0x20, 0x01, 0x03, 0x35, 0x0A, 0x1B, 0x1F, 0x3F},387 {256, 44100, 11289600, 0xE0, 0x00, 0x30, 0x2D, 0x4A, 0x0A, 0x1F, 0x1F},388 {256, 48000, 12288000, 0xE0, 0x00, 0x30, 0x2D, 0x4A, 0x0A, 0x1F, 0x1F},389 {384, 32000, 12288000, 0xE0, 0x05, 0x03, 0x2D, 0x4A, 0x0A, 0x1F, 0x1F},390 {400, 48000, 19200000, 0xE9, 0x04, 0x0F, 0x6d, 0x4A, 0x0A, 0x1F, 0x1F},391 392 {500, 48000, 24000000, 0xF8, 0x04, 0x3F, 0x6D, 0x4A, 0x0A, 0x1F, 0x1F},393 {512, 8000, 4096000, 0x60, 0x01, 0x03, 0x35, 0x0A, 0x1B, 0x1F, 0x7F},394 {512, 16000, 8192000, 0x20, 0x00, 0x30, 0x35, 0x0A, 0x1B, 0x1F, 0x3F},395 {512, 44100, 22579200, 0xE0, 0x00, 0x00, 0x2D, 0x4A, 0x0A, 0x1F, 0x1F},396 {512, 48000, 24576000, 0xE0, 0x00, 0x00, 0x2D, 0x4A, 0x0A, 0x1F, 0x1F},397 {768, 32000, 24576000, 0xE0, 0x02, 0x30, 0x2D, 0x4A, 0x0A, 0x1F, 0x1F},398 {1024, 8000, 8192000, 0x60, 0x00, 0x30, 0x35, 0x0A, 0x1B, 0x1F, 0x7F},399 {1024, 16000, 16384000, 0x20, 0x00, 0x00, 0x35, 0x0A, 0x1B, 0x1F, 0x3F},400};401 402static const struct _coeff_div coeff_div_v3[] = {403 {32, 8000, 256000, 0x60, 0x00, 0x0F, 0x75, 0x8A, 0x1B, 0x1F, 0x7F},404 {32, 16000, 512000, 0x20, 0x00, 0x0D, 0x75, 0x8A, 0x1B, 0x1F, 0x3F},405 {32, 44100, 1411200, 0x00, 0x00, 0x13, 0x2D, 0x8A, 0x0A, 0x1F, 0x1F},406 {32, 48000, 1536000, 0x00, 0x00, 0x13, 0x2D, 0x8A, 0x0A, 0x1F, 0x1F},407 {36, 8000, 288000, 0x20, 0x00, 0x0D, 0x75, 0x8A, 0x1B, 0x23, 0x47},408 {36, 16000, 576000, 0x20, 0x00, 0x0D, 0x75, 0x8A, 0x1B, 0x23, 0x47},409 {48, 8000, 384000, 0x60, 0x02, 0x1F, 0x75, 0x8A, 0x1B, 0x1F, 0x7F},410 {48, 16000, 768000, 0x20, 0x02, 0x0F, 0x75, 0x8A, 0x1B, 0x1F, 0x3F},411 {48, 48000, 2304000, 0x00, 0x02, 0x0D, 0x2D, 0x8A, 0x0A, 0x1F, 0x1F},412 413 {64, 8000, 512000, 0x60, 0x00, 0x35, 0x75, 0x8A, 0x1B, 0x1F, 0x7F},414 {64, 16000, 1024000, 0x20, 0x00, 0x05, 0x75, 0x8A, 0x1B, 0x1F, 0x3F},415 {64, 44100, 2822400, 0xE0, 0x00, 0x31, 0x2D, 0xCA, 0x0A, 0x1F, 0x1F},416 {64, 48000, 3072000, 0xE0, 0x00, 0x31, 0x2D, 0xCA, 0x0A, 0x1F, 0x1F},417 {72, 8000, 576000, 0x20, 0x00, 0x13, 0x35, 0x8A, 0x1B, 0x23, 0x47},418 {72, 16000, 1152000, 0x20, 0x00, 0x05, 0x75, 0x8A, 0x1B, 0x23, 0x47},419 {96, 8000, 768000, 0x60, 0x02, 0x1D, 0x75, 0x8A, 0x1B, 0x1F, 0x7F},420 {96, 16000, 1536000, 0x20, 0x02, 0x0D, 0x75, 0x8A, 0x1B, 0x1F, 0x3F},421 {100, 48000, 4800000, 0x04, 0x04, 0x3F, 0x6D, 0xB8, 0x08, 0x4f, 0x1f},422 {125, 48000, 6000000, 0x04, 0x04, 0x1F, 0x2D, 0x8A, 0x0A, 0x27, 0x27},423 424 {128, 8000, 1024000, 0x60, 0x00, 0x05, 0x75, 0x8A, 0x1B, 0x1F, 0x7F},425 {128, 16000, 2048000, 0x20, 0x00, 0x31, 0x35, 0x08, 0x19, 0x1F, 0x3F},426 {128, 44100, 5644800, 0xE0, 0x00, 0x01, 0x2D, 0x48, 0x08, 0x1F, 0x1F},427 {128, 48000, 6144000, 0xE0, 0x00, 0x01, 0x2D, 0x48, 0x08, 0x1F, 0x1F},428 {144, 8000, 1152000, 0x20, 0x00, 0x03, 0x35, 0x8A, 0x1B, 0x23, 0x47},429 {144, 16000, 2304000, 0x20, 0x00, 0x11, 0x35, 0x8A, 0x1B, 0x23, 0x47},430 {192, 8000, 1536000, 0x60, 0x02, 0x0D, 0x75, 0x8A, 0x1B, 0x1F, 0x7F},431 {192, 32000, 6144000, 0xE0, 0x02, 0x31, 0x2D, 0xCA, 0x0A, 0x1F, 0x1F},432 {192, 16000, 3072000, 0x20, 0x02, 0x05, 0x75, 0xCA, 0x1B, 0x1F, 0x3F},433 434 {200, 48000, 9600000, 0x04, 0x04, 0x0F, 0x2D, 0xCA, 0x0A, 0x1F, 0x1F},435 {250, 48000, 12000000, 0x04, 0x04, 0x0F, 0x2D, 0xCA, 0x0A, 0x27, 0x27},436 {256, 8000, 2048000, 0x60, 0x00, 0x31, 0x35, 0x08, 0x19, 0x1F, 0x7F},437 {256, 16000, 4096000, 0x20, 0x00, 0x01, 0x35, 0x08, 0x19, 0x1F, 0x3F},438 {256, 44100, 11289600, 0xE0, 0x01, 0x01, 0x2D, 0x48, 0x08, 0x1F, 0x1F},439 {256, 48000, 12288000, 0xE0, 0x01, 0x01, 0x2D, 0x48, 0x08, 0x1F, 0x1F},440 {288, 8000, 2304000, 0x20, 0x00, 0x01, 0x35, 0x8A, 0x1B, 0x23, 0x47},441 {384, 8000, 3072000, 0x60, 0x02, 0x05, 0x75, 0x8A, 0x1B, 0x1F, 0x7F},442 {384, 16000, 6144000, 0x20, 0x02, 0x03, 0x35, 0x8A, 0x1B, 0x1F, 0x3F},443 {384, 32000, 12288000, 0xE0, 0x02, 0x01, 0x2D, 0xCA, 0x0A, 0x1F, 0x1F},444 {384, 48000, 18432000, 0x00, 0x02, 0x01, 0x2D, 0x8A, 0x0A, 0x1F, 0x1F},445 446 {400, 48000, 19200000, 0xE4, 0x04, 0x35, 0x6d, 0xCA, 0x0A, 0x1F, 0x1F},447 {500, 48000, 24000000, 0xF8, 0x04, 0x3F, 0x6D, 0xCA, 0x0A, 0x1F, 0x1F},448 {512, 8000, 4096000, 0x60, 0x00, 0x01, 0x08, 0x19, 0x1B, 0x1F, 0x7F},449 {512, 16000, 8192000, 0x20, 0x00, 0x30, 0x35, 0x08, 0x19, 0x1F, 0x3F},450 {512, 44100, 22579200, 0xE0, 0x00, 0x00, 0x2D, 0x48, 0x08, 0x1F, 0x1F},451 {512, 48000, 24576000, 0xE0, 0x00, 0x00, 0x2D, 0x48, 0x08, 0x1F, 0x1F},452 {768, 8000, 6144000, 0x60, 0x02, 0x11, 0x35, 0x8A, 0x1B, 0x1F, 0x7F},453 {768, 16000, 12288000, 0x20, 0x02, 0x01, 0x35, 0x8A, 0x1B, 0x1F, 0x3F},454 {768, 32000, 24576000, 0xE0, 0x02, 0x30, 0x2D, 0xCA, 0x0A, 0x1F, 0x1F},455 {800, 48000, 38400000, 0x00, 0x18, 0x13, 0x2D, 0x8A, 0x0A, 0x1F, 0x1F},456 457 {1024, 8000, 8192000, 0x60, 0x00, 0x30, 0x35, 0x8A, 0x1B, 0x1F, 0x7F},458 {1024, 16000, 16384000, 0x20, 0x00, 0x00, 0x35, 0x8A, 0x1B, 0x1F, 0x3F},459 {1152, 16000, 18432000, 0x20, 0x08, 0x11, 0x35, 0x8A, 0x1B, 0x1F, 0x3F},460 {1536, 8000, 12288000, 0x60, 0x02, 0x01, 0x35, 0x8A, 0x1B, 0x1F, 0x7F},461 {1536, 16000, 24576000, 0x20, 0x02, 0x10, 0x35, 0x8A, 0x1B, 0x1F, 0x3F},462 {1625, 8000, 13000000, 0x0C, 0x18, 0x1F, 0x2D, 0x8A, 0x0A, 0x27, 0x27},463 {1625, 16000, 26000000, 0x0C, 0x18, 0x1F, 0x2D, 0x8A, 0x0A, 0x27, 0x27},464 {2048, 8000, 16384000, 0x60, 0x00, 0x00, 0x35, 0x8A, 0x1B, 0x1F, 0x7F},465 {2304, 8000, 18432000, 0x40, 0x02, 0x10, 0x35, 0x8A, 0x1B, 0x1F, 0x5F},466 {3072, 8000, 24576000, 0x60, 0x02, 0x10, 0x35, 0x8A, 0x1B, 0x1F, 0x7F},467 {3250, 8000, 26000000, 0x0C, 0x18, 0x0F, 0x2D, 0x8A, 0x0A, 0x27, 0x27},468};469 470static inline int get_coeff(int mclk, int rate, int array,471 const struct _coeff_div *coeff_div)472{473 int i;474 475 for (i = 0; i < array; i++) {476 if (coeff_div[i].rate == rate && coeff_div[i].mclk == mclk)477 return i;478 }479 480 return -EINVAL;481}482 483static int es8326_set_dai_sysclk(struct snd_soc_dai *codec_dai,484 int clk_id, unsigned int freq, int dir)485{486 struct snd_soc_component *codec = codec_dai->component;487 struct es8326_priv *es8326 = snd_soc_component_get_drvdata(codec);488 489 es8326->sysclk = freq;490 491 return 0;492}493 494static int es8326_set_dai_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt)495{496 struct snd_soc_component *component = codec_dai->component;497 u8 iface = 0;498 499 switch (fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) {500 case SND_SOC_DAIFMT_CBC_CFP:501 snd_soc_component_update_bits(component, ES8326_RESET,502 ES8326_MASTER_MODE_EN, ES8326_MASTER_MODE_EN);503 break;504 case SND_SOC_DAIFMT_CBC_CFC:505 break;506 default:507 return -EINVAL;508 }509 510 /* interface format */511 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {512 case SND_SOC_DAIFMT_I2S:513 break;514 case SND_SOC_DAIFMT_RIGHT_J:515 dev_err(component->dev, "Codec driver does not support right justified\n");516 return -EINVAL;517 case SND_SOC_DAIFMT_LEFT_J:518 iface |= ES8326_DAIFMT_LEFT_J;519 break;520 case SND_SOC_DAIFMT_DSP_A:521 iface |= ES8326_DAIFMT_DSP_A;522 break;523 case SND_SOC_DAIFMT_DSP_B:524 iface |= ES8326_DAIFMT_DSP_B;525 break;526 default:527 return -EINVAL;528 }529 530 snd_soc_component_update_bits(component, ES8326_FMT, ES8326_DAIFMT_MASK, iface);531 532 return 0;533}534 535static int es8326_pcm_hw_params(struct snd_pcm_substream *substream,536 struct snd_pcm_hw_params *params,537 struct snd_soc_dai *dai)538{539 struct snd_soc_component *component = dai->component;540 const struct _coeff_div *coeff_div;541 struct es8326_priv *es8326 = snd_soc_component_get_drvdata(component);542 u8 srate = 0;543 int coeff, array;544 545 if (es8326->version == 0) {546 coeff_div = coeff_div_v0;547 array = ARRAY_SIZE(coeff_div_v0);548 } else {549 coeff_div = coeff_div_v3;550 array = ARRAY_SIZE(coeff_div_v3);551 }552 coeff = get_coeff(es8326->sysclk, params_rate(params), array, coeff_div);553 /* bit size */554 switch (params_format(params)) {555 case SNDRV_PCM_FORMAT_S16_LE:556 srate |= ES8326_S16_LE;557 break;558 case SNDRV_PCM_FORMAT_S20_3LE:559 srate |= ES8326_S20_3_LE;560 break;561 case SNDRV_PCM_FORMAT_S18_3LE:562 srate |= ES8326_S18_LE;563 break;564 case SNDRV_PCM_FORMAT_S24_LE:565 srate |= ES8326_S24_LE;566 break;567 case SNDRV_PCM_FORMAT_S32_LE:568 srate |= ES8326_S32_LE;569 break;570 default:571 return -EINVAL;572 }573 574 /* set iface & srate */575 snd_soc_component_update_bits(component, ES8326_FMT, ES8326_DATA_LEN_MASK, srate);576 577 if (coeff >= 0) {578 regmap_write(es8326->regmap, ES8326_CLK_DIV1,579 coeff_div[coeff].reg4);580 regmap_write(es8326->regmap, ES8326_CLK_DIV2,581 coeff_div[coeff].reg5);582 regmap_write(es8326->regmap, ES8326_CLK_DLL,583 coeff_div[coeff].reg6);584 regmap_write(es8326->regmap, ES8326_CLK_MUX,585 coeff_div[coeff].reg7);586 regmap_write(es8326->regmap, ES8326_CLK_ADC_SEL,587 coeff_div[coeff].reg8);588 regmap_write(es8326->regmap, ES8326_CLK_DAC_SEL,589 coeff_div[coeff].reg9);590 regmap_write(es8326->regmap, ES8326_CLK_ADC_OSR,591 coeff_div[coeff].rega);592 regmap_write(es8326->regmap, ES8326_CLK_DAC_OSR,593 coeff_div[coeff].regb);594 } else {595 dev_warn(component->dev, "Clock coefficients do not match");596 }597 598 return 0;599}600 601static int es8326_mute(struct snd_soc_dai *dai, int mute, int direction)602{603 struct snd_soc_component *component = dai->component;604 struct es8326_priv *es8326 = snd_soc_component_get_drvdata(component);605 unsigned int offset_l, offset_r;606 607 if (mute) {608 if (direction == SNDRV_PCM_STREAM_PLAYBACK) {609 regmap_write(es8326->regmap, ES8326_HP_CAL, ES8326_HP_OFF);610 regmap_update_bits(es8326->regmap, ES8326_DAC_MUTE,611 ES8326_MUTE_MASK, ES8326_MUTE);612 regmap_update_bits(es8326->regmap, ES8326_HP_DRIVER_REF,613 0x30, 0x00);614 } else {615 regmap_update_bits(es8326->regmap, ES8326_ADC_MUTE,616 0x0F, 0x0F);617 }618 } else {619 if (!es8326->calibrated) {620 regmap_write(es8326->regmap, ES8326_HP_CAL, ES8326_HP_FORCE_CAL);621 msleep(30);622 regmap_write(es8326->regmap, ES8326_HP_CAL, ES8326_HP_OFF);623 regmap_read(es8326->regmap, ES8326_HPL_OFFSET_INI, &offset_l);624 regmap_read(es8326->regmap, ES8326_HPR_OFFSET_INI, &offset_r);625 regmap_write(es8326->regmap, ES8326_HP_OFFSET_CAL, 0x8c);626 regmap_write(es8326->regmap, ES8326_HPL_OFFSET_INI, offset_l);627 regmap_write(es8326->regmap, ES8326_HPR_OFFSET_INI, offset_r);628 es8326->calibrated = true;629 }630 if (direction == SNDRV_PCM_STREAM_PLAYBACK) {631 regmap_update_bits(es8326->regmap, ES8326_DAC_DSM, 0x01, 0x01);632 usleep_range(1000, 5000);633 regmap_update_bits(es8326->regmap, ES8326_DAC_DSM, 0x01, 0x00);634 usleep_range(1000, 5000);635 regmap_update_bits(es8326->regmap, ES8326_HP_DRIVER_REF, 0x30, 0x20);636 regmap_update_bits(es8326->regmap, ES8326_HP_DRIVER_REF, 0x30, 0x30);637 regmap_write(es8326->regmap, ES8326_HP_DRIVER, 0xa1);638 regmap_write(es8326->regmap, ES8326_HP_CAL, ES8326_HP_ON);639 regmap_update_bits(es8326->regmap, ES8326_DAC_MUTE,640 ES8326_MUTE_MASK, ~(ES8326_MUTE));641 } else {642 msleep(300);643 regmap_update_bits(es8326->regmap, ES8326_ADC_MUTE,644 0x0F, 0x00);645 }646 }647 return 0;648}649 650static int es8326_set_bias_level(struct snd_soc_component *codec,651 enum snd_soc_bias_level level)652{653 struct es8326_priv *es8326 = snd_soc_component_get_drvdata(codec);654 int ret;655 656 switch (level) {657 case SND_SOC_BIAS_ON:658 ret = clk_prepare_enable(es8326->mclk);659 if (ret)660 return ret;661 662 regmap_update_bits(es8326->regmap, ES8326_RESET, 0x02, 0x02);663 usleep_range(5000, 10000);664 regmap_write(es8326->regmap, ES8326_INTOUT_IO, es8326->interrupt_clk);665 regmap_write(es8326->regmap, ES8326_SDINOUT1_IO,666 (ES8326_IO_DMIC_CLK << ES8326_SDINOUT1_SHIFT));667 regmap_write(es8326->regmap, ES8326_PGA_PDN, 0x40);668 regmap_write(es8326->regmap, ES8326_ANA_PDN, 0x00);669 regmap_update_bits(es8326->regmap, ES8326_CLK_CTL, 0x20, 0x20);670 regmap_update_bits(es8326->regmap, ES8326_RESET, 0x02, 0x00);671 break;672 case SND_SOC_BIAS_PREPARE:673 break;674 case SND_SOC_BIAS_STANDBY:675 regmap_write(es8326->regmap, ES8326_ANA_PDN, 0x3b);676 regmap_update_bits(es8326->regmap, ES8326_CLK_CTL, 0x20, 0x00);677 regmap_write(es8326->regmap, ES8326_SDINOUT1_IO, ES8326_IO_INPUT);678 break;679 case SND_SOC_BIAS_OFF:680 clk_disable_unprepare(es8326->mclk);681 break;682 }683 684 return 0;685}686 687#define es8326_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\688 SNDRV_PCM_FMTBIT_S24_LE)689 690static const struct snd_soc_dai_ops es8326_ops = {691 .hw_params = es8326_pcm_hw_params,692 .set_fmt = es8326_set_dai_fmt,693 .set_sysclk = es8326_set_dai_sysclk,694 .mute_stream = es8326_mute,695 .no_capture_mute = 0,696};697 698static struct snd_soc_dai_driver es8326_dai = {699 .name = "ES8326 HiFi",700 .playback = {701 .stream_name = "Playback",702 .channels_min = 1,703 .channels_max = 2,704 .rates = SNDRV_PCM_RATE_8000_48000,705 .formats = es8326_FORMATS,706 },707 .capture = {708 .stream_name = "Capture",709 .channels_min = 1,710 .channels_max = 2,711 .rates = SNDRV_PCM_RATE_8000_48000,712 .formats = es8326_FORMATS,713 },714 .ops = &es8326_ops,715 .symmetric_rate = 1,716};717 718static void es8326_enable_micbias(struct snd_soc_component *component)719{720 struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);721 722 snd_soc_dapm_mutex_lock(dapm);723 snd_soc_dapm_force_enable_pin_unlocked(dapm, "MICBIAS1");724 snd_soc_dapm_force_enable_pin_unlocked(dapm, "MICBIAS2");725 snd_soc_dapm_sync_unlocked(dapm);726 snd_soc_dapm_mutex_unlock(dapm);727}728 729static void es8326_disable_micbias(struct snd_soc_component *component)730{731 struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);732 733 snd_soc_dapm_mutex_lock(dapm);734 snd_soc_dapm_disable_pin_unlocked(dapm, "MICBIAS1");735 snd_soc_dapm_disable_pin_unlocked(dapm, "MICBIAS2");736 snd_soc_dapm_sync_unlocked(dapm);737 snd_soc_dapm_mutex_unlock(dapm);738}739 740/*741 * For button detection, set the following in soundcard742 * snd_jack_set_key(jack->jack, SND_JACK_BTN_0, KEY_PLAYPAUSE);743 * snd_jack_set_key(jack->jack, SND_JACK_BTN_1, KEY_VOLUMEUP);744 * snd_jack_set_key(jack->jack, SND_JACK_BTN_2, KEY_VOLUMEDOWN);745 */746static void es8326_jack_button_handler(struct work_struct *work)747{748 struct es8326_priv *es8326 =749 container_of(work, struct es8326_priv, button_press_work.work);750 struct snd_soc_component *comp = es8326->component;751 unsigned int iface;752 static int button_to_report, press_count;753 static int prev_button, cur_button;754 755 if (!(es8326->jack->status & SND_JACK_HEADSET)) /* Jack unplugged */756 return;757 758 mutex_lock(&es8326->lock);759 iface = snd_soc_component_read(comp, ES8326_HPDET_STA);760 switch (iface) {761 case 0x93:762 /* pause button detected */763 cur_button = SND_JACK_BTN_0;764 break;765 case 0x6f:766 case 0x4b:767 /* button volume up */768 cur_button = SND_JACK_BTN_1;769 break;770 case 0x27:771 /* button volume down */772 cur_button = SND_JACK_BTN_2;773 break;774 case 0x1e:775 case 0xe2:776 /* button released or not pressed */777 cur_button = 0;778 break;779 default:780 break;781 }782 783 if ((prev_button == cur_button) && (cur_button != 0)) {784 press_count++;785 if (press_count > 3) {786 /* report a press every 120ms */787 snd_soc_jack_report(es8326->jack, cur_button,788 SND_JACK_BTN_0 | SND_JACK_BTN_1 | SND_JACK_BTN_2);789 press_count = 0;790 }791 button_to_report = cur_button;792 queue_delayed_work(system_wq, &es8326->button_press_work,793 msecs_to_jiffies(35));794 } else if (prev_button != cur_button) {795 /* mismatch, detect again */796 prev_button = cur_button;797 queue_delayed_work(system_wq, &es8326->button_press_work,798 msecs_to_jiffies(35));799 } else {800 /* released or no pressed */801 if (button_to_report != 0) {802 snd_soc_jack_report(es8326->jack, button_to_report,803 SND_JACK_BTN_0 | SND_JACK_BTN_1 | SND_JACK_BTN_2);804 snd_soc_jack_report(es8326->jack, 0,805 SND_JACK_BTN_0 | SND_JACK_BTN_1 | SND_JACK_BTN_2);806 button_to_report = 0;807 }808 es8326_disable_micbias(es8326->component);809 }810 mutex_unlock(&es8326->lock);811}812 813static void es8326_jack_detect_handler(struct work_struct *work)814{815 struct es8326_priv *es8326 =816 container_of(work, struct es8326_priv, jack_detect_work.work);817 struct snd_soc_component *comp = es8326->component;818 unsigned int iface;819 820 mutex_lock(&es8326->lock);821 iface = snd_soc_component_read(comp, ES8326_HPDET_STA);822 dev_dbg(comp->dev, "gpio flag %#04x", iface);823 824 if ((es8326->jack_remove_retry == 1) && (es8326->version != ES8326_VERSION_B)) {825 if (iface & ES8326_HPINSERT_FLAG)826 es8326->jack_remove_retry = 2;827 else828 es8326->jack_remove_retry = 0;829 830 dev_dbg(comp->dev, "remove event check, set HPJACK_POL normal, cnt = %d\n",831 es8326->jack_remove_retry);832 /*833 * Inverted HPJACK_POL bit to trigger one IRQ to double check HP Removal event834 */835 regmap_update_bits(es8326->regmap, ES8326_HPDET_TYPE,836 ES8326_HP_DET_JACK_POL, (es8326->jd_inverted ?837 ~es8326->jack_pol : es8326->jack_pol));838 goto exit;839 }840 841 if ((iface & ES8326_HPINSERT_FLAG) == 0) {842 /* Jack unplugged or spurious IRQ */843 dev_dbg(comp->dev, "No headset detected\n");844 es8326_disable_micbias(es8326->component);845 if (es8326->jack->status & SND_JACK_HEADPHONE) {846 dev_dbg(comp->dev, "Report hp remove event\n");847 snd_soc_jack_report(es8326->jack, 0,848 SND_JACK_BTN_0 | SND_JACK_BTN_1 | SND_JACK_BTN_2);849 snd_soc_jack_report(es8326->jack, 0, SND_JACK_HEADSET);850 /* mute adc when mic path switch */851 regmap_write(es8326->regmap, ES8326_ADC1_SRC, 0x44);852 regmap_write(es8326->regmap, ES8326_ADC2_SRC, 0x66);853 }854 es8326->hp = 0;855 regmap_update_bits(es8326->regmap, ES8326_HPDET_TYPE, 0x03, 0x01);856 regmap_write(es8326->regmap, ES8326_SYS_BIAS, 0x0a);857 regmap_update_bits(es8326->regmap, ES8326_HP_DRIVER_REF, 0x0f, 0x03);858 regmap_write(es8326->regmap, ES8326_INT_SOURCE, ES8326_INT_SRC_PIN9);859 /*860 * Inverted HPJACK_POL bit to trigger one IRQ to double check HP Removal event861 */862 if ((es8326->jack_remove_retry == 0) && (es8326->version != ES8326_VERSION_B)) {863 es8326->jack_remove_retry = 1;864 dev_dbg(comp->dev, "remove event check, invert HPJACK_POL, cnt = %d\n",865 es8326->jack_remove_retry);866 regmap_update_bits(es8326->regmap, ES8326_HPDET_TYPE,867 ES8326_HP_DET_JACK_POL, (es8326->jd_inverted ?868 es8326->jack_pol : ~es8326->jack_pol));869 870 } else {871 es8326->jack_remove_retry = 0;872 }873 } else if ((iface & ES8326_HPINSERT_FLAG) == ES8326_HPINSERT_FLAG) {874 es8326->jack_remove_retry = 0;875 if (es8326->hp == 0) {876 dev_dbg(comp->dev, "First insert, start OMTP/CTIA type check\n");877 /*878 * set auto-check mode, then restart jack_detect_work after 400ms.879 * Don't report jack status.880 */881 regmap_write(es8326->regmap, ES8326_INT_SOURCE, 0x00);882 regmap_update_bits(es8326->regmap, ES8326_HPDET_TYPE, 0x03, 0x01);883 regmap_update_bits(es8326->regmap, ES8326_HPDET_TYPE, 0x10, 0x00);884 usleep_range(50000, 70000);885 regmap_update_bits(es8326->regmap, ES8326_HPDET_TYPE, 0x03, 0x00);886 regmap_update_bits(es8326->regmap, ES8326_HPDET_TYPE, 0x10, 0x10);887 usleep_range(50000, 70000);888 regmap_write(es8326->regmap, ES8326_INT_SOURCE,889 (ES8326_INT_SRC_PIN9 | ES8326_INT_SRC_BUTTON));890 regmap_write(es8326->regmap, ES8326_SYS_BIAS, 0x1f);891 regmap_update_bits(es8326->regmap, ES8326_HP_DRIVER_REF, 0x0f, 0x08);892 queue_delayed_work(system_wq, &es8326->jack_detect_work,893 msecs_to_jiffies(400));894 es8326->hp = 1;895 goto exit;896 }897 if (es8326->jack->status & SND_JACK_HEADSET) {898 /* detect button */899 dev_dbg(comp->dev, "button pressed\n");900 regmap_write(es8326->regmap, ES8326_INT_SOURCE,901 (ES8326_INT_SRC_PIN9 | ES8326_INT_SRC_BUTTON));902 es8326_enable_micbias(es8326->component);903 queue_delayed_work(system_wq, &es8326->button_press_work, 10);904 goto exit;905 }906 if ((iface & ES8326_HPBUTTON_FLAG) == 0x01) {907 dev_dbg(comp->dev, "Headphone detected\n");908 snd_soc_jack_report(es8326->jack,909 SND_JACK_HEADPHONE, SND_JACK_HEADSET);910 } else {911 dev_dbg(comp->dev, "Headset detected\n");912 snd_soc_jack_report(es8326->jack,913 SND_JACK_HEADSET, SND_JACK_HEADSET);914 915 regmap_update_bits(es8326->regmap, ES8326_PGA_PDN,916 0x08, 0x08);917 regmap_update_bits(es8326->regmap, ES8326_PGAGAIN,918 0x80, 0x80);919 regmap_write(es8326->regmap, ES8326_ADC1_SRC, 0x00);920 regmap_write(es8326->regmap, ES8326_ADC2_SRC, 0x00);921 regmap_update_bits(es8326->regmap, ES8326_PGA_PDN,922 0x08, 0x00);923 usleep_range(10000, 15000);924 }925 }926exit:927 mutex_unlock(&es8326->lock);928}929 930static irqreturn_t es8326_irq(int irq, void *dev_id)931{932 struct es8326_priv *es8326 = dev_id;933 934 if (!es8326->jack)935 goto out;936 937 if (es8326->jack->status & SND_JACK_HEADSET)938 queue_delayed_work(system_wq, &es8326->jack_detect_work,939 msecs_to_jiffies(10));940 else941 queue_delayed_work(system_wq, &es8326->jack_detect_work,942 msecs_to_jiffies(300));943 944out:945 return IRQ_HANDLED;946}947 948static int es8326_calibrate(struct snd_soc_component *component)949{950 struct es8326_priv *es8326 = snd_soc_component_get_drvdata(component);951 unsigned int reg;952 unsigned int offset_l, offset_r;953 954 regmap_read(es8326->regmap, ES8326_CHIP_VERSION, ®);955 es8326->version = reg;956 957 if ((es8326->version == ES8326_VERSION_B) && (es8326->calibrated == false)) {958 dev_dbg(component->dev, "ES8326_VERSION_B, calibrating\n");959 regmap_write(es8326->regmap, ES8326_CLK_INV, 0xc0);960 regmap_write(es8326->regmap, ES8326_CLK_DIV1, 0x03);961 regmap_write(es8326->regmap, ES8326_CLK_DLL, 0x30);962 regmap_write(es8326->regmap, ES8326_CLK_MUX, 0xed);963 regmap_write(es8326->regmap, ES8326_CLK_DAC_SEL, 0x08);964 regmap_write(es8326->regmap, ES8326_CLK_TRI, 0xc1);965 regmap_write(es8326->regmap, ES8326_DAC_MUTE, 0x03);966 regmap_write(es8326->regmap, ES8326_ANA_VSEL, 0x7f);967 regmap_write(es8326->regmap, ES8326_VMIDLOW, 0x23);968 regmap_write(es8326->regmap, ES8326_DAC2HPMIX, 0x88);969 usleep_range(15000, 20000);970 regmap_write(es8326->regmap, ES8326_HP_OFFSET_CAL, 0x8c);971 usleep_range(15000, 20000);972 regmap_write(es8326->regmap, ES8326_RESET, 0xc0);973 usleep_range(15000, 20000);974 975 regmap_write(es8326->regmap, ES8326_HP_OFFSET_CAL, ES8326_HP_OFF);976 regmap_read(es8326->regmap, ES8326_CSM_MUTE_STA, ®);977 if ((reg & 0xf0) != 0x40)978 msleep(50);979 980 regmap_write(es8326->regmap, ES8326_HP_CAL, 0xd4);981 msleep(200);982 regmap_write(es8326->regmap, ES8326_HP_CAL, 0x4d);983 msleep(200);984 regmap_write(es8326->regmap, ES8326_HP_CAL, ES8326_HP_OFF);985 regmap_read(es8326->regmap, ES8326_HPL_OFFSET_INI, &offset_l);986 regmap_read(es8326->regmap, ES8326_HPR_OFFSET_INI, &offset_r);987 regmap_write(es8326->regmap, ES8326_HP_OFFSET_CAL, 0x8c);988 regmap_write(es8326->regmap, ES8326_HPL_OFFSET_INI, offset_l);989 regmap_write(es8326->regmap, ES8326_HPR_OFFSET_INI, offset_r);990 regmap_write(es8326->regmap, ES8326_CLK_INV, 0x00);991 992 es8326->calibrated = true;993 }994 995 return 0;996}997 998static void es8326_init(struct snd_soc_component *component)999{1000 struct es8326_priv *es8326 = snd_soc_component_get_drvdata(component);1001 1002 regmap_write(es8326->regmap, ES8326_RESET, 0x1f);1003 regmap_write(es8326->regmap, ES8326_VMIDSEL, 0x0E);1004 regmap_write(es8326->regmap, ES8326_ANA_LP, 0xf0);1005 usleep_range(10000, 15000);1006 regmap_write(es8326->regmap, ES8326_HPJACK_TIMER, 0xd9);1007 regmap_write(es8326->regmap, ES8326_ANA_MICBIAS, 0xd8);1008 /* set headphone default type and detect pin */1009 regmap_write(es8326->regmap, ES8326_HPDET_TYPE, 0x83);1010 regmap_write(es8326->regmap, ES8326_CLK_RESAMPLE, 0x05);1011 1012 /* set internal oscillator as clock source of headpone cp */1013 regmap_write(es8326->regmap, ES8326_CLK_DIV_CPC, 0x89);1014 regmap_write(es8326->regmap, ES8326_CLK_CTL, ES8326_CLK_ON);1015 /* clock manager reset release */1016 regmap_write(es8326->regmap, ES8326_RESET, 0x17);1017 /* set headphone detection as half scan mode */1018 regmap_write(es8326->regmap, ES8326_HP_MISC, 0x3d);1019 regmap_write(es8326->regmap, ES8326_PULLUP_CTL, 0x00);1020 1021 /* enable headphone driver */1022 regmap_write(es8326->regmap, ES8326_HP_VOL, 0xc4);1023 regmap_write(es8326->regmap, ES8326_HP_DRIVER, 0xa7);1024 usleep_range(2000, 5000);1025 regmap_write(es8326->regmap, ES8326_HP_DRIVER_REF, 0x23);1026 regmap_write(es8326->regmap, ES8326_HP_DRIVER_REF, 0x33);1027 regmap_write(es8326->regmap, ES8326_HP_DRIVER, 0xa1);1028 1029 regmap_write(es8326->regmap, ES8326_CLK_INV, 0x00);1030 regmap_write(es8326->regmap, ES8326_CLK_VMIDS1, 0xc4);1031 regmap_write(es8326->regmap, ES8326_CLK_VMIDS2, 0x81);1032 regmap_write(es8326->regmap, ES8326_CLK_CAL_TIME, 0x00);1033 /* calibrate for B version */1034 es8326_calibrate(component);1035 regmap_write(es8326->regmap, ES8326_DAC_CROSSTALK, 0xaa);1036 regmap_write(es8326->regmap, ES8326_DAC_RAMPRATE, 0x00);1037 /* turn off headphone out */1038 regmap_write(es8326->regmap, ES8326_HP_CAL, 0x00);1039 /* set ADC and DAC in low power mode */1040 regmap_write(es8326->regmap, ES8326_ANA_LP, 0xf0);1041 1042 regmap_write(es8326->regmap, ES8326_ANA_VSEL, 0x7F);1043 /* select vdda as micbias source */1044 regmap_write(es8326->regmap, ES8326_VMIDLOW, 0x03);1045 /* set dac dsmclip = 1 */1046 regmap_write(es8326->regmap, ES8326_DAC_DSM, 0x08);1047 regmap_write(es8326->regmap, ES8326_DAC_VPPSCALE, 0x15);1048 1049 regmap_write(es8326->regmap, ES8326_HPDET_TYPE, 0x80 |1050 ((es8326->version == ES8326_VERSION_B) ?1051 (ES8326_HP_DET_SRC_PIN9 | es8326->jack_pol) :1052 (ES8326_HP_DET_SRC_PIN9 | es8326->jack_pol | 0x04)));1053 usleep_range(5000, 10000);1054 es8326_enable_micbias(es8326->component);1055 usleep_range(50000, 70000);1056 regmap_update_bits(es8326->regmap, ES8326_HPDET_TYPE, 0x03, 0x00);1057 regmap_write(es8326->regmap, ES8326_INTOUT_IO,1058 es8326->interrupt_clk);1059 regmap_write(es8326->regmap, ES8326_SDINOUT1_IO,1060 (ES8326_IO_DMIC_CLK << ES8326_SDINOUT1_SHIFT));1061 regmap_write(es8326->regmap, ES8326_SDINOUT23_IO, ES8326_IO_INPUT);1062 1063 regmap_write(es8326->regmap, ES8326_ANA_PDN, 0x00);1064 regmap_write(es8326->regmap, ES8326_RESET, ES8326_CSM_ON);1065 regmap_update_bits(es8326->regmap, ES8326_PGAGAIN, ES8326_MIC_SEL_MASK,1066 ES8326_MIC1_SEL);1067 1068 regmap_update_bits(es8326->regmap, ES8326_DAC_MUTE, ES8326_MUTE_MASK,1069 ES8326_MUTE);1070 1071 regmap_write(es8326->regmap, ES8326_ADC_MUTE, 0x0f);1072 regmap_write(es8326->regmap, ES8326_CLK_DIV_LRCK, 0xff);1073 regmap_write(es8326->regmap, ES8326_ADC1_SRC, 0x44);1074 regmap_write(es8326->regmap, ES8326_ADC2_SRC, 0x66);1075 es8326_disable_micbias(es8326->component);1076 1077 msleep(200);1078 regmap_write(es8326->regmap, ES8326_INT_SOURCE, ES8326_INT_SRC_PIN9);1079}1080 1081static int es8326_resume(struct snd_soc_component *component)1082{1083 struct es8326_priv *es8326 = snd_soc_component_get_drvdata(component);1084 unsigned int reg;1085 1086 regcache_cache_only(es8326->regmap, false);1087 regcache_cache_bypass(es8326->regmap, true);1088 regmap_read(es8326->regmap, ES8326_CLK_RESAMPLE, ®);1089 regcache_cache_bypass(es8326->regmap, false);1090 /* reset internal clock state */1091 if (reg == 0x05)1092 regmap_write(es8326->regmap, ES8326_CLK_CTL, ES8326_CLK_ON);1093 else1094 es8326_init(component);1095 1096 regcache_sync(es8326->regmap);1097 1098 es8326_irq(es8326->irq, es8326);1099 return 0;1100}1101 1102static int es8326_suspend(struct snd_soc_component *component)1103{1104 struct es8326_priv *es8326 = snd_soc_component_get_drvdata(component);1105 1106 cancel_delayed_work_sync(&es8326->jack_detect_work);1107 es8326_disable_micbias(component);1108 es8326->calibrated = false;1109 regmap_write(es8326->regmap, ES8326_CLK_MUX, 0x2d);1110 regmap_write(es8326->regmap, ES8326_DAC2HPMIX, 0x00);1111 regmap_write(es8326->regmap, ES8326_ANA_PDN, 0x3b);1112 regmap_write(es8326->regmap, ES8326_CLK_CTL, ES8326_CLK_OFF);1113 regcache_cache_only(es8326->regmap, true);1114 1115 /* reset register value to default */1116 regmap_write(es8326->regmap, ES8326_CSM_I2C_STA, 0x01);1117 usleep_range(1000, 3000);1118 regmap_write(es8326->regmap, ES8326_CSM_I2C_STA, 0x00);1119 1120 regcache_mark_dirty(es8326->regmap);1121 return 0;1122}1123 1124static int es8326_probe(struct snd_soc_component *component)1125{1126 struct es8326_priv *es8326 = snd_soc_component_get_drvdata(component);1127 int ret;1128 1129 es8326->component = component;1130 es8326->jd_inverted = device_property_read_bool(component->dev,1131 "everest,jack-detect-inverted");1132 1133 ret = device_property_read_u8(component->dev, "everest,jack-pol", &es8326->jack_pol);1134 if (ret != 0) {1135 dev_dbg(component->dev, "jack-pol return %d", ret);1136 es8326->jack_pol = ES8326_HP_TYPE_AUTO;1137 }1138 dev_dbg(component->dev, "jack-pol %x", es8326->jack_pol);1139 1140 ret = device_property_read_u8(component->dev, "everest,interrupt-src",1141 &es8326->interrupt_src);1142 if (ret != 0) {1143 dev_dbg(component->dev, "interrupt-src return %d", ret);1144 es8326->interrupt_src = ES8326_HP_DET_SRC_PIN9;1145 }1146 dev_dbg(component->dev, "interrupt-src %x", es8326->interrupt_src);1147 1148 ret = device_property_read_u8(component->dev, "everest,interrupt-clk",1149 &es8326->interrupt_clk);1150 if (ret != 0) {1151 dev_dbg(component->dev, "interrupt-clk return %d", ret);1152 es8326->interrupt_clk = 0x00;1153 }1154 dev_dbg(component->dev, "interrupt-clk %x", es8326->interrupt_clk);1155 1156 es8326_init(component);1157 return 0;1158}1159 1160static void es8326_enable_jack_detect(struct snd_soc_component *component,1161 struct snd_soc_jack *jack)1162{1163 struct es8326_priv *es8326 = snd_soc_component_get_drvdata(component);1164 1165 mutex_lock(&es8326->lock);1166 if (es8326->jd_inverted)1167 snd_soc_component_update_bits(component, ES8326_HPDET_TYPE,1168 ES8326_HP_DET_JACK_POL, ~es8326->jack_pol);1169 es8326->jack = jack;1170 1171 mutex_unlock(&es8326->lock);1172 es8326_irq(es8326->irq, es8326);1173}1174 1175static void es8326_disable_jack_detect(struct snd_soc_component *component)1176{1177 struct es8326_priv *es8326 = snd_soc_component_get_drvdata(component);1178 1179 dev_dbg(component->dev, "Enter into %s\n", __func__);1180 if (!es8326->jack)1181 return; /* Already disabled (or never enabled) */1182 cancel_delayed_work_sync(&es8326->jack_detect_work);1183 1184 mutex_lock(&es8326->lock);1185 if (es8326->jack->status & SND_JACK_MICROPHONE) {1186 es8326_disable_micbias(component);1187 snd_soc_jack_report(es8326->jack, 0, SND_JACK_HEADSET);1188 }1189 es8326->jack = NULL;1190 mutex_unlock(&es8326->lock);1191}1192 1193static int es8326_set_jack(struct snd_soc_component *component,1194 struct snd_soc_jack *jack, void *data)1195{1196 if (jack)1197 es8326_enable_jack_detect(component, jack);1198 else1199 es8326_disable_jack_detect(component);1200 1201 return 0;1202}1203 1204static void es8326_remove(struct snd_soc_component *component)1205{1206 struct es8326_priv *es8326 = snd_soc_component_get_drvdata(component);1207 1208 es8326_disable_jack_detect(component);1209 es8326_set_bias_level(component, SND_SOC_BIAS_OFF);1210 regmap_write(es8326->regmap, ES8326_CSM_I2C_STA, 0x01);1211 usleep_range(1000, 3000);1212 regmap_write(es8326->regmap, ES8326_CSM_I2C_STA, 0x00);1213}1214 1215static const struct snd_soc_component_driver soc_component_dev_es8326 = {1216 .probe = es8326_probe,1217 .remove = es8326_remove,1218 .resume = es8326_resume,1219 .suspend = es8326_suspend,1220 .set_bias_level = es8326_set_bias_level,1221 .set_jack = es8326_set_jack,1222 .dapm_widgets = es8326_dapm_widgets,1223 .num_dapm_widgets = ARRAY_SIZE(es8326_dapm_widgets),1224 .dapm_routes = es8326_dapm_routes,1225 .num_dapm_routes = ARRAY_SIZE(es8326_dapm_routes),1226 .controls = es8326_snd_controls,1227 .num_controls = ARRAY_SIZE(es8326_snd_controls),1228 .use_pmdown_time = 1,1229 .endianness = 1,1230};1231 1232static int es8326_i2c_probe(struct i2c_client *i2c)1233{1234 struct es8326_priv *es8326;1235 int ret;1236 1237 es8326 = devm_kzalloc(&i2c->dev, sizeof(struct es8326_priv), GFP_KERNEL);1238 if (!es8326)1239 return -ENOMEM;1240 1241 i2c_set_clientdata(i2c, es8326);1242 es8326->i2c = i2c;1243 mutex_init(&es8326->lock);1244 es8326->regmap = devm_regmap_init_i2c(i2c, &es8326_regmap_config);1245 if (IS_ERR(es8326->regmap)) {1246 ret = PTR_ERR(es8326->regmap);1247 dev_err(&i2c->dev, "Failed to init regmap: %d\n", ret);1248 return ret;1249 }1250 1251 es8326->irq = i2c->irq;1252 es8326->jack_remove_retry = 0;1253 es8326->hp = 0;1254 es8326->hpl_vol = 0x03;1255 es8326->hpr_vol = 0x03;1256 INIT_DELAYED_WORK(&es8326->jack_detect_work,1257 es8326_jack_detect_handler);1258 INIT_DELAYED_WORK(&es8326->button_press_work,1259 es8326_jack_button_handler);1260 /* ES8316 is level-based while ES8326 is edge-based */1261 ret = devm_request_threaded_irq(&i2c->dev, es8326->irq, NULL, es8326_irq,1262 IRQF_TRIGGER_RISING | IRQF_ONESHOT,1263 "es8326", es8326);1264 if (ret) {1265 dev_warn(&i2c->dev, "Failed to request IRQ: %d: %d\n",1266 es8326->irq, ret);1267 es8326->irq = -ENXIO;1268 }1269 1270 es8326->mclk = devm_clk_get_optional(&i2c->dev, "mclk");1271 if (IS_ERR(es8326->mclk)) {1272 dev_err(&i2c->dev, "unable to get mclk\n");1273 return PTR_ERR(es8326->mclk);1274 }1275 if (!es8326->mclk)1276 dev_warn(&i2c->dev, "assuming static mclk\n");1277 1278 ret = clk_prepare_enable(es8326->mclk);1279 if (ret) {1280 dev_err(&i2c->dev, "unable to enable mclk\n");1281 return ret;1282 }1283 return devm_snd_soc_register_component(&i2c->dev,1284 &soc_component_dev_es8326,1285 &es8326_dai, 1);1286}1287 1288 1289static void es8326_i2c_shutdown(struct i2c_client *i2c)1290{1291 struct snd_soc_component *component;1292 struct es8326_priv *es8326;1293 1294 es8326 = i2c_get_clientdata(i2c);1295 component = es8326->component;1296 dev_dbg(component->dev, "Enter into %s\n", __func__);1297 cancel_delayed_work_sync(&es8326->jack_detect_work);1298 cancel_delayed_work_sync(&es8326->button_press_work);1299 1300 regmap_write(es8326->regmap, ES8326_CSM_I2C_STA, 0x01);1301 usleep_range(1000, 3000);1302 regmap_write(es8326->regmap, ES8326_CSM_I2C_STA, 0x00);1303 1304}1305 1306static void es8326_i2c_remove(struct i2c_client *i2c)1307{1308 es8326_i2c_shutdown(i2c);1309}1310 1311static const struct i2c_device_id es8326_i2c_id[] = {1312 {"es8326" },1313 {}1314};1315MODULE_DEVICE_TABLE(i2c, es8326_i2c_id);1316 1317#ifdef CONFIG_OF1318static const struct of_device_id es8326_of_match[] = {1319 { .compatible = "everest,es8326", },1320 {}1321};1322MODULE_DEVICE_TABLE(of, es8326_of_match);1323#endif1324 1325#ifdef CONFIG_ACPI1326static const struct acpi_device_id es8326_acpi_match[] = {1327 {"ESSX8326", 0},1328 {},1329};1330MODULE_DEVICE_TABLE(acpi, es8326_acpi_match);1331#endif1332 1333static struct i2c_driver es8326_i2c_driver = {1334 .driver = {1335 .name = "es8326",1336 .acpi_match_table = ACPI_PTR(es8326_acpi_match),1337 .of_match_table = of_match_ptr(es8326_of_match),1338 },1339 .probe = es8326_i2c_probe,1340 .shutdown = es8326_i2c_shutdown,1341 .remove = es8326_i2c_remove,1342 .id_table = es8326_i2c_id,1343};1344module_i2c_driver(es8326_i2c_driver);1345 1346MODULE_DESCRIPTION("ASoC es8326 driver");1347MODULE_AUTHOR("David Yang <yangxiaohua@everest-semi.com>");1348MODULE_LICENSE("GPL");1349