2315 lines · c
1/* SPDX-License-Identifier: GPL-2.0 */2/*3 * mt6358.h -- mt6358 ALSA SoC audio codec driver4 *5 * Copyright (c) 2018 MediaTek Inc.6 * Author: KaiChieh Chuang <kaichieh.chuang@mediatek.com>7 */8 9#ifndef __MT6358_H__10#define __MT6358_H__11 12/* Reg bit define */13/* MT6358_DCXO_CW14 */14#define RG_XO_AUDIO_EN_M_SFT 1315 16/* MT6358_DCXO_CW13 */17#define RG_XO_VOW_EN_SFT 818 19/* MT6358_AUD_TOP_CKPDN_CON0 */20#define RG_VOW13M_CK_PDN_SFT 1321#define RG_VOW13M_CK_PDN_MASK 0x122#define RG_VOW13M_CK_PDN_MASK_SFT (0x1 << 13)23#define RG_VOW32K_CK_PDN_SFT 1224#define RG_VOW32K_CK_PDN_MASK 0x125#define RG_VOW32K_CK_PDN_MASK_SFT (0x1 << 12)26#define RG_AUD_INTRP_CK_PDN_SFT 827#define RG_AUD_INTRP_CK_PDN_MASK 0x128#define RG_AUD_INTRP_CK_PDN_MASK_SFT (0x1 << 8)29#define RG_PAD_AUD_CLK_MISO_CK_PDN_SFT 730#define RG_PAD_AUD_CLK_MISO_CK_PDN_MASK 0x131#define RG_PAD_AUD_CLK_MISO_CK_PDN_MASK_SFT (0x1 << 7)32#define RG_AUDNCP_CK_PDN_SFT 633#define RG_AUDNCP_CK_PDN_MASK 0x134#define RG_AUDNCP_CK_PDN_MASK_SFT (0x1 << 6)35#define RG_ZCD13M_CK_PDN_SFT 536#define RG_ZCD13M_CK_PDN_MASK 0x137#define RG_ZCD13M_CK_PDN_MASK_SFT (0x1 << 5)38#define RG_AUDIF_CK_PDN_SFT 239#define RG_AUDIF_CK_PDN_MASK 0x140#define RG_AUDIF_CK_PDN_MASK_SFT (0x1 << 2)41#define RG_AUD_CK_PDN_SFT 142#define RG_AUD_CK_PDN_MASK 0x143#define RG_AUD_CK_PDN_MASK_SFT (0x1 << 1)44#define RG_ACCDET_CK_PDN_SFT 045#define RG_ACCDET_CK_PDN_MASK 0x146#define RG_ACCDET_CK_PDN_MASK_SFT (0x1 << 0)47 48/* MT6358_AUD_TOP_CKPDN_CON0_SET */49#define RG_AUD_TOP_CKPDN_CON0_SET_SFT 050#define RG_AUD_TOP_CKPDN_CON0_SET_MASK 0x3fff51#define RG_AUD_TOP_CKPDN_CON0_SET_MASK_SFT (0x3fff << 0)52 53/* MT6358_AUD_TOP_CKPDN_CON0_CLR */54#define RG_AUD_TOP_CKPDN_CON0_CLR_SFT 055#define RG_AUD_TOP_CKPDN_CON0_CLR_MASK 0x3fff56#define RG_AUD_TOP_CKPDN_CON0_CLR_MASK_SFT (0x3fff << 0)57 58/* MT6358_AUD_TOP_CKSEL_CON0 */59#define RG_AUDIF_CK_CKSEL_SFT 360#define RG_AUDIF_CK_CKSEL_MASK 0x161#define RG_AUDIF_CK_CKSEL_MASK_SFT (0x1 << 3)62#define RG_AUD_CK_CKSEL_SFT 263#define RG_AUD_CK_CKSEL_MASK 0x164#define RG_AUD_CK_CKSEL_MASK_SFT (0x1 << 2)65 66/* MT6358_AUD_TOP_CKSEL_CON0_SET */67#define RG_AUD_TOP_CKSEL_CON0_SET_SFT 068#define RG_AUD_TOP_CKSEL_CON0_SET_MASK 0xf69#define RG_AUD_TOP_CKSEL_CON0_SET_MASK_SFT (0xf << 0)70 71/* MT6358_AUD_TOP_CKSEL_CON0_CLR */72#define RG_AUD_TOP_CKSEL_CON0_CLR_SFT 073#define RG_AUD_TOP_CKSEL_CON0_CLR_MASK 0xf74#define RG_AUD_TOP_CKSEL_CON0_CLR_MASK_SFT (0xf << 0)75 76/* MT6358_AUD_TOP_CKTST_CON0 */77#define RG_VOW13M_CK_TSTSEL_SFT 978#define RG_VOW13M_CK_TSTSEL_MASK 0x179#define RG_VOW13M_CK_TSTSEL_MASK_SFT (0x1 << 9)80#define RG_VOW13M_CK_TST_DIS_SFT 881#define RG_VOW13M_CK_TST_DIS_MASK 0x182#define RG_VOW13M_CK_TST_DIS_MASK_SFT (0x1 << 8)83#define RG_AUD26M_CK_TSTSEL_SFT 484#define RG_AUD26M_CK_TSTSEL_MASK 0x185#define RG_AUD26M_CK_TSTSEL_MASK_SFT (0x1 << 4)86#define RG_AUDIF_CK_TSTSEL_SFT 387#define RG_AUDIF_CK_TSTSEL_MASK 0x188#define RG_AUDIF_CK_TSTSEL_MASK_SFT (0x1 << 3)89#define RG_AUD_CK_TSTSEL_SFT 290#define RG_AUD_CK_TSTSEL_MASK 0x191#define RG_AUD_CK_TSTSEL_MASK_SFT (0x1 << 2)92#define RG_AUD26M_CK_TST_DIS_SFT 093#define RG_AUD26M_CK_TST_DIS_MASK 0x194#define RG_AUD26M_CK_TST_DIS_MASK_SFT (0x1 << 0)95 96/* MT6358_AUD_TOP_CLK_HWEN_CON0 */97#define RG_AUD_INTRP_CK_PDN_HWEN_SFT 098#define RG_AUD_INTRP_CK_PDN_HWEN_MASK 0x199#define RG_AUD_INTRP_CK_PDN_HWEN_MASK_SFT (0x1 << 0)100 101/* MT6358_AUD_TOP_CLK_HWEN_CON0_SET */102#define RG_AUD_INTRP_CK_PND_HWEN_CON0_SET_SFT 0103#define RG_AUD_INTRP_CK_PND_HWEN_CON0_SET_MASK 0xffff104#define RG_AUD_INTRP_CK_PND_HWEN_CON0_SET_MASK_SFT (0xffff << 0)105 106/* MT6358_AUD_TOP_CLK_HWEN_CON0_CLR */107#define RG_AUD_INTRP_CLK_PDN_HWEN_CON0_CLR_SFT 0108#define RG_AUD_INTRP_CLK_PDN_HWEN_CON0_CLR_MASK 0xffff109#define RG_AUD_INTRP_CLK_PDN_HWEN_CON0_CLR_MASK_SFT (0xffff << 0)110 111/* MT6358_AUD_TOP_RST_CON0 */112#define RG_AUDNCP_RST_SFT 3113#define RG_AUDNCP_RST_MASK 0x1114#define RG_AUDNCP_RST_MASK_SFT (0x1 << 3)115#define RG_ZCD_RST_SFT 2116#define RG_ZCD_RST_MASK 0x1117#define RG_ZCD_RST_MASK_SFT (0x1 << 2)118#define RG_ACCDET_RST_SFT 1119#define RG_ACCDET_RST_MASK 0x1120#define RG_ACCDET_RST_MASK_SFT (0x1 << 1)121#define RG_AUDIO_RST_SFT 0122#define RG_AUDIO_RST_MASK 0x1123#define RG_AUDIO_RST_MASK_SFT (0x1 << 0)124 125/* MT6358_AUD_TOP_RST_CON0_SET */126#define RG_AUD_TOP_RST_CON0_SET_SFT 0127#define RG_AUD_TOP_RST_CON0_SET_MASK 0xf128#define RG_AUD_TOP_RST_CON0_SET_MASK_SFT (0xf << 0)129 130/* MT6358_AUD_TOP_RST_CON0_CLR */131#define RG_AUD_TOP_RST_CON0_CLR_SFT 0132#define RG_AUD_TOP_RST_CON0_CLR_MASK 0xf133#define RG_AUD_TOP_RST_CON0_CLR_MASK_SFT (0xf << 0)134 135/* MT6358_AUD_TOP_RST_BANK_CON0 */136#define BANK_AUDZCD_SWRST_SFT 2137#define BANK_AUDZCD_SWRST_MASK 0x1138#define BANK_AUDZCD_SWRST_MASK_SFT (0x1 << 2)139#define BANK_AUDIO_SWRST_SFT 1140#define BANK_AUDIO_SWRST_MASK 0x1141#define BANK_AUDIO_SWRST_MASK_SFT (0x1 << 1)142#define BANK_ACCDET_SWRST_SFT 0143#define BANK_ACCDET_SWRST_MASK 0x1144#define BANK_ACCDET_SWRST_MASK_SFT (0x1 << 0)145 146/* MT6358_AUD_TOP_INT_CON0 */147#define RG_INT_EN_AUDIO_SFT 0148#define RG_INT_EN_AUDIO_MASK 0x1149#define RG_INT_EN_AUDIO_MASK_SFT (0x1 << 0)150#define RG_INT_EN_ACCDET_SFT 5151#define RG_INT_EN_ACCDET_MASK 0x1152#define RG_INT_EN_ACCDET_MASK_SFT (0x1 << 5)153#define RG_INT_EN_ACCDET_EINT0_SFT 6154#define RG_INT_EN_ACCDET_EINT0_MASK 0x1155#define RG_INT_EN_ACCDET_EINT0_MASK_SFT (0x1 << 6)156#define RG_INT_EN_ACCDET_EINT1_SFT 7157#define RG_INT_EN_ACCDET_EINT1_MASK 0x1158#define RG_INT_EN_ACCDET_EINT1_MASK_SFT (0x1 << 7)159 160/* MT6358_AUD_TOP_INT_CON0_SET */161#define RG_AUD_INT_CON0_SET_SFT 0162#define RG_AUD_INT_CON0_SET_MASK 0xffff163#define RG_AUD_INT_CON0_SET_MASK_SFT (0xffff << 0)164 165/* MT6358_AUD_TOP_INT_CON0_CLR */166#define RG_AUD_INT_CON0_CLR_SFT 0167#define RG_AUD_INT_CON0_CLR_MASK 0xffff168#define RG_AUD_INT_CON0_CLR_MASK_SFT (0xffff << 0)169 170/* MT6358_AUD_TOP_INT_MASK_CON0 */171#define RG_INT_MASK_AUDIO_SFT 0172#define RG_INT_MASK_AUDIO_MASK 0x1173#define RG_INT_MASK_AUDIO_MASK_SFT (0x1 << 0)174#define RG_INT_MASK_ACCDET_SFT 5175#define RG_INT_MASK_ACCDET_MASK 0x1176#define RG_INT_MASK_ACCDET_MASK_SFT (0x1 << 5)177#define RG_INT_MASK_ACCDET_EINT0_SFT 6178#define RG_INT_MASK_ACCDET_EINT0_MASK 0x1179#define RG_INT_MASK_ACCDET_EINT0_MASK_SFT (0x1 << 6)180#define RG_INT_MASK_ACCDET_EINT1_SFT 7181#define RG_INT_MASK_ACCDET_EINT1_MASK 0x1182#define RG_INT_MASK_ACCDET_EINT1_MASK_SFT (0x1 << 7)183 184/* MT6358_AUD_TOP_INT_MASK_CON0_SET */185#define RG_AUD_INT_MASK_CON0_SET_SFT 0186#define RG_AUD_INT_MASK_CON0_SET_MASK 0xff187#define RG_AUD_INT_MASK_CON0_SET_MASK_SFT (0xff << 0)188 189/* MT6358_AUD_TOP_INT_MASK_CON0_CLR */190#define RG_AUD_INT_MASK_CON0_CLR_SFT 0191#define RG_AUD_INT_MASK_CON0_CLR_MASK 0xff192#define RG_AUD_INT_MASK_CON0_CLR_MASK_SFT (0xff << 0)193 194/* MT6358_AUD_TOP_INT_STATUS0 */195#define RG_INT_STATUS_AUDIO_SFT 0196#define RG_INT_STATUS_AUDIO_MASK 0x1197#define RG_INT_STATUS_AUDIO_MASK_SFT (0x1 << 0)198#define RG_INT_STATUS_ACCDET_SFT 5199#define RG_INT_STATUS_ACCDET_MASK 0x1200#define RG_INT_STATUS_ACCDET_MASK_SFT (0x1 << 5)201#define RG_INT_STATUS_ACCDET_EINT0_SFT 6202#define RG_INT_STATUS_ACCDET_EINT0_MASK 0x1203#define RG_INT_STATUS_ACCDET_EINT0_MASK_SFT (0x1 << 6)204#define RG_INT_STATUS_ACCDET_EINT1_SFT 7205#define RG_INT_STATUS_ACCDET_EINT1_MASK 0x1206#define RG_INT_STATUS_ACCDET_EINT1_MASK_SFT (0x1 << 7)207 208/* MT6358_AUD_TOP_INT_RAW_STATUS0 */209#define RG_INT_RAW_STATUS_AUDIO_SFT 0210#define RG_INT_RAW_STATUS_AUDIO_MASK 0x1211#define RG_INT_RAW_STATUS_AUDIO_MASK_SFT (0x1 << 0)212#define RG_INT_RAW_STATUS_ACCDET_SFT 5213#define RG_INT_RAW_STATUS_ACCDET_MASK 0x1214#define RG_INT_RAW_STATUS_ACCDET_MASK_SFT (0x1 << 5)215#define RG_INT_RAW_STATUS_ACCDET_EINT0_SFT 6216#define RG_INT_RAW_STATUS_ACCDET_EINT0_MASK 0x1217#define RG_INT_RAW_STATUS_ACCDET_EINT0_MASK_SFT (0x1 << 6)218#define RG_INT_RAW_STATUS_ACCDET_EINT1_SFT 7219#define RG_INT_RAW_STATUS_ACCDET_EINT1_MASK 0x1220#define RG_INT_RAW_STATUS_ACCDET_EINT1_MASK_SFT (0x1 << 7)221 222/* MT6358_AUD_TOP_INT_MISC_CON0 */223#define RG_AUD_TOP_INT_POLARITY_SFT 0224#define RG_AUD_TOP_INT_POLARITY_MASK 0x1225#define RG_AUD_TOP_INT_POLARITY_MASK_SFT (0x1 << 0)226 227/* MT6358_AUDNCP_CLKDIV_CON0 */228#define RG_DIVCKS_CHG_SFT 0229#define RG_DIVCKS_CHG_MASK 0x1230#define RG_DIVCKS_CHG_MASK_SFT (0x1 << 0)231 232/* MT6358_AUDNCP_CLKDIV_CON1 */233#define RG_DIVCKS_ON_SFT 0234#define RG_DIVCKS_ON_MASK 0x1235#define RG_DIVCKS_ON_MASK_SFT (0x1 << 0)236 237/* MT6358_AUDNCP_CLKDIV_CON2 */238#define RG_DIVCKS_PRG_SFT 0239#define RG_DIVCKS_PRG_MASK 0x1ff240#define RG_DIVCKS_PRG_MASK_SFT (0x1ff << 0)241 242/* MT6358_AUDNCP_CLKDIV_CON3 */243#define RG_DIVCKS_PWD_NCP_SFT 0244#define RG_DIVCKS_PWD_NCP_MASK 0x1245#define RG_DIVCKS_PWD_NCP_MASK_SFT (0x1 << 0)246 247/* MT6358_AUDNCP_CLKDIV_CON4 */248#define RG_DIVCKS_PWD_NCP_ST_SEL_SFT 0249#define RG_DIVCKS_PWD_NCP_ST_SEL_MASK 0x3250#define RG_DIVCKS_PWD_NCP_ST_SEL_MASK_SFT (0x3 << 0)251 252/* MT6358_AUD_TOP_MON_CON0 */253#define RG_AUD_TOP_MON_SEL_SFT 0254#define RG_AUD_TOP_MON_SEL_MASK 0x7255#define RG_AUD_TOP_MON_SEL_MASK_SFT (0x7 << 0)256#define RG_AUD_CLK_INT_MON_FLAG_SEL_SFT 3257#define RG_AUD_CLK_INT_MON_FLAG_SEL_MASK 0xff258#define RG_AUD_CLK_INT_MON_FLAG_SEL_MASK_SFT (0xff << 3)259#define RG_AUD_CLK_INT_MON_FLAG_EN_SFT 11260#define RG_AUD_CLK_INT_MON_FLAG_EN_MASK 0x1261#define RG_AUD_CLK_INT_MON_FLAG_EN_MASK_SFT (0x1 << 11)262 263/* MT6358_AUDIO_DIG_DSN_ID */264#define AUDIO_DIG_ANA_ID_SFT 0265#define AUDIO_DIG_ANA_ID_MASK 0xff266#define AUDIO_DIG_ANA_ID_MASK_SFT (0xff << 0)267#define AUDIO_DIG_DIG_ID_SFT 8268#define AUDIO_DIG_DIG_ID_MASK 0xff269#define AUDIO_DIG_DIG_ID_MASK_SFT (0xff << 8)270 271/* MT6358_AUDIO_DIG_DSN_REV0 */272#define AUDIO_DIG_ANA_MINOR_REV_SFT 0273#define AUDIO_DIG_ANA_MINOR_REV_MASK 0xf274#define AUDIO_DIG_ANA_MINOR_REV_MASK_SFT (0xf << 0)275#define AUDIO_DIG_ANA_MAJOR_REV_SFT 4276#define AUDIO_DIG_ANA_MAJOR_REV_MASK 0xf277#define AUDIO_DIG_ANA_MAJOR_REV_MASK_SFT (0xf << 4)278#define AUDIO_DIG_DIG_MINOR_REV_SFT 8279#define AUDIO_DIG_DIG_MINOR_REV_MASK 0xf280#define AUDIO_DIG_DIG_MINOR_REV_MASK_SFT (0xf << 8)281#define AUDIO_DIG_DIG_MAJOR_REV_SFT 12282#define AUDIO_DIG_DIG_MAJOR_REV_MASK 0xf283#define AUDIO_DIG_DIG_MAJOR_REV_MASK_SFT (0xf << 12)284 285/* MT6358_AUDIO_DIG_DSN_DBI */286#define AUDIO_DIG_DSN_CBS_SFT 0287#define AUDIO_DIG_DSN_CBS_MASK 0x3288#define AUDIO_DIG_DSN_CBS_MASK_SFT (0x3 << 0)289#define AUDIO_DIG_DSN_BIX_SFT 2290#define AUDIO_DIG_DSN_BIX_MASK 0x3291#define AUDIO_DIG_DSN_BIX_MASK_SFT (0x3 << 2)292#define AUDIO_DIG_ESP_SFT 8293#define AUDIO_DIG_ESP_MASK 0xff294#define AUDIO_DIG_ESP_MASK_SFT (0xff << 8)295 296/* MT6358_AUDIO_DIG_DSN_DXI */297#define AUDIO_DIG_DSN_FPI_SFT 0298#define AUDIO_DIG_DSN_FPI_MASK 0xff299#define AUDIO_DIG_DSN_FPI_MASK_SFT (0xff << 0)300 301/* MT6358_AFE_UL_DL_CON0 */302#define AFE_UL_LR_SWAP_SFT 15303#define AFE_UL_LR_SWAP_MASK 0x1304#define AFE_UL_LR_SWAP_MASK_SFT (0x1 << 15)305#define AFE_DL_LR_SWAP_SFT 14306#define AFE_DL_LR_SWAP_MASK 0x1307#define AFE_DL_LR_SWAP_MASK_SFT (0x1 << 14)308#define AFE_ON_SFT 0309#define AFE_ON_MASK 0x1310#define AFE_ON_MASK_SFT (0x1 << 0)311 312/* MT6358_AFE_DL_SRC2_CON0_L */313#define DL_2_SRC_ON_TMP_CTL_PRE_SFT 0314#define DL_2_SRC_ON_TMP_CTL_PRE_MASK 0x1315#define DL_2_SRC_ON_TMP_CTL_PRE_MASK_SFT (0x1 << 0)316 317/* MT6358_AFE_UL_SRC_CON0_H */318#define C_DIGMIC_PHASE_SEL_CH1_CTL_SFT 11319#define C_DIGMIC_PHASE_SEL_CH1_CTL_MASK 0x7320#define C_DIGMIC_PHASE_SEL_CH1_CTL_MASK_SFT (0x7 << 11)321#define C_DIGMIC_PHASE_SEL_CH2_CTL_SFT 8322#define C_DIGMIC_PHASE_SEL_CH2_CTL_MASK 0x7323#define C_DIGMIC_PHASE_SEL_CH2_CTL_MASK_SFT (0x7 << 8)324#define C_TWO_DIGITAL_MIC_CTL_SFT 7325#define C_TWO_DIGITAL_MIC_CTL_MASK 0x1326#define C_TWO_DIGITAL_MIC_CTL_MASK_SFT (0x1 << 7)327 328/* MT6358_AFE_UL_SRC_CON0_L */329#define DMIC_LOW_POWER_MODE_CTL_SFT 14330#define DMIC_LOW_POWER_MODE_CTL_MASK 0x3331#define DMIC_LOW_POWER_MODE_CTL_MASK_SFT (0x3 << 14)332#define DIGMIC_3P25M_1P625M_SEL_CTL_SFT 5333#define DIGMIC_3P25M_1P625M_SEL_CTL_MASK 0x1334#define DIGMIC_3P25M_1P625M_SEL_CTL_MASK_SFT (0x1 << 5)335#define UL_LOOP_BACK_MODE_CTL_SFT 2336#define UL_LOOP_BACK_MODE_CTL_MASK 0x1337#define UL_LOOP_BACK_MODE_CTL_MASK_SFT (0x1 << 2)338#define UL_SDM_3_LEVEL_CTL_SFT 1339#define UL_SDM_3_LEVEL_CTL_MASK 0x1340#define UL_SDM_3_LEVEL_CTL_MASK_SFT (0x1 << 1)341#define UL_SRC_ON_TMP_CTL_SFT 0342#define UL_SRC_ON_TMP_CTL_MASK 0x1343#define UL_SRC_ON_TMP_CTL_MASK_SFT (0x1 << 0)344 345/* MT6358_AFE_TOP_CON0 */346#define MTKAIF_SINE_ON_SFT 2347#define MTKAIF_SINE_ON_MASK 0x1348#define MTKAIF_SINE_ON_MASK_SFT (0x1 << 2)349#define UL_SINE_ON_SFT 1350#define UL_SINE_ON_MASK 0x1351#define UL_SINE_ON_MASK_SFT (0x1 << 1)352#define DL_SINE_ON_SFT 0353#define DL_SINE_ON_MASK 0x1354#define DL_SINE_ON_MASK_SFT (0x1 << 0)355 356/* MT6358_AUDIO_TOP_CON0 */357#define PDN_AFE_CTL_SFT 7358#define PDN_AFE_CTL_MASK 0x1359#define PDN_AFE_CTL_MASK_SFT (0x1 << 7)360#define PDN_DAC_CTL_SFT 6361#define PDN_DAC_CTL_MASK 0x1362#define PDN_DAC_CTL_MASK_SFT (0x1 << 6)363#define PDN_ADC_CTL_SFT 5364#define PDN_ADC_CTL_MASK 0x1365#define PDN_ADC_CTL_MASK_SFT (0x1 << 5)366#define PDN_I2S_DL_CTL_SFT 3367#define PDN_I2S_DL_CTL_MASK 0x1368#define PDN_I2S_DL_CTL_MASK_SFT (0x1 << 3)369#define PWR_CLK_DIS_CTL_SFT 2370#define PWR_CLK_DIS_CTL_MASK 0x1371#define PWR_CLK_DIS_CTL_MASK_SFT (0x1 << 2)372#define PDN_AFE_TESTMODEL_CTL_SFT 1373#define PDN_AFE_TESTMODEL_CTL_MASK 0x1374#define PDN_AFE_TESTMODEL_CTL_MASK_SFT (0x1 << 1)375#define PDN_RESERVED_SFT 0376#define PDN_RESERVED_MASK 0x1377#define PDN_RESERVED_MASK_SFT (0x1 << 0)378 379/* MT6358_AFE_MON_DEBUG0 */380#define AUDIO_SYS_TOP_MON_SWAP_SFT 14381#define AUDIO_SYS_TOP_MON_SWAP_MASK 0x3382#define AUDIO_SYS_TOP_MON_SWAP_MASK_SFT (0x3 << 14)383#define AUDIO_SYS_TOP_MON_SEL_SFT 8384#define AUDIO_SYS_TOP_MON_SEL_MASK 0x1f385#define AUDIO_SYS_TOP_MON_SEL_MASK_SFT (0x1f << 8)386#define AFE_MON_SEL_SFT 0387#define AFE_MON_SEL_MASK 0xff388#define AFE_MON_SEL_MASK_SFT (0xff << 0)389 390/* MT6358_AFUNC_AUD_CON0 */391#define CCI_AUD_ANACK_SEL_SFT 15392#define CCI_AUD_ANACK_SEL_MASK 0x1393#define CCI_AUD_ANACK_SEL_MASK_SFT (0x1 << 15)394#define CCI_AUDIO_FIFO_WPTR_SFT 12395#define CCI_AUDIO_FIFO_WPTR_MASK 0x7396#define CCI_AUDIO_FIFO_WPTR_MASK_SFT (0x7 << 12)397#define CCI_SCRAMBLER_CG_EN_SFT 11398#define CCI_SCRAMBLER_CG_EN_MASK 0x1399#define CCI_SCRAMBLER_CG_EN_MASK_SFT (0x1 << 11)400#define CCI_LCH_INV_SFT 10401#define CCI_LCH_INV_MASK 0x1402#define CCI_LCH_INV_MASK_SFT (0x1 << 10)403#define CCI_RAND_EN_SFT 9404#define CCI_RAND_EN_MASK 0x1405#define CCI_RAND_EN_MASK_SFT (0x1 << 9)406#define CCI_SPLT_SCRMB_CLK_ON_SFT 8407#define CCI_SPLT_SCRMB_CLK_ON_MASK 0x1408#define CCI_SPLT_SCRMB_CLK_ON_MASK_SFT (0x1 << 8)409#define CCI_SPLT_SCRMB_ON_SFT 7410#define CCI_SPLT_SCRMB_ON_MASK 0x1411#define CCI_SPLT_SCRMB_ON_MASK_SFT (0x1 << 7)412#define CCI_AUD_IDAC_TEST_EN_SFT 6413#define CCI_AUD_IDAC_TEST_EN_MASK 0x1414#define CCI_AUD_IDAC_TEST_EN_MASK_SFT (0x1 << 6)415#define CCI_ZERO_PAD_DISABLE_SFT 5416#define CCI_ZERO_PAD_DISABLE_MASK 0x1417#define CCI_ZERO_PAD_DISABLE_MASK_SFT (0x1 << 5)418#define CCI_AUD_SPLIT_TEST_EN_SFT 4419#define CCI_AUD_SPLIT_TEST_EN_MASK 0x1420#define CCI_AUD_SPLIT_TEST_EN_MASK_SFT (0x1 << 4)421#define CCI_AUD_SDM_MUTEL_SFT 3422#define CCI_AUD_SDM_MUTEL_MASK 0x1423#define CCI_AUD_SDM_MUTEL_MASK_SFT (0x1 << 3)424#define CCI_AUD_SDM_MUTER_SFT 2425#define CCI_AUD_SDM_MUTER_MASK 0x1426#define CCI_AUD_SDM_MUTER_MASK_SFT (0x1 << 2)427#define CCI_AUD_SDM_7BIT_SEL_SFT 1428#define CCI_AUD_SDM_7BIT_SEL_MASK 0x1429#define CCI_AUD_SDM_7BIT_SEL_MASK_SFT (0x1 << 1)430#define CCI_SCRAMBLER_EN_SFT 0431#define CCI_SCRAMBLER_EN_MASK 0x1432#define CCI_SCRAMBLER_EN_MASK_SFT (0x1 << 0)433 434/* MT6358_AFUNC_AUD_CON1 */435#define AUD_SDM_TEST_L_SFT 8436#define AUD_SDM_TEST_L_MASK 0xff437#define AUD_SDM_TEST_L_MASK_SFT (0xff << 8)438#define AUD_SDM_TEST_R_SFT 0439#define AUD_SDM_TEST_R_MASK 0xff440#define AUD_SDM_TEST_R_MASK_SFT (0xff << 0)441 442/* MT6358_AFUNC_AUD_CON2 */443#define CCI_AUD_DAC_ANA_MUTE_SFT 7444#define CCI_AUD_DAC_ANA_MUTE_MASK 0x1445#define CCI_AUD_DAC_ANA_MUTE_MASK_SFT (0x1 << 7)446#define CCI_AUD_DAC_ANA_RSTB_SEL_SFT 6447#define CCI_AUD_DAC_ANA_RSTB_SEL_MASK 0x1448#define CCI_AUD_DAC_ANA_RSTB_SEL_MASK_SFT (0x1 << 6)449#define CCI_AUDIO_FIFO_CLKIN_INV_SFT 4450#define CCI_AUDIO_FIFO_CLKIN_INV_MASK 0x1451#define CCI_AUDIO_FIFO_CLKIN_INV_MASK_SFT (0x1 << 4)452#define CCI_AUDIO_FIFO_ENABLE_SFT 3453#define CCI_AUDIO_FIFO_ENABLE_MASK 0x1454#define CCI_AUDIO_FIFO_ENABLE_MASK_SFT (0x1 << 3)455#define CCI_ACD_MODE_SFT 2456#define CCI_ACD_MODE_MASK 0x1457#define CCI_ACD_MODE_MASK_SFT (0x1 << 2)458#define CCI_AFIFO_CLK_PWDB_SFT 1459#define CCI_AFIFO_CLK_PWDB_MASK 0x1460#define CCI_AFIFO_CLK_PWDB_MASK_SFT (0x1 << 1)461#define CCI_ACD_FUNC_RSTB_SFT 0462#define CCI_ACD_FUNC_RSTB_MASK 0x1463#define CCI_ACD_FUNC_RSTB_MASK_SFT (0x1 << 0)464 465/* MT6358_AFUNC_AUD_CON3 */466#define SDM_ANA13M_TESTCK_SEL_SFT 15467#define SDM_ANA13M_TESTCK_SEL_MASK 0x1468#define SDM_ANA13M_TESTCK_SEL_MASK_SFT (0x1 << 15)469#define SDM_ANA13M_TESTCK_SRC_SEL_SFT 12470#define SDM_ANA13M_TESTCK_SRC_SEL_MASK 0x7471#define SDM_ANA13M_TESTCK_SRC_SEL_MASK_SFT (0x7 << 12)472#define SDM_TESTCK_SRC_SEL_SFT 8473#define SDM_TESTCK_SRC_SEL_MASK 0x7474#define SDM_TESTCK_SRC_SEL_MASK_SFT (0x7 << 8)475#define DIGMIC_TESTCK_SRC_SEL_SFT 4476#define DIGMIC_TESTCK_SRC_SEL_MASK 0x7477#define DIGMIC_TESTCK_SRC_SEL_MASK_SFT (0x7 << 4)478#define DIGMIC_TESTCK_SEL_SFT 0479#define DIGMIC_TESTCK_SEL_MASK 0x1480#define DIGMIC_TESTCK_SEL_MASK_SFT (0x1 << 0)481 482/* MT6358_AFUNC_AUD_CON4 */483#define UL_FIFO_WCLK_INV_SFT 8484#define UL_FIFO_WCLK_INV_MASK 0x1485#define UL_FIFO_WCLK_INV_MASK_SFT (0x1 << 8)486#define UL_FIFO_DIGMIC_WDATA_TESTSRC_SEL_SFT 6487#define UL_FIFO_DIGMIC_WDATA_TESTSRC_SEL_MASK 0x1488#define UL_FIFO_DIGMIC_WDATA_TESTSRC_SEL_MASK_SFT (0x1 << 6)489#define UL_FIFO_WDATA_TESTEN_SFT 5490#define UL_FIFO_WDATA_TESTEN_MASK 0x1491#define UL_FIFO_WDATA_TESTEN_MASK_SFT (0x1 << 5)492#define UL_FIFO_WDATA_TESTSRC_SEL_SFT 4493#define UL_FIFO_WDATA_TESTSRC_SEL_MASK 0x1494#define UL_FIFO_WDATA_TESTSRC_SEL_MASK_SFT (0x1 << 4)495#define UL_FIFO_WCLK_6P5M_TESTCK_SEL_SFT 3496#define UL_FIFO_WCLK_6P5M_TESTCK_SEL_MASK 0x1497#define UL_FIFO_WCLK_6P5M_TESTCK_SEL_MASK_SFT (0x1 << 3)498#define UL_FIFO_WCLK_6P5M_TESTCK_SRC_SEL_SFT 0499#define UL_FIFO_WCLK_6P5M_TESTCK_SRC_SEL_MASK 0x7500#define UL_FIFO_WCLK_6P5M_TESTCK_SRC_SEL_MASK_SFT (0x7 << 0)501 502/* MT6358_AFUNC_AUD_CON5 */503#define R_AUD_DAC_POS_LARGE_MONO_SFT 8504#define R_AUD_DAC_POS_LARGE_MONO_MASK 0xff505#define R_AUD_DAC_POS_LARGE_MONO_MASK_SFT (0xff << 8)506#define R_AUD_DAC_NEG_LARGE_MONO_SFT 0507#define R_AUD_DAC_NEG_LARGE_MONO_MASK 0xff508#define R_AUD_DAC_NEG_LARGE_MONO_MASK_SFT (0xff << 0)509 510/* MT6358_AFUNC_AUD_CON6 */511#define R_AUD_DAC_POS_SMALL_MONO_SFT 12512#define R_AUD_DAC_POS_SMALL_MONO_MASK 0xf513#define R_AUD_DAC_POS_SMALL_MONO_MASK_SFT (0xf << 12)514#define R_AUD_DAC_NEG_SMALL_MONO_SFT 8515#define R_AUD_DAC_NEG_SMALL_MONO_MASK 0xf516#define R_AUD_DAC_NEG_SMALL_MONO_MASK_SFT (0xf << 8)517#define R_AUD_DAC_POS_TINY_MONO_SFT 6518#define R_AUD_DAC_POS_TINY_MONO_MASK 0x3519#define R_AUD_DAC_POS_TINY_MONO_MASK_SFT (0x3 << 6)520#define R_AUD_DAC_NEG_TINY_MONO_SFT 4521#define R_AUD_DAC_NEG_TINY_MONO_MASK 0x3522#define R_AUD_DAC_NEG_TINY_MONO_MASK_SFT (0x3 << 4)523#define R_AUD_DAC_MONO_SEL_SFT 3524#define R_AUD_DAC_MONO_SEL_MASK 0x1525#define R_AUD_DAC_MONO_SEL_MASK_SFT (0x1 << 3)526#define R_AUD_DAC_SW_RSTB_SFT 0527#define R_AUD_DAC_SW_RSTB_MASK 0x1528#define R_AUD_DAC_SW_RSTB_MASK_SFT (0x1 << 0)529 530/* MT6358_AFUNC_AUD_MON0 */531#define AUD_SCR_OUT_L_SFT 8532#define AUD_SCR_OUT_L_MASK 0xff533#define AUD_SCR_OUT_L_MASK_SFT (0xff << 8)534#define AUD_SCR_OUT_R_SFT 0535#define AUD_SCR_OUT_R_MASK 0xff536#define AUD_SCR_OUT_R_MASK_SFT (0xff << 0)537 538/* MT6358_AUDRC_TUNE_MON0 */539#define ASYNC_TEST_OUT_BCK_SFT 15540#define ASYNC_TEST_OUT_BCK_MASK 0x1541#define ASYNC_TEST_OUT_BCK_MASK_SFT (0x1 << 15)542#define RGS_AUDRCTUNE1READ_SFT 8543#define RGS_AUDRCTUNE1READ_MASK 0x1f544#define RGS_AUDRCTUNE1READ_MASK_SFT (0x1f << 8)545#define RGS_AUDRCTUNE0READ_SFT 0546#define RGS_AUDRCTUNE0READ_MASK 0x1f547#define RGS_AUDRCTUNE0READ_MASK_SFT (0x1f << 0)548 549/* MT6358_AFE_ADDA_MTKAIF_FIFO_CFG0 */550#define AFE_RESERVED_SFT 1551#define AFE_RESERVED_MASK 0x7fff552#define AFE_RESERVED_MASK_SFT (0x7fff << 1)553#define RG_MTKAIF_RXIF_FIFO_INTEN_SFT 0554#define RG_MTKAIF_RXIF_FIFO_INTEN_MASK 0x1555#define RG_MTKAIF_RXIF_FIFO_INTEN_MASK_SFT (0x1 << 0)556 557/* MT6358_AFE_ADDA_MTKAIF_FIFO_LOG_MON1 */558#define MTKAIF_RXIF_WR_FULL_STATUS_SFT 1559#define MTKAIF_RXIF_WR_FULL_STATUS_MASK 0x1560#define MTKAIF_RXIF_WR_FULL_STATUS_MASK_SFT (0x1 << 1)561#define MTKAIF_RXIF_RD_EMPTY_STATUS_SFT 0562#define MTKAIF_RXIF_RD_EMPTY_STATUS_MASK 0x1563#define MTKAIF_RXIF_RD_EMPTY_STATUS_MASK_SFT (0x1 << 0)564 565/* MT6358_AFE_ADDA_MTKAIF_MON0 */566#define MTKAIFTX_V3_SYNC_OUT_SFT 14567#define MTKAIFTX_V3_SYNC_OUT_MASK 0x1568#define MTKAIFTX_V3_SYNC_OUT_MASK_SFT (0x1 << 14)569#define MTKAIFTX_V3_SDATA_OUT2_SFT 13570#define MTKAIFTX_V3_SDATA_OUT2_MASK 0x1571#define MTKAIFTX_V3_SDATA_OUT2_MASK_SFT (0x1 << 13)572#define MTKAIFTX_V3_SDATA_OUT1_SFT 12573#define MTKAIFTX_V3_SDATA_OUT1_MASK 0x1574#define MTKAIFTX_V3_SDATA_OUT1_MASK_SFT (0x1 << 12)575#define MTKAIF_RXIF_FIFO_STATUS_SFT 0576#define MTKAIF_RXIF_FIFO_STATUS_MASK 0xfff577#define MTKAIF_RXIF_FIFO_STATUS_MASK_SFT (0xfff << 0)578 579/* MT6358_AFE_ADDA_MTKAIF_MON1 */580#define MTKAIFRX_V3_SYNC_IN_SFT 14581#define MTKAIFRX_V3_SYNC_IN_MASK 0x1582#define MTKAIFRX_V3_SYNC_IN_MASK_SFT (0x1 << 14)583#define MTKAIFRX_V3_SDATA_IN2_SFT 13584#define MTKAIFRX_V3_SDATA_IN2_MASK 0x1585#define MTKAIFRX_V3_SDATA_IN2_MASK_SFT (0x1 << 13)586#define MTKAIFRX_V3_SDATA_IN1_SFT 12587#define MTKAIFRX_V3_SDATA_IN1_MASK 0x1588#define MTKAIFRX_V3_SDATA_IN1_MASK_SFT (0x1 << 12)589#define MTKAIF_RXIF_SEARCH_FAIL_FLAG_SFT 11590#define MTKAIF_RXIF_SEARCH_FAIL_FLAG_MASK 0x1591#define MTKAIF_RXIF_SEARCH_FAIL_FLAG_MASK_SFT (0x1 << 11)592#define MTKAIF_RXIF_INVALID_FLAG_SFT 8593#define MTKAIF_RXIF_INVALID_FLAG_MASK 0x1594#define MTKAIF_RXIF_INVALID_FLAG_MASK_SFT (0x1 << 8)595#define MTKAIF_RXIF_INVALID_CYCLE_SFT 0596#define MTKAIF_RXIF_INVALID_CYCLE_MASK 0xff597#define MTKAIF_RXIF_INVALID_CYCLE_MASK_SFT (0xff << 0)598 599/* MT6358_AFE_ADDA_MTKAIF_MON2 */600#define MTKAIF_TXIF_IN_CH2_SFT 8601#define MTKAIF_TXIF_IN_CH2_MASK 0xff602#define MTKAIF_TXIF_IN_CH2_MASK_SFT (0xff << 8)603#define MTKAIF_TXIF_IN_CH1_SFT 0604#define MTKAIF_TXIF_IN_CH1_MASK 0xff605#define MTKAIF_TXIF_IN_CH1_MASK_SFT (0xff << 0)606 607/* MT6358_AFE_ADDA_MTKAIF_MON3 */608#define MTKAIF_RXIF_OUT_CH2_SFT 8609#define MTKAIF_RXIF_OUT_CH2_MASK 0xff610#define MTKAIF_RXIF_OUT_CH2_MASK_SFT (0xff << 8)611#define MTKAIF_RXIF_OUT_CH1_SFT 0612#define MTKAIF_RXIF_OUT_CH1_MASK 0xff613#define MTKAIF_RXIF_OUT_CH1_MASK_SFT (0xff << 0)614 615/* MT6358_AFE_ADDA_MTKAIF_CFG0 */616#define RG_MTKAIF_RXIF_CLKINV_SFT 15617#define RG_MTKAIF_RXIF_CLKINV_MASK 0x1618#define RG_MTKAIF_RXIF_CLKINV_MASK_SFT (0x1 << 15)619#define RG_MTKAIF_RXIF_PROTOCOL2_SFT 8620#define RG_MTKAIF_RXIF_PROTOCOL2_MASK 0x1621#define RG_MTKAIF_RXIF_PROTOCOL2_MASK_SFT (0x1 << 8)622#define RG_MTKAIF_BYPASS_SRC_MODE_SFT 6623#define RG_MTKAIF_BYPASS_SRC_MODE_MASK 0x3624#define RG_MTKAIF_BYPASS_SRC_MODE_MASK_SFT (0x3 << 6)625#define RG_MTKAIF_BYPASS_SRC_TEST_SFT 5626#define RG_MTKAIF_BYPASS_SRC_TEST_MASK 0x1627#define RG_MTKAIF_BYPASS_SRC_TEST_MASK_SFT (0x1 << 5)628#define RG_MTKAIF_TXIF_PROTOCOL2_SFT 4629#define RG_MTKAIF_TXIF_PROTOCOL2_MASK 0x1630#define RG_MTKAIF_TXIF_PROTOCOL2_MASK_SFT (0x1 << 4)631#define RG_MTKAIF_PMIC_TXIF_8TO5_SFT 2632#define RG_MTKAIF_PMIC_TXIF_8TO5_MASK 0x1633#define RG_MTKAIF_PMIC_TXIF_8TO5_MASK_SFT (0x1 << 2)634#define RG_MTKAIF_LOOPBACK_TEST2_SFT 1635#define RG_MTKAIF_LOOPBACK_TEST2_MASK 0x1636#define RG_MTKAIF_LOOPBACK_TEST2_MASK_SFT (0x1 << 1)637#define RG_MTKAIF_LOOPBACK_TEST1_SFT 0638#define RG_MTKAIF_LOOPBACK_TEST1_MASK 0x1639#define RG_MTKAIF_LOOPBACK_TEST1_MASK_SFT (0x1 << 0)640 641/* MT6358_AFE_ADDA_MTKAIF_RX_CFG0 */642#define RG_MTKAIF_RXIF_VOICE_MODE_SFT 12643#define RG_MTKAIF_RXIF_VOICE_MODE_MASK 0xf644#define RG_MTKAIF_RXIF_VOICE_MODE_MASK_SFT (0xf << 12)645#define RG_MTKAIF_RXIF_DATA_BIT_SFT 8646#define RG_MTKAIF_RXIF_DATA_BIT_MASK 0x7647#define RG_MTKAIF_RXIF_DATA_BIT_MASK_SFT (0x7 << 8)648#define RG_MTKAIF_RXIF_FIFO_RSP_SFT 4649#define RG_MTKAIF_RXIF_FIFO_RSP_MASK 0x7650#define RG_MTKAIF_RXIF_FIFO_RSP_MASK_SFT (0x7 << 4)651#define RG_MTKAIF_RXIF_DETECT_ON_SFT 3652#define RG_MTKAIF_RXIF_DETECT_ON_MASK 0x1653#define RG_MTKAIF_RXIF_DETECT_ON_MASK_SFT (0x1 << 3)654#define RG_MTKAIF_RXIF_DATA_MODE_SFT 0655#define RG_MTKAIF_RXIF_DATA_MODE_MASK 0x1656#define RG_MTKAIF_RXIF_DATA_MODE_MASK_SFT (0x1 << 0)657 658/* MT6358_AFE_ADDA_MTKAIF_RX_CFG1 */659#define RG_MTKAIF_RXIF_SYNC_SEARCH_TABLE_SFT 12660#define RG_MTKAIF_RXIF_SYNC_SEARCH_TABLE_MASK 0xf661#define RG_MTKAIF_RXIF_SYNC_SEARCH_TABLE_MASK_SFT (0xf << 12)662#define RG_MTKAIF_RXIF_INVALID_SYNC_CHECK_ROUND_SFT 8663#define RG_MTKAIF_RXIF_INVALID_SYNC_CHECK_ROUND_MASK 0xf664#define RG_MTKAIF_RXIF_INVALID_SYNC_CHECK_ROUND_MASK_SFT (0xf << 8)665#define RG_MTKAIF_RXIF_SYNC_CHECK_ROUND_SFT 4666#define RG_MTKAIF_RXIF_SYNC_CHECK_ROUND_MASK 0xf667#define RG_MTKAIF_RXIF_SYNC_CHECK_ROUND_MASK_SFT (0xf << 4)668#define RG_MTKAIF_RXIF_VOICE_MODE_PROTOCOL2_SFT 0669#define RG_MTKAIF_RXIF_VOICE_MODE_PROTOCOL2_MASK 0xf670#define RG_MTKAIF_RXIF_VOICE_MODE_PROTOCOL2_MASK_SFT (0xf << 0)671 672/* MT6358_AFE_ADDA_MTKAIF_RX_CFG2 */673#define RG_MTKAIF_RXIF_CLEAR_SYNC_FAIL_SFT 12674#define RG_MTKAIF_RXIF_CLEAR_SYNC_FAIL_MASK 0x1675#define RG_MTKAIF_RXIF_CLEAR_SYNC_FAIL_MASK_SFT (0x1 << 12)676#define RG_MTKAIF_RXIF_SYNC_CNT_TABLE_SFT 0677#define RG_MTKAIF_RXIF_SYNC_CNT_TABLE_MASK 0xfff678#define RG_MTKAIF_RXIF_SYNC_CNT_TABLE_MASK_SFT (0xfff << 0)679 680/* MT6358_AFE_ADDA_MTKAIF_RX_CFG3 */681#define RG_MTKAIF_RXIF_LOOPBACK_USE_NLE_SFT 7682#define RG_MTKAIF_RXIF_LOOPBACK_USE_NLE_MASK 0x1683#define RG_MTKAIF_RXIF_LOOPBACK_USE_NLE_MASK_SFT (0x1 << 7)684#define RG_MTKAIF_RXIF_FIFO_RSP_PROTOCOL2_SFT 4685#define RG_MTKAIF_RXIF_FIFO_RSP_PROTOCOL2_MASK 0x7686#define RG_MTKAIF_RXIF_FIFO_RSP_PROTOCOL2_MASK_SFT (0x7 << 4)687#define RG_MTKAIF_RXIF_DETECT_ON_PROTOCOL2_SFT 3688#define RG_MTKAIF_RXIF_DETECT_ON_PROTOCOL2_MASK 0x1689#define RG_MTKAIF_RXIF_DETECT_ON_PROTOCOL2_MASK_SFT (0x1 << 3)690 691/* MT6358_AFE_ADDA_MTKAIF_TX_CFG1 */692#define RG_MTKAIF_SYNC_WORD2_SFT 4693#define RG_MTKAIF_SYNC_WORD2_MASK 0x7694#define RG_MTKAIF_SYNC_WORD2_MASK_SFT (0x7 << 4)695#define RG_MTKAIF_SYNC_WORD1_SFT 0696#define RG_MTKAIF_SYNC_WORD1_MASK 0x7697#define RG_MTKAIF_SYNC_WORD1_MASK_SFT (0x7 << 0)698 699/* MT6358_AFE_SGEN_CFG0 */700#define SGEN_AMP_DIV_CH1_CTL_SFT 12701#define SGEN_AMP_DIV_CH1_CTL_MASK 0xf702#define SGEN_AMP_DIV_CH1_CTL_MASK_SFT (0xf << 12)703#define SGEN_DAC_EN_CTL_SFT 7704#define SGEN_DAC_EN_CTL_MASK 0x1705#define SGEN_DAC_EN_CTL_MASK_SFT (0x1 << 7)706#define SGEN_MUTE_SW_CTL_SFT 6707#define SGEN_MUTE_SW_CTL_MASK 0x1708#define SGEN_MUTE_SW_CTL_MASK_SFT (0x1 << 6)709#define R_AUD_SDM_MUTE_L_SFT 5710#define R_AUD_SDM_MUTE_L_MASK 0x1711#define R_AUD_SDM_MUTE_L_MASK_SFT (0x1 << 5)712#define R_AUD_SDM_MUTE_R_SFT 4713#define R_AUD_SDM_MUTE_R_MASK 0x1714#define R_AUD_SDM_MUTE_R_MASK_SFT (0x1 << 4)715 716/* MT6358_AFE_SGEN_CFG1 */717#define C_SGEN_RCH_INV_5BIT_SFT 15718#define C_SGEN_RCH_INV_5BIT_MASK 0x1719#define C_SGEN_RCH_INV_5BIT_MASK_SFT (0x1 << 15)720#define C_SGEN_RCH_INV_8BIT_SFT 14721#define C_SGEN_RCH_INV_8BIT_MASK 0x1722#define C_SGEN_RCH_INV_8BIT_MASK_SFT (0x1 << 14)723#define SGEN_FREQ_DIV_CH1_CTL_SFT 0724#define SGEN_FREQ_DIV_CH1_CTL_MASK 0x1f725#define SGEN_FREQ_DIV_CH1_CTL_MASK_SFT (0x1f << 0)726 727/* MT6358_AFE_ADC_ASYNC_FIFO_CFG */728#define RG_UL_ASYNC_FIFO_SOFT_RST_EN_SFT 5729#define RG_UL_ASYNC_FIFO_SOFT_RST_EN_MASK 0x1730#define RG_UL_ASYNC_FIFO_SOFT_RST_EN_MASK_SFT (0x1 << 5)731#define RG_UL_ASYNC_FIFO_SOFT_RST_SFT 4732#define RG_UL_ASYNC_FIFO_SOFT_RST_MASK 0x1733#define RG_UL_ASYNC_FIFO_SOFT_RST_MASK_SFT (0x1 << 4)734#define RG_AMIC_UL_ADC_CLK_SEL_SFT 1735#define RG_AMIC_UL_ADC_CLK_SEL_MASK 0x1736#define RG_AMIC_UL_ADC_CLK_SEL_MASK_SFT (0x1 << 1)737 738/* MT6358_AFE_DCCLK_CFG0 */739#define DCCLK_DIV_SFT 5740#define DCCLK_DIV_MASK 0x7ff741#define DCCLK_DIV_MASK_SFT (0x7ff << 5)742#define DCCLK_INV_SFT 4743#define DCCLK_INV_MASK 0x1744#define DCCLK_INV_MASK_SFT (0x1 << 4)745#define DCCLK_PDN_SFT 1746#define DCCLK_PDN_MASK 0x1747#define DCCLK_PDN_MASK_SFT (0x1 << 1)748#define DCCLK_GEN_ON_SFT 0749#define DCCLK_GEN_ON_MASK 0x1750#define DCCLK_GEN_ON_MASK_SFT (0x1 << 0)751 752/* MT6358_AFE_DCCLK_CFG1 */753#define RESYNC_SRC_SEL_SFT 10754#define RESYNC_SRC_SEL_MASK 0x3755#define RESYNC_SRC_SEL_MASK_SFT (0x3 << 10)756#define RESYNC_SRC_CK_INV_SFT 9757#define RESYNC_SRC_CK_INV_MASK 0x1758#define RESYNC_SRC_CK_INV_MASK_SFT (0x1 << 9)759#define DCCLK_RESYNC_BYPASS_SFT 8760#define DCCLK_RESYNC_BYPASS_MASK 0x1761#define DCCLK_RESYNC_BYPASS_MASK_SFT (0x1 << 8)762#define DCCLK_PHASE_SEL_SFT 4763#define DCCLK_PHASE_SEL_MASK 0xf764#define DCCLK_PHASE_SEL_MASK_SFT (0xf << 4)765 766/* MT6358_AUDIO_DIG_CFG */767#define RG_AUD_PAD_TOP_DAT_MISO2_LOOPBACK_SFT 15768#define RG_AUD_PAD_TOP_DAT_MISO2_LOOPBACK_MASK 0x1769#define RG_AUD_PAD_TOP_DAT_MISO2_LOOPBACK_MASK_SFT (0x1 << 15)770#define RG_AUD_PAD_TOP_PHASE_MODE2_SFT 8771#define RG_AUD_PAD_TOP_PHASE_MODE2_MASK 0x7f772#define RG_AUD_PAD_TOP_PHASE_MODE2_MASK_SFT (0x7f << 8)773#define RG_AUD_PAD_TOP_DAT_MISO_LOOPBACK_SFT 7774#define RG_AUD_PAD_TOP_DAT_MISO_LOOPBACK_MASK 0x1775#define RG_AUD_PAD_TOP_DAT_MISO_LOOPBACK_MASK_SFT (0x1 << 7)776#define RG_AUD_PAD_TOP_PHASE_MODE_SFT 0777#define RG_AUD_PAD_TOP_PHASE_MODE_MASK 0x7f778#define RG_AUD_PAD_TOP_PHASE_MODE_MASK_SFT (0x7f << 0)779 780/* MT6358_AFE_AUD_PAD_TOP */781#define RG_AUD_PAD_TOP_TX_FIFO_RSP_SFT 12782#define RG_AUD_PAD_TOP_TX_FIFO_RSP_MASK 0x7783#define RG_AUD_PAD_TOP_TX_FIFO_RSP_MASK_SFT (0x7 << 12)784#define RG_AUD_PAD_TOP_MTKAIF_CLK_PROTOCOL2_SFT 11785#define RG_AUD_PAD_TOP_MTKAIF_CLK_PROTOCOL2_MASK 0x1786#define RG_AUD_PAD_TOP_MTKAIF_CLK_PROTOCOL2_MASK_SFT (0x1 << 11)787#define RG_AUD_PAD_TOP_TX_FIFO_ON_SFT 8788#define RG_AUD_PAD_TOP_TX_FIFO_ON_MASK 0x1789#define RG_AUD_PAD_TOP_TX_FIFO_ON_MASK_SFT (0x1 << 8)790 791/* MT6358_AFE_AUD_PAD_TOP_MON */792#define ADDA_AUD_PAD_TOP_MON_SFT 0793#define ADDA_AUD_PAD_TOP_MON_MASK 0xffff794#define ADDA_AUD_PAD_TOP_MON_MASK_SFT (0xffff << 0)795 796/* MT6358_AFE_AUD_PAD_TOP_MON1 */797#define ADDA_AUD_PAD_TOP_MON1_SFT 0798#define ADDA_AUD_PAD_TOP_MON1_MASK 0xffff799#define ADDA_AUD_PAD_TOP_MON1_MASK_SFT (0xffff << 0)800 801/* MT6358_AFE_DL_NLE_CFG */802#define NLE_RCH_HPGAIN_SEL_SFT 10803#define NLE_RCH_HPGAIN_SEL_MASK 0x1804#define NLE_RCH_HPGAIN_SEL_MASK_SFT (0x1 << 10)805#define NLE_RCH_CH_SEL_SFT 9806#define NLE_RCH_CH_SEL_MASK 0x1807#define NLE_RCH_CH_SEL_MASK_SFT (0x1 << 9)808#define NLE_RCH_ON_SFT 8809#define NLE_RCH_ON_MASK 0x1810#define NLE_RCH_ON_MASK_SFT (0x1 << 8)811#define NLE_LCH_HPGAIN_SEL_SFT 2812#define NLE_LCH_HPGAIN_SEL_MASK 0x1813#define NLE_LCH_HPGAIN_SEL_MASK_SFT (0x1 << 2)814#define NLE_LCH_CH_SEL_SFT 1815#define NLE_LCH_CH_SEL_MASK 0x1816#define NLE_LCH_CH_SEL_MASK_SFT (0x1 << 1)817#define NLE_LCH_ON_SFT 0818#define NLE_LCH_ON_MASK 0x1819#define NLE_LCH_ON_MASK_SFT (0x1 << 0)820 821/* MT6358_AFE_DL_NLE_MON */822#define NLE_MONITOR_SFT 0823#define NLE_MONITOR_MASK 0x3fff824#define NLE_MONITOR_MASK_SFT (0x3fff << 0)825 826/* MT6358_AFE_CG_EN_MON */827#define CK_CG_EN_MON_SFT 0828#define CK_CG_EN_MON_MASK 0x3f829#define CK_CG_EN_MON_MASK_SFT (0x3f << 0)830 831/* MT6358_AFE_VOW_TOP */832#define PDN_VOW_SFT 15833#define PDN_VOW_MASK 0x1834#define PDN_VOW_MASK_SFT (0x1 << 15)835#define VOW_1P6M_800K_SEL_SFT 14836#define VOW_1P6M_800K_SEL_MASK 0x1837#define VOW_1P6M_800K_SEL_MASK_SFT (0x1 << 14)838#define VOW_DIGMIC_ON_SFT 13839#define VOW_DIGMIC_ON_MASK 0x1840#define VOW_DIGMIC_ON_MASK_SFT (0x1 << 13)841#define VOW_CK_DIV_RST_SFT 12842#define VOW_CK_DIV_RST_MASK 0x1843#define VOW_CK_DIV_RST_MASK_SFT (0x1 << 12)844#define VOW_ON_SFT 11845#define VOW_ON_MASK 0x1846#define VOW_ON_MASK_SFT (0x1 << 11)847#define VOW_DIGMIC_CK_PHASE_SEL_SFT 8848#define VOW_DIGMIC_CK_PHASE_SEL_MASK 0x7849#define VOW_DIGMIC_CK_PHASE_SEL_MASK_SFT (0x7 << 8)850#define MAIN_DMIC_CK_VOW_SEL_SFT 7851#define MAIN_DMIC_CK_VOW_SEL_MASK 0x1852#define MAIN_DMIC_CK_VOW_SEL_MASK_SFT (0x1 << 7)853#define VOW_SDM_3_LEVEL_SFT 6854#define VOW_SDM_3_LEVEL_MASK 0x1855#define VOW_SDM_3_LEVEL_MASK_SFT (0x1 << 6)856#define VOW_LOOP_BACK_MODE_SFT 5857#define VOW_LOOP_BACK_MODE_MASK 0x1858#define VOW_LOOP_BACK_MODE_MASK_SFT (0x1 << 5)859#define VOW_INTR_SOURCE_SEL_SFT 4860#define VOW_INTR_SOURCE_SEL_MASK 0x1861#define VOW_INTR_SOURCE_SEL_MASK_SFT (0x1 << 4)862#define VOW_INTR_CLR_SFT 3863#define VOW_INTR_CLR_MASK 0x1864#define VOW_INTR_CLR_MASK_SFT (0x1 << 3)865#define S_N_VALUE_RST_SFT 2866#define S_N_VALUE_RST_MASK 0x1867#define S_N_VALUE_RST_MASK_SFT (0x1 << 2)868#define SAMPLE_BASE_MODE_SFT 1869#define SAMPLE_BASE_MODE_MASK 0x1870#define SAMPLE_BASE_MODE_MASK_SFT (0x1 << 1)871#define VOW_INTR_FLAG_SFT 0872#define VOW_INTR_FLAG_MASK 0x1873#define VOW_INTR_FLAG_MASK_SFT (0x1 << 0)874 875/* MT6358_AFE_VOW_CFG0 */876#define AMPREF_SFT 0877#define AMPREF_MASK 0xffff878#define AMPREF_MASK_SFT (0xffff << 0)879 880/* MT6358_AFE_VOW_CFG1 */881#define TIMERINI_SFT 0882#define TIMERINI_MASK 0xffff883#define TIMERINI_MASK_SFT (0xffff << 0)884 885/* MT6358_AFE_VOW_CFG2 */886#define B_DEFAULT_SFT 12887#define B_DEFAULT_MASK 0x7888#define B_DEFAULT_MASK_SFT (0x7 << 12)889#define A_DEFAULT_SFT 8890#define A_DEFAULT_MASK 0x7891#define A_DEFAULT_MASK_SFT (0x7 << 8)892#define B_INI_SFT 4893#define B_INI_MASK 0x7894#define B_INI_MASK_SFT (0x7 << 4)895#define A_INI_SFT 0896#define A_INI_MASK 0x7897#define A_INI_MASK_SFT (0x7 << 0)898 899/* MT6358_AFE_VOW_CFG3 */900#define K_BETA_RISE_SFT 12901#define K_BETA_RISE_MASK 0xf902#define K_BETA_RISE_MASK_SFT (0xf << 12)903#define K_BETA_FALL_SFT 8904#define K_BETA_FALL_MASK 0xf905#define K_BETA_FALL_MASK_SFT (0xf << 8)906#define K_ALPHA_RISE_SFT 4907#define K_ALPHA_RISE_MASK 0xf908#define K_ALPHA_RISE_MASK_SFT (0xf << 4)909#define K_ALPHA_FALL_SFT 0910#define K_ALPHA_FALL_MASK 0xf911#define K_ALPHA_FALL_MASK_SFT (0xf << 0)912 913/* MT6358_AFE_VOW_CFG4 */914#define VOW_TXIF_SCK_INV_SFT 15915#define VOW_TXIF_SCK_INV_MASK 0x1916#define VOW_TXIF_SCK_INV_MASK_SFT (0x1 << 15)917#define VOW_ADC_TESTCK_SRC_SEL_SFT 12918#define VOW_ADC_TESTCK_SRC_SEL_MASK 0x7919#define VOW_ADC_TESTCK_SRC_SEL_MASK_SFT (0x7 << 12)920#define VOW_ADC_TESTCK_SEL_SFT 11921#define VOW_ADC_TESTCK_SEL_MASK 0x1922#define VOW_ADC_TESTCK_SEL_MASK_SFT (0x1 << 11)923#define VOW_ADC_CLK_INV_SFT 10924#define VOW_ADC_CLK_INV_MASK 0x1925#define VOW_ADC_CLK_INV_MASK_SFT (0x1 << 10)926#define VOW_TXIF_MONO_SFT 9927#define VOW_TXIF_MONO_MASK 0x1928#define VOW_TXIF_MONO_MASK_SFT (0x1 << 9)929#define VOW_TXIF_SCK_DIV_SFT 4930#define VOW_TXIF_SCK_DIV_MASK 0x1f931#define VOW_TXIF_SCK_DIV_MASK_SFT (0x1f << 4)932#define K_GAMMA_SFT 0933#define K_GAMMA_MASK 0xf934#define K_GAMMA_MASK_SFT (0xf << 0)935 936/* MT6358_AFE_VOW_CFG5 */937#define N_MIN_SFT 0938#define N_MIN_MASK 0xffff939#define N_MIN_MASK_SFT (0xffff << 0)940 941/* MT6358_AFE_VOW_CFG6 */942#define RG_WINDOW_SIZE_SEL_SFT 12943#define RG_WINDOW_SIZE_SEL_MASK 0x1944#define RG_WINDOW_SIZE_SEL_MASK_SFT (0x1 << 12)945#define RG_FLR_BYPASS_SFT 11946#define RG_FLR_BYPASS_MASK 0x1947#define RG_FLR_BYPASS_MASK_SFT (0x1 << 11)948#define RG_FLR_RATIO_SFT 8949#define RG_FLR_RATIO_MASK 0x7950#define RG_FLR_RATIO_MASK_SFT (0x7 << 8)951#define RG_BUCK_DVFS_DONE_SW_CTL_SFT 7952#define RG_BUCK_DVFS_DONE_SW_CTL_MASK 0x1953#define RG_BUCK_DVFS_DONE_SW_CTL_MASK_SFT (0x1 << 7)954#define RG_BUCK_DVFS_DONE_HW_MODE_SFT 6955#define RG_BUCK_DVFS_DONE_HW_MODE_MASK 0x1956#define RG_BUCK_DVFS_DONE_HW_MODE_MASK_SFT (0x1 << 6)957#define RG_BUCK_DVFS_HW_CNT_THR_SFT 0958#define RG_BUCK_DVFS_HW_CNT_THR_MASK 0x3f959#define RG_BUCK_DVFS_HW_CNT_THR_MASK_SFT (0x3f << 0)960 961/* MT6358_AFE_VOW_MON0 */962#define VOW_DOWNCNT_SFT 0963#define VOW_DOWNCNT_MASK 0xffff964#define VOW_DOWNCNT_MASK_SFT (0xffff << 0)965 966/* MT6358_AFE_VOW_MON1 */967#define K_TMP_MON_SFT 10968#define K_TMP_MON_MASK 0xf969#define K_TMP_MON_MASK_SFT (0xf << 10)970#define SLT_COUNTER_MON_SFT 7971#define SLT_COUNTER_MON_MASK 0x7972#define SLT_COUNTER_MON_MASK_SFT (0x7 << 7)973#define VOW_B_SFT 4974#define VOW_B_MASK 0x7975#define VOW_B_MASK_SFT (0x7 << 4)976#define VOW_A_SFT 1977#define VOW_A_MASK 0x7978#define VOW_A_MASK_SFT (0x7 << 1)979#define SECOND_CNT_START_SFT 0980#define SECOND_CNT_START_MASK 0x1981#define SECOND_CNT_START_MASK_SFT (0x1 << 0)982 983/* MT6358_AFE_VOW_MON2 */984#define VOW_S_L_SFT 0985#define VOW_S_L_MASK 0xffff986#define VOW_S_L_MASK_SFT (0xffff << 0)987 988/* MT6358_AFE_VOW_MON3 */989#define VOW_S_H_SFT 0990#define VOW_S_H_MASK 0xffff991#define VOW_S_H_MASK_SFT (0xffff << 0)992 993/* MT6358_AFE_VOW_MON4 */994#define VOW_N_L_SFT 0995#define VOW_N_L_MASK 0xffff996#define VOW_N_L_MASK_SFT (0xffff << 0)997 998/* MT6358_AFE_VOW_MON5 */999#define VOW_N_H_SFT 01000#define VOW_N_H_MASK 0xffff1001#define VOW_N_H_MASK_SFT (0xffff << 0)1002 1003/* MT6358_AFE_VOW_SN_INI_CFG */1004#define VOW_SN_INI_CFG_EN_SFT 151005#define VOW_SN_INI_CFG_EN_MASK 0x11006#define VOW_SN_INI_CFG_EN_MASK_SFT (0x1 << 15)1007#define VOW_SN_INI_CFG_VAL_SFT 01008#define VOW_SN_INI_CFG_VAL_MASK 0x7fff1009#define VOW_SN_INI_CFG_VAL_MASK_SFT (0x7fff << 0)1010 1011/* MT6358_AFE_VOW_TGEN_CFG0 */1012#define VOW_TGEN_EN_SFT 151013#define VOW_TGEN_EN_MASK 0x11014#define VOW_TGEN_EN_MASK_SFT (0x1 << 15)1015#define VOW_TGEN_MUTE_SW_SFT 141016#define VOW_TGEN_MUTE_SW_MASK 0x11017#define VOW_TGEN_MUTE_SW_MASK_SFT (0x1 << 14)1018#define VOW_TGEN_FREQ_DIV_SFT 01019#define VOW_TGEN_FREQ_DIV_MASK 0x3fff1020#define VOW_TGEN_FREQ_DIV_MASK_SFT (0x3fff << 0)1021 1022/* MT6358_AFE_VOW_POSDIV_CFG0 */1023#define BUCK_DVFS_DONE_SFT 151024#define BUCK_DVFS_DONE_MASK 0x11025#define BUCK_DVFS_DONE_MASK_SFT (0x1 << 15)1026#define VOW_32K_MODE_SFT 131027#define VOW_32K_MODE_MASK 0x11028#define VOW_32K_MODE_MASK_SFT (0x1 << 13)1029#define RG_BUCK_CLK_DIV_SFT 81030#define RG_BUCK_CLK_DIV_MASK 0x1f1031#define RG_BUCK_CLK_DIV_MASK_SFT (0x1f << 8)1032#define RG_A1P6M_EN_SEL_SFT 71033#define RG_A1P6M_EN_SEL_MASK 0x11034#define RG_A1P6M_EN_SEL_MASK_SFT (0x1 << 7)1035#define VOW_CLK_SEL_SFT 61036#define VOW_CLK_SEL_MASK 0x11037#define VOW_CLK_SEL_MASK_SFT (0x1 << 6)1038#define VOW_INTR_SW_MODE_SFT 51039#define VOW_INTR_SW_MODE_MASK 0x11040#define VOW_INTR_SW_MODE_MASK_SFT (0x1 << 5)1041#define VOW_INTR_SW_VAL_SFT 41042#define VOW_INTR_SW_VAL_MASK 0x11043#define VOW_INTR_SW_VAL_MASK_SFT (0x1 << 4)1044#define VOW_CIC_MODE_SEL_SFT 21045#define VOW_CIC_MODE_SEL_MASK 0x31046#define VOW_CIC_MODE_SEL_MASK_SFT (0x3 << 2)1047#define RG_VOW_POSDIV_SFT 01048#define RG_VOW_POSDIV_MASK 0x31049#define RG_VOW_POSDIV_MASK_SFT (0x3 << 0)1050 1051/* MT6358_AFE_VOW_HPF_CFG0 */1052#define VOW_HPF_DC_TEST_SFT 121053#define VOW_HPF_DC_TEST_MASK 0xf1054#define VOW_HPF_DC_TEST_MASK_SFT (0xf << 12)1055#define VOW_IRQ_LATCH_SNR_EN_SFT 101056#define VOW_IRQ_LATCH_SNR_EN_MASK 0x11057#define VOW_IRQ_LATCH_SNR_EN_MASK_SFT (0x1 << 10)1058#define VOW_DMICCLK_PDN_SFT 91059#define VOW_DMICCLK_PDN_MASK 0x11060#define VOW_DMICCLK_PDN_MASK_SFT (0x1 << 9)1061#define VOW_POSDIVCLK_PDN_SFT 81062#define VOW_POSDIVCLK_PDN_MASK 0x11063#define VOW_POSDIVCLK_PDN_MASK_SFT (0x1 << 8)1064#define RG_BASELINE_ALPHA_ORDER_SFT 41065#define RG_BASELINE_ALPHA_ORDER_MASK 0xf1066#define RG_BASELINE_ALPHA_ORDER_MASK_SFT (0xf << 4)1067#define RG_MTKAIF_HPF_BYPASS_SFT 21068#define RG_MTKAIF_HPF_BYPASS_MASK 0x11069#define RG_MTKAIF_HPF_BYPASS_MASK_SFT (0x1 << 2)1070#define RG_SNRDET_HPF_BYPASS_SFT 11071#define RG_SNRDET_HPF_BYPASS_MASK 0x11072#define RG_SNRDET_HPF_BYPASS_MASK_SFT (0x1 << 1)1073#define RG_HPF_ON_SFT 01074#define RG_HPF_ON_MASK 0x11075#define RG_HPF_ON_MASK_SFT (0x1 << 0)1076 1077/* MT6358_AFE_VOW_PERIODIC_CFG0 */1078#define RG_PERIODIC_EN_SFT 151079#define RG_PERIODIC_EN_MASK 0x11080#define RG_PERIODIC_EN_MASK_SFT (0x1 << 15)1081#define RG_PERIODIC_CNT_CLR_SFT 141082#define RG_PERIODIC_CNT_CLR_MASK 0x11083#define RG_PERIODIC_CNT_CLR_MASK_SFT (0x1 << 14)1084#define RG_PERIODIC_CNT_PERIOD_SFT 01085#define RG_PERIODIC_CNT_PERIOD_MASK 0x3fff1086#define RG_PERIODIC_CNT_PERIOD_MASK_SFT (0x3fff << 0)1087 1088/* MT6358_AFE_VOW_PERIODIC_CFG1 */1089#define RG_PERIODIC_CNT_SET_SFT 151090#define RG_PERIODIC_CNT_SET_MASK 0x11091#define RG_PERIODIC_CNT_SET_MASK_SFT (0x1 << 15)1092#define RG_PERIODIC_CNT_PAUSE_SFT 141093#define RG_PERIODIC_CNT_PAUSE_MASK 0x11094#define RG_PERIODIC_CNT_PAUSE_MASK_SFT (0x1 << 14)1095#define RG_PERIODIC_CNT_SET_VALUE_SFT 01096#define RG_PERIODIC_CNT_SET_VALUE_MASK 0x3fff1097#define RG_PERIODIC_CNT_SET_VALUE_MASK_SFT (0x3fff << 0)1098 1099/* MT6358_AFE_VOW_PERIODIC_CFG2 */1100#define AUDPREAMPLON_PERIODIC_MODE_SFT 151101#define AUDPREAMPLON_PERIODIC_MODE_MASK 0x11102#define AUDPREAMPLON_PERIODIC_MODE_MASK_SFT (0x1 << 15)1103#define AUDPREAMPLON_PERIODIC_INVERSE_SFT 141104#define AUDPREAMPLON_PERIODIC_INVERSE_MASK 0x11105#define AUDPREAMPLON_PERIODIC_INVERSE_MASK_SFT (0x1 << 14)1106#define AUDPREAMPLON_PERIODIC_ON_CYCLE_SFT 01107#define AUDPREAMPLON_PERIODIC_ON_CYCLE_MASK 0x3fff1108#define AUDPREAMPLON_PERIODIC_ON_CYCLE_MASK_SFT (0x3fff << 0)1109 1110/* MT6358_AFE_VOW_PERIODIC_CFG3 */1111#define AUDPREAMPLDCPRECHARGE_PERIODIC_MODE_SFT 151112#define AUDPREAMPLDCPRECHARGE_PERIODIC_MODE_MASK 0x11113#define AUDPREAMPLDCPRECHARGE_PERIODIC_MODE_MASK_SFT (0x1 << 15)1114#define AUDPREAMPLDCPRECHARGE_PERIODIC_INVERSE_SFT 141115#define AUDPREAMPLDCPRECHARGE_PERIODIC_INVERSE_MASK 0x11116#define AUDPREAMPLDCPRECHARGE_PERIODIC_INVERSE_MASK_SFT (0x1 << 14)1117#define AUDPREAMPLDCPRECHARGE_PERIODIC_ON_CYCLE_SFT 01118#define AUDPREAMPLDCPRECHARGE_PERIODIC_ON_CYCLE_MASK 0x3fff1119#define AUDPREAMPLDCPRECHARGE_PERIODIC_ON_CYCLE_MASK_SFT (0x3fff << 0)1120 1121/* MT6358_AFE_VOW_PERIODIC_CFG4 */1122#define AUDADCLPWRUP_PERIODIC_MODE_SFT 151123#define AUDADCLPWRUP_PERIODIC_MODE_MASK 0x11124#define AUDADCLPWRUP_PERIODIC_MODE_MASK_SFT (0x1 << 15)1125#define AUDADCLPWRUP_PERIODIC_INVERSE_SFT 141126#define AUDADCLPWRUP_PERIODIC_INVERSE_MASK 0x11127#define AUDADCLPWRUP_PERIODIC_INVERSE_MASK_SFT (0x1 << 14)1128#define AUDADCLPWRUP_PERIODIC_ON_CYCLE_SFT 01129#define AUDADCLPWRUP_PERIODIC_ON_CYCLE_MASK 0x3fff1130#define AUDADCLPWRUP_PERIODIC_ON_CYCLE_MASK_SFT (0x3fff << 0)1131 1132/* MT6358_AFE_VOW_PERIODIC_CFG5 */1133#define AUDGLBVOWLPWEN_PERIODIC_MODE_SFT 151134#define AUDGLBVOWLPWEN_PERIODIC_MODE_MASK 0x11135#define AUDGLBVOWLPWEN_PERIODIC_MODE_MASK_SFT (0x1 << 15)1136#define AUDGLBVOWLPWEN_PERIODIC_INVERSE_SFT 141137#define AUDGLBVOWLPWEN_PERIODIC_INVERSE_MASK 0x11138#define AUDGLBVOWLPWEN_PERIODIC_INVERSE_MASK_SFT (0x1 << 14)1139#define AUDGLBVOWLPWEN_PERIODIC_ON_CYCLE_SFT 01140#define AUDGLBVOWLPWEN_PERIODIC_ON_CYCLE_MASK 0x3fff1141#define AUDGLBVOWLPWEN_PERIODIC_ON_CYCLE_MASK_SFT (0x3fff << 0)1142 1143/* MT6358_AFE_VOW_PERIODIC_CFG6 */1144#define AUDDIGMICEN_PERIODIC_MODE_SFT 151145#define AUDDIGMICEN_PERIODIC_MODE_MASK 0x11146#define AUDDIGMICEN_PERIODIC_MODE_MASK_SFT (0x1 << 15)1147#define AUDDIGMICEN_PERIODIC_INVERSE_SFT 141148#define AUDDIGMICEN_PERIODIC_INVERSE_MASK 0x11149#define AUDDIGMICEN_PERIODIC_INVERSE_MASK_SFT (0x1 << 14)1150#define AUDDIGMICEN_PERIODIC_ON_CYCLE_SFT 01151#define AUDDIGMICEN_PERIODIC_ON_CYCLE_MASK 0x3fff1152#define AUDDIGMICEN_PERIODIC_ON_CYCLE_MASK_SFT (0x3fff << 0)1153 1154/* MT6358_AFE_VOW_PERIODIC_CFG7 */1155#define AUDPWDBMICBIAS0_PERIODIC_MODE_SFT 151156#define AUDPWDBMICBIAS0_PERIODIC_MODE_MASK 0x11157#define AUDPWDBMICBIAS0_PERIODIC_MODE_MASK_SFT (0x1 << 15)1158#define AUDPWDBMICBIAS0_PERIODIC_INVERSE_SFT 141159#define AUDPWDBMICBIAS0_PERIODIC_INVERSE_MASK 0x11160#define AUDPWDBMICBIAS0_PERIODIC_INVERSE_MASK_SFT (0x1 << 14)1161#define AUDPWDBMICBIAS0_PERIODIC_ON_CYCLE_SFT 01162#define AUDPWDBMICBIAS0_PERIODIC_ON_CYCLE_MASK 0x3fff1163#define AUDPWDBMICBIAS0_PERIODIC_ON_CYCLE_MASK_SFT (0x3fff << 0)1164 1165/* MT6358_AFE_VOW_PERIODIC_CFG8 */1166#define AUDPWDBMICBIAS1_PERIODIC_MODE_SFT 151167#define AUDPWDBMICBIAS1_PERIODIC_MODE_MASK 0x11168#define AUDPWDBMICBIAS1_PERIODIC_MODE_MASK_SFT (0x1 << 15)1169#define AUDPWDBMICBIAS1_PERIODIC_INVERSE_SFT 141170#define AUDPWDBMICBIAS1_PERIODIC_INVERSE_MASK 0x11171#define AUDPWDBMICBIAS1_PERIODIC_INVERSE_MASK_SFT (0x1 << 14)1172#define AUDPWDBMICBIAS1_PERIODIC_ON_CYCLE_SFT 01173#define AUDPWDBMICBIAS1_PERIODIC_ON_CYCLE_MASK 0x3fff1174#define AUDPWDBMICBIAS1_PERIODIC_ON_CYCLE_MASK_SFT (0x3fff << 0)1175 1176/* MT6358_AFE_VOW_PERIODIC_CFG9 */1177#define XO_VOW_CK_EN_PERIODIC_MODE_SFT 151178#define XO_VOW_CK_EN_PERIODIC_MODE_MASK 0x11179#define XO_VOW_CK_EN_PERIODIC_MODE_MASK_SFT (0x1 << 15)1180#define XO_VOW_CK_EN_PERIODIC_INVERSE_SFT 141181#define XO_VOW_CK_EN_PERIODIC_INVERSE_MASK 0x11182#define XO_VOW_CK_EN_PERIODIC_INVERSE_MASK_SFT (0x1 << 14)1183#define XO_VOW_CK_EN_PERIODIC_ON_CYCLE_SFT 01184#define XO_VOW_CK_EN_PERIODIC_ON_CYCLE_MASK 0x3fff1185#define XO_VOW_CK_EN_PERIODIC_ON_CYCLE_MASK_SFT (0x3fff << 0)1186 1187/* MT6358_AFE_VOW_PERIODIC_CFG10 */1188#define AUDGLB_PWRDN_PERIODIC_MODE_SFT 151189#define AUDGLB_PWRDN_PERIODIC_MODE_MASK 0x11190#define AUDGLB_PWRDN_PERIODIC_MODE_MASK_SFT (0x1 << 15)1191#define AUDGLB_PWRDN_PERIODIC_INVERSE_SFT 141192#define AUDGLB_PWRDN_PERIODIC_INVERSE_MASK 0x11193#define AUDGLB_PWRDN_PERIODIC_INVERSE_MASK_SFT (0x1 << 14)1194#define AUDGLB_PWRDN_PERIODIC_ON_CYCLE_SFT 01195#define AUDGLB_PWRDN_PERIODIC_ON_CYCLE_MASK 0x3fff1196#define AUDGLB_PWRDN_PERIODIC_ON_CYCLE_MASK_SFT (0x3fff << 0)1197 1198/* MT6358_AFE_VOW_PERIODIC_CFG11 */1199#define VOW_ON_PERIODIC_MODE_SFT 151200#define VOW_ON_PERIODIC_MODE_MASK 0x11201#define VOW_ON_PERIODIC_MODE_MASK_SFT (0x1 << 15)1202#define VOW_ON_PERIODIC_INVERSE_SFT 141203#define VOW_ON_PERIODIC_INVERSE_MASK 0x11204#define VOW_ON_PERIODIC_INVERSE_MASK_SFT (0x1 << 14)1205#define VOW_ON_PERIODIC_ON_CYCLE_SFT 01206#define VOW_ON_PERIODIC_ON_CYCLE_MASK 0x3fff1207#define VOW_ON_PERIODIC_ON_CYCLE_MASK_SFT (0x3fff << 0)1208 1209/* MT6358_AFE_VOW_PERIODIC_CFG12 */1210#define DMIC_ON_PERIODIC_MODE_SFT 151211#define DMIC_ON_PERIODIC_MODE_MASK 0x11212#define DMIC_ON_PERIODIC_MODE_MASK_SFT (0x1 << 15)1213#define DMIC_ON_PERIODIC_INVERSE_SFT 141214#define DMIC_ON_PERIODIC_INVERSE_MASK 0x11215#define DMIC_ON_PERIODIC_INVERSE_MASK_SFT (0x1 << 14)1216#define DMIC_ON_PERIODIC_ON_CYCLE_SFT 01217#define DMIC_ON_PERIODIC_ON_CYCLE_MASK 0x3fff1218#define DMIC_ON_PERIODIC_ON_CYCLE_MASK_SFT (0x3fff << 0)1219 1220/* MT6358_AFE_VOW_PERIODIC_CFG13 */1221#define PDN_VOW_F32K_CK_SFT 151222#define PDN_VOW_F32K_CK_MASK 0x11223#define PDN_VOW_F32K_CK_MASK_SFT (0x1 << 15)1224#define AUDPREAMPLON_PERIODIC_OFF_CYCLE_SFT 01225#define AUDPREAMPLON_PERIODIC_OFF_CYCLE_MASK 0x3fff1226#define AUDPREAMPLON_PERIODIC_OFF_CYCLE_MASK_SFT (0x3fff << 0)1227 1228/* MT6358_AFE_VOW_PERIODIC_CFG14 */1229#define VOW_SNRDET_PERIODIC_CFG_SFT 151230#define VOW_SNRDET_PERIODIC_CFG_MASK 0x11231#define VOW_SNRDET_PERIODIC_CFG_MASK_SFT (0x1 << 15)1232#define AUDPREAMPLDCPRECHARGE_PERIODIC_OFF_CYCLE_SFT 01233#define AUDPREAMPLDCPRECHARGE_PERIODIC_OFF_CYCLE_MASK 0x3fff1234#define AUDPREAMPLDCPRECHARGE_PERIODIC_OFF_CYCLE_MASK_SFT (0x3fff << 0)1235 1236/* MT6358_AFE_VOW_PERIODIC_CFG15 */1237#define AUDADCLPWRUP_PERIODIC_OFF_CYCLE_SFT 01238#define AUDADCLPWRUP_PERIODIC_OFF_CYCLE_MASK 0x3fff1239#define AUDADCLPWRUP_PERIODIC_OFF_CYCLE_MASK_SFT (0x3fff << 0)1240 1241/* MT6358_AFE_VOW_PERIODIC_CFG16 */1242#define AUDGLBVOWLPWEN_PERIODIC_OFF_CYCLE_SFT 01243#define AUDGLBVOWLPWEN_PERIODIC_OFF_CYCLE_MASK 0x3fff1244#define AUDGLBVOWLPWEN_PERIODIC_OFF_CYCLE_MASK_SFT (0x3fff << 0)1245 1246/* MT6358_AFE_VOW_PERIODIC_CFG17 */1247#define AUDDIGMICEN_PERIODIC_OFF_CYCLE_SFT 01248#define AUDDIGMICEN_PERIODIC_OFF_CYCLE_MASK 0x3fff1249#define AUDDIGMICEN_PERIODIC_OFF_CYCLE_MASK_SFT (0x3fff << 0)1250 1251/* MT6358_AFE_VOW_PERIODIC_CFG18 */1252#define AUDPWDBMICBIAS0_PERIODIC_OFF_CYCLE_SFT 01253#define AUDPWDBMICBIAS0_PERIODIC_OFF_CYCLE_MASK 0x3fff1254#define AUDPWDBMICBIAS0_PERIODIC_OFF_CYCLE_MASK_SFT (0x3fff << 0)1255 1256/* MT6358_AFE_VOW_PERIODIC_CFG19 */1257#define AUDPWDBMICBIAS1_PERIODIC_OFF_CYCLE_SFT 01258#define AUDPWDBMICBIAS1_PERIODIC_OFF_CYCLE_MASK 0x3fff1259#define AUDPWDBMICBIAS1_PERIODIC_OFF_CYCLE_MASK_SFT (0x3fff << 0)1260 1261/* MT6358_AFE_VOW_PERIODIC_CFG20 */1262#define CLKSQ_EN_VOW_PERIODIC_MODE_SFT 151263#define CLKSQ_EN_VOW_PERIODIC_MODE_MASK 0x11264#define CLKSQ_EN_VOW_PERIODIC_MODE_MASK_SFT (0x1 << 15)1265#define XO_VOW_CK_EN_PERIODIC_OFF_CYCLE_SFT 01266#define XO_VOW_CK_EN_PERIODIC_OFF_CYCLE_MASK 0x3fff1267#define XO_VOW_CK_EN_PERIODIC_OFF_CYCLE_MASK_SFT (0x3fff << 0)1268 1269/* MT6358_AFE_VOW_PERIODIC_CFG21 */1270#define AUDGLB_PWRDN_PERIODIC_OFF_CYCLE_SFT 01271#define AUDGLB_PWRDN_PERIODIC_OFF_CYCLE_MASK 0x3fff1272#define AUDGLB_PWRDN_PERIODIC_OFF_CYCLE_MASK_SFT (0x3fff << 0)1273 1274/* MT6358_AFE_VOW_PERIODIC_CFG22 */1275#define VOW_ON_PERIODIC_OFF_CYCLE_SFT 01276#define VOW_ON_PERIODIC_OFF_CYCLE_MASK 0x3fff1277#define VOW_ON_PERIODIC_OFF_CYCLE_MASK_SFT (0x3fff << 0)1278 1279/* MT6358_AFE_VOW_PERIODIC_CFG23 */1280#define DMIC_ON_PERIODIC_OFF_CYCLE_SFT 01281#define DMIC_ON_PERIODIC_OFF_CYCLE_MASK 0x3fff1282#define DMIC_ON_PERIODIC_OFF_CYCLE_MASK_SFT (0x3fff << 0)1283 1284/* MT6358_AFE_VOW_PERIODIC_MON0 */1285#define VOW_PERIODIC_MON_SFT 01286#define VOW_PERIODIC_MON_MASK 0xffff1287#define VOW_PERIODIC_MON_MASK_SFT (0xffff << 0)1288 1289/* MT6358_AFE_VOW_PERIODIC_MON1 */1290#define VOW_PERIODIC_COUNT_MON_SFT 01291#define VOW_PERIODIC_COUNT_MON_MASK 0xffff1292#define VOW_PERIODIC_COUNT_MON_MASK_SFT (0xffff << 0)1293 1294/* MT6358_AUDENC_DSN_ID */1295#define AUDENC_ANA_ID_SFT 01296#define AUDENC_ANA_ID_MASK 0xff1297#define AUDENC_ANA_ID_MASK_SFT (0xff << 0)1298#define AUDENC_DIG_ID_SFT 81299#define AUDENC_DIG_ID_MASK 0xff1300#define AUDENC_DIG_ID_MASK_SFT (0xff << 8)1301 1302/* MT6358_AUDENC_DSN_REV0 */1303#define AUDENC_ANA_MINOR_REV_SFT 01304#define AUDENC_ANA_MINOR_REV_MASK 0xf1305#define AUDENC_ANA_MINOR_REV_MASK_SFT (0xf << 0)1306#define AUDENC_ANA_MAJOR_REV_SFT 41307#define AUDENC_ANA_MAJOR_REV_MASK 0xf1308#define AUDENC_ANA_MAJOR_REV_MASK_SFT (0xf << 4)1309#define AUDENC_DIG_MINOR_REV_SFT 81310#define AUDENC_DIG_MINOR_REV_MASK 0xf1311#define AUDENC_DIG_MINOR_REV_MASK_SFT (0xf << 8)1312#define AUDENC_DIG_MAJOR_REV_SFT 121313#define AUDENC_DIG_MAJOR_REV_MASK 0xf1314#define AUDENC_DIG_MAJOR_REV_MASK_SFT (0xf << 12)1315 1316/* MT6358_AUDENC_DSN_DBI */1317#define AUDENC_DSN_CBS_SFT 01318#define AUDENC_DSN_CBS_MASK 0x31319#define AUDENC_DSN_CBS_MASK_SFT (0x3 << 0)1320#define AUDENC_DSN_BIX_SFT 21321#define AUDENC_DSN_BIX_MASK 0x31322#define AUDENC_DSN_BIX_MASK_SFT (0x3 << 2)1323#define AUDENC_DSN_ESP_SFT 81324#define AUDENC_DSN_ESP_MASK 0xff1325#define AUDENC_DSN_ESP_MASK_SFT (0xff << 8)1326 1327/* MT6358_AUDENC_DSN_FPI */1328#define AUDENC_DSN_FPI_SFT 01329#define AUDENC_DSN_FPI_MASK 0xff1330#define AUDENC_DSN_FPI_MASK_SFT (0xff << 0)1331 1332/* MT6358_AUDENC_ANA_CON0 */1333#define RG_AUDPREAMPLON_SFT 01334#define RG_AUDPREAMPLON_MASK 0x11335#define RG_AUDPREAMPLON_MASK_SFT (0x1 << 0)1336#define RG_AUDPREAMPLDCCEN_SFT 11337#define RG_AUDPREAMPLDCCEN_MASK 0x11338#define RG_AUDPREAMPLDCCEN_MASK_SFT (0x1 << 1)1339#define RG_AUDPREAMPLDCPRECHARGE_SFT 21340#define RG_AUDPREAMPLDCPRECHARGE_MASK 0x11341#define RG_AUDPREAMPLDCPRECHARGE_MASK_SFT (0x1 << 2)1342#define RG_AUDPREAMPLPGATEST_SFT 31343#define RG_AUDPREAMPLPGATEST_MASK 0x11344#define RG_AUDPREAMPLPGATEST_MASK_SFT (0x1 << 3)1345#define RG_AUDPREAMPLVSCALE_SFT 41346#define RG_AUDPREAMPLVSCALE_MASK 0x31347#define RG_AUDPREAMPLVSCALE_MASK_SFT (0x3 << 4)1348#define RG_AUDPREAMPLINPUTSEL_SFT 61349#define RG_AUDPREAMPLINPUTSEL_MASK 0x31350#define RG_AUDPREAMPLINPUTSEL_MASK_SFT (0x3 << 6)1351#define RG_AUDPREAMPLGAIN_SFT 81352#define RG_AUDPREAMPLGAIN_MASK 0x71353#define RG_AUDPREAMPLGAIN_MASK_SFT (0x7 << 8)1354#define RG_AUDADCLPWRUP_SFT 121355#define RG_AUDADCLPWRUP_MASK 0x11356#define RG_AUDADCLPWRUP_MASK_SFT (0x1 << 12)1357#define RG_AUDADCLINPUTSEL_SFT 131358#define RG_AUDADCLINPUTSEL_MASK 0x31359#define RG_AUDADCLINPUTSEL_MASK_SFT (0x3 << 13)1360 1361/* MT6358_AUDENC_ANA_CON1 */1362#define RG_AUDPREAMPRON_SFT 01363#define RG_AUDPREAMPRON_MASK 0x11364#define RG_AUDPREAMPRON_MASK_SFT (0x1 << 0)1365#define RG_AUDPREAMPRDCCEN_SFT 11366#define RG_AUDPREAMPRDCCEN_MASK 0x11367#define RG_AUDPREAMPRDCCEN_MASK_SFT (0x1 << 1)1368#define RG_AUDPREAMPRDCPRECHARGE_SFT 21369#define RG_AUDPREAMPRDCPRECHARGE_MASK 0x11370#define RG_AUDPREAMPRDCPRECHARGE_MASK_SFT (0x1 << 2)1371#define RG_AUDPREAMPRPGATEST_SFT 31372#define RG_AUDPREAMPRPGATEST_MASK 0x11373#define RG_AUDPREAMPRPGATEST_MASK_SFT (0x1 << 3)1374#define RG_AUDPREAMPRVSCALE_SFT 41375#define RG_AUDPREAMPRVSCALE_MASK 0x31376#define RG_AUDPREAMPRVSCALE_MASK_SFT (0x3 << 4)1377#define RG_AUDPREAMPRINPUTSEL_SFT 61378#define RG_AUDPREAMPRINPUTSEL_MASK 0x31379#define RG_AUDPREAMPRINPUTSEL_MASK_SFT (0x3 << 6)1380#define RG_AUDPREAMPRGAIN_SFT 81381#define RG_AUDPREAMPRGAIN_MASK 0x71382#define RG_AUDPREAMPRGAIN_MASK_SFT (0x7 << 8)1383#define RG_AUDIO_VOW_EN_SFT 111384#define RG_AUDIO_VOW_EN_MASK 0x11385#define RG_AUDIO_VOW_EN_MASK_SFT (0x1 << 11)1386#define RG_AUDADCRPWRUP_SFT 121387#define RG_AUDADCRPWRUP_MASK 0x11388#define RG_AUDADCRPWRUP_MASK_SFT (0x1 << 12)1389#define RG_AUDADCRINPUTSEL_SFT 131390#define RG_AUDADCRINPUTSEL_MASK 0x31391#define RG_AUDADCRINPUTSEL_MASK_SFT (0x3 << 13)1392#define RG_CLKSQ_EN_VOW_SFT 151393#define RG_CLKSQ_EN_VOW_MASK 0x11394#define RG_CLKSQ_EN_VOW_MASK_SFT (0x1 << 15)1395 1396/* MT6358_AUDENC_ANA_CON2 */1397#define RG_AUDULHALFBIAS_SFT 01398#define RG_AUDULHALFBIAS_MASK 0x11399#define RG_AUDULHALFBIAS_MASK_SFT (0x1 << 0)1400#define RG_AUDGLBVOWLPWEN_SFT 11401#define RG_AUDGLBVOWLPWEN_MASK 0x11402#define RG_AUDGLBVOWLPWEN_MASK_SFT (0x1 << 1)1403#define RG_AUDPREAMPLPEN_SFT 21404#define RG_AUDPREAMPLPEN_MASK 0x11405#define RG_AUDPREAMPLPEN_MASK_SFT (0x1 << 2)1406#define RG_AUDADC1STSTAGELPEN_SFT 31407#define RG_AUDADC1STSTAGELPEN_MASK 0x11408#define RG_AUDADC1STSTAGELPEN_MASK_SFT (0x1 << 3)1409#define RG_AUDADC2NDSTAGELPEN_SFT 41410#define RG_AUDADC2NDSTAGELPEN_MASK 0x11411#define RG_AUDADC2NDSTAGELPEN_MASK_SFT (0x1 << 4)1412#define RG_AUDADCFLASHLPEN_SFT 51413#define RG_AUDADCFLASHLPEN_MASK 0x11414#define RG_AUDADCFLASHLPEN_MASK_SFT (0x1 << 5)1415#define RG_AUDPREAMPIDDTEST_SFT 61416#define RG_AUDPREAMPIDDTEST_MASK 0x31417#define RG_AUDPREAMPIDDTEST_MASK_SFT (0x3 << 6)1418#define RG_AUDADC1STSTAGEIDDTEST_SFT 81419#define RG_AUDADC1STSTAGEIDDTEST_MASK 0x31420#define RG_AUDADC1STSTAGEIDDTEST_MASK_SFT (0x3 << 8)1421#define RG_AUDADC2NDSTAGEIDDTEST_SFT 101422#define RG_AUDADC2NDSTAGEIDDTEST_MASK 0x31423#define RG_AUDADC2NDSTAGEIDDTEST_MASK_SFT (0x3 << 10)1424#define RG_AUDADCREFBUFIDDTEST_SFT 121425#define RG_AUDADCREFBUFIDDTEST_MASK 0x31426#define RG_AUDADCREFBUFIDDTEST_MASK_SFT (0x3 << 12)1427#define RG_AUDADCFLASHIDDTEST_SFT 141428#define RG_AUDADCFLASHIDDTEST_MASK 0x31429#define RG_AUDADCFLASHIDDTEST_MASK_SFT (0x3 << 14)1430 1431/* MT6358_AUDENC_ANA_CON3 */1432#define RG_AUDADCDAC0P25FS_SFT 01433#define RG_AUDADCDAC0P25FS_MASK 0x11434#define RG_AUDADCDAC0P25FS_MASK_SFT (0x1 << 0)1435#define RG_AUDADCCLKSEL_SFT 11436#define RG_AUDADCCLKSEL_MASK 0x11437#define RG_AUDADCCLKSEL_MASK_SFT (0x1 << 1)1438#define RG_AUDADCCLKSOURCE_SFT 21439#define RG_AUDADCCLKSOURCE_MASK 0x31440#define RG_AUDADCCLKSOURCE_MASK_SFT (0x3 << 2)1441#define RG_AUDPREAMPAAFEN_SFT 81442#define RG_AUDPREAMPAAFEN_MASK 0x11443#define RG_AUDPREAMPAAFEN_MASK_SFT (0x1 << 8)1444#define RG_DCCVCMBUFLPMODSEL_SFT 91445#define RG_DCCVCMBUFLPMODSEL_MASK 0x11446#define RG_DCCVCMBUFLPMODSEL_MASK_SFT (0x1 << 9)1447#define RG_DCCVCMBUFLPSWEN_SFT 101448#define RG_DCCVCMBUFLPSWEN_MASK 0x11449#define RG_DCCVCMBUFLPSWEN_MASK_SFT (0x1 << 10)1450#define RG_CMSTBENH_SFT 111451#define RG_CMSTBENH_MASK 0x11452#define RG_CMSTBENH_MASK_SFT (0x1 << 11)1453#define RG_PGABODYSW_SFT 121454#define RG_PGABODYSW_MASK 0x11455#define RG_PGABODYSW_MASK_SFT (0x1 << 12)1456 1457/* MT6358_AUDENC_ANA_CON4 */1458#define RG_AUDADC1STSTAGESDENB_SFT 01459#define RG_AUDADC1STSTAGESDENB_MASK 0x11460#define RG_AUDADC1STSTAGESDENB_MASK_SFT (0x1 << 0)1461#define RG_AUDADC2NDSTAGERESET_SFT 11462#define RG_AUDADC2NDSTAGERESET_MASK 0x11463#define RG_AUDADC2NDSTAGERESET_MASK_SFT (0x1 << 1)1464#define RG_AUDADC3RDSTAGERESET_SFT 21465#define RG_AUDADC3RDSTAGERESET_MASK 0x11466#define RG_AUDADC3RDSTAGERESET_MASK_SFT (0x1 << 2)1467#define RG_AUDADCFSRESET_SFT 31468#define RG_AUDADCFSRESET_MASK 0x11469#define RG_AUDADCFSRESET_MASK_SFT (0x1 << 3)1470#define RG_AUDADCWIDECM_SFT 41471#define RG_AUDADCWIDECM_MASK 0x11472#define RG_AUDADCWIDECM_MASK_SFT (0x1 << 4)1473#define RG_AUDADCNOPATEST_SFT 51474#define RG_AUDADCNOPATEST_MASK 0x11475#define RG_AUDADCNOPATEST_MASK_SFT (0x1 << 5)1476#define RG_AUDADCBYPASS_SFT 61477#define RG_AUDADCBYPASS_MASK 0x11478#define RG_AUDADCBYPASS_MASK_SFT (0x1 << 6)1479#define RG_AUDADCFFBYPASS_SFT 71480#define RG_AUDADCFFBYPASS_MASK 0x11481#define RG_AUDADCFFBYPASS_MASK_SFT (0x1 << 7)1482#define RG_AUDADCDACFBCURRENT_SFT 81483#define RG_AUDADCDACFBCURRENT_MASK 0x11484#define RG_AUDADCDACFBCURRENT_MASK_SFT (0x1 << 8)1485#define RG_AUDADCDACIDDTEST_SFT 91486#define RG_AUDADCDACIDDTEST_MASK 0x31487#define RG_AUDADCDACIDDTEST_MASK_SFT (0x3 << 9)1488#define RG_AUDADCDACNRZ_SFT 111489#define RG_AUDADCDACNRZ_MASK 0x11490#define RG_AUDADCDACNRZ_MASK_SFT (0x1 << 11)1491#define RG_AUDADCNODEM_SFT 121492#define RG_AUDADCNODEM_MASK 0x11493#define RG_AUDADCNODEM_MASK_SFT (0x1 << 12)1494#define RG_AUDADCDACTEST_SFT 131495#define RG_AUDADCDACTEST_MASK 0x11496#define RG_AUDADCDACTEST_MASK_SFT (0x1 << 13)1497 1498/* MT6358_AUDENC_ANA_CON5 */1499#define RG_AUDRCTUNEL_SFT 01500#define RG_AUDRCTUNEL_MASK 0x1f1501#define RG_AUDRCTUNEL_MASK_SFT (0x1f << 0)1502#define RG_AUDRCTUNELSEL_SFT 51503#define RG_AUDRCTUNELSEL_MASK 0x11504#define RG_AUDRCTUNELSEL_MASK_SFT (0x1 << 5)1505#define RG_AUDRCTUNER_SFT 81506#define RG_AUDRCTUNER_MASK 0x1f1507#define RG_AUDRCTUNER_MASK_SFT (0x1f << 8)1508#define RG_AUDRCTUNERSEL_SFT 131509#define RG_AUDRCTUNERSEL_MASK 0x11510#define RG_AUDRCTUNERSEL_MASK_SFT (0x1 << 13)1511 1512/* MT6358_AUDENC_ANA_CON6 */1513#define RG_CLKSQ_EN_SFT 01514#define RG_CLKSQ_EN_MASK 0x11515#define RG_CLKSQ_EN_MASK_SFT (0x1 << 0)1516#define RG_CLKSQ_IN_SEL_TEST_SFT 11517#define RG_CLKSQ_IN_SEL_TEST_MASK 0x11518#define RG_CLKSQ_IN_SEL_TEST_MASK_SFT (0x1 << 1)1519#define RG_CM_REFGENSEL_SFT 21520#define RG_CM_REFGENSEL_MASK 0x11521#define RG_CM_REFGENSEL_MASK_SFT (0x1 << 2)1522#define RG_AUDSPARE_SFT 41523#define RG_AUDSPARE_MASK 0xf1524#define RG_AUDSPARE_MASK_SFT (0xf << 4)1525#define RG_AUDENCSPARE_SFT 81526#define RG_AUDENCSPARE_MASK 0x3f1527#define RG_AUDENCSPARE_MASK_SFT (0x3f << 8)1528 1529/* MT6358_AUDENC_ANA_CON7 */1530#define RG_AUDENCSPARE2_SFT 01531#define RG_AUDENCSPARE2_MASK 0xff1532#define RG_AUDENCSPARE2_MASK_SFT (0xff << 0)1533 1534/* MT6358_AUDENC_ANA_CON8 */1535#define RG_AUDDIGMICEN_SFT 01536#define RG_AUDDIGMICEN_MASK 0x11537#define RG_AUDDIGMICEN_MASK_SFT (0x1 << 0)1538#define RG_AUDDIGMICBIAS_SFT 11539#define RG_AUDDIGMICBIAS_MASK 0x31540#define RG_AUDDIGMICBIAS_MASK_SFT (0x3 << 1)1541#define RG_DMICHPCLKEN_SFT 31542#define RG_DMICHPCLKEN_MASK 0x11543#define RG_DMICHPCLKEN_MASK_SFT (0x1 << 3)1544#define RG_AUDDIGMICPDUTY_SFT 41545#define RG_AUDDIGMICPDUTY_MASK 0x31546#define RG_AUDDIGMICPDUTY_MASK_SFT (0x3 << 4)1547#define RG_AUDDIGMICNDUTY_SFT 61548#define RG_AUDDIGMICNDUTY_MASK 0x31549#define RG_AUDDIGMICNDUTY_MASK_SFT (0x3 << 6)1550#define RG_DMICMONEN_SFT 81551#define RG_DMICMONEN_MASK 0x11552#define RG_DMICMONEN_MASK_SFT (0x1 << 8)1553#define RG_DMICMONSEL_SFT 91554#define RG_DMICMONSEL_MASK 0x71555#define RG_DMICMONSEL_MASK_SFT (0x7 << 9)1556#define RG_AUDSPAREVMIC_SFT 121557#define RG_AUDSPAREVMIC_MASK 0xf1558#define RG_AUDSPAREVMIC_MASK_SFT (0xf << 12)1559 1560/* MT6358_AUDENC_ANA_CON9 */1561#define RG_AUDPWDBMICBIAS0_SFT 01562#define RG_AUDPWDBMICBIAS0_MASK 0x11563#define RG_AUDPWDBMICBIAS0_MASK_SFT (0x1 << 0)1564#define RG_AUDMICBIAS0BYPASSEN_SFT 11565#define RG_AUDMICBIAS0BYPASSEN_MASK 0x11566#define RG_AUDMICBIAS0BYPASSEN_MASK_SFT (0x1 << 1)1567#define RG_AUDMICBIAS0LOWPEN_SFT 21568#define RG_AUDMICBIAS0LOWPEN_MASK 0x11569#define RG_AUDMICBIAS0LOWPEN_MASK_SFT (0x1 << 2)1570#define RG_AUDMICBIAS0VREF_SFT 41571#define RG_AUDMICBIAS0VREF_MASK 0x71572#define RG_AUDMICBIAS0VREF_MASK_SFT (0x7 << 4)1573#define RG_AUDMICBIAS0DCSW0P1EN_SFT 81574#define RG_AUDMICBIAS0DCSW0P1EN_MASK 0x11575#define RG_AUDMICBIAS0DCSW0P1EN_MASK_SFT (0x1 << 8)1576#define RG_AUDMICBIAS0DCSW0P2EN_SFT 91577#define RG_AUDMICBIAS0DCSW0P2EN_MASK 0x11578#define RG_AUDMICBIAS0DCSW0P2EN_MASK_SFT (0x1 << 9)1579#define RG_AUDMICBIAS0DCSW0NEN_SFT 101580#define RG_AUDMICBIAS0DCSW0NEN_MASK 0x11581#define RG_AUDMICBIAS0DCSW0NEN_MASK_SFT (0x1 << 10)1582#define RG_AUDMICBIAS0DCSW2P1EN_SFT 121583#define RG_AUDMICBIAS0DCSW2P1EN_MASK 0x11584#define RG_AUDMICBIAS0DCSW2P1EN_MASK_SFT (0x1 << 12)1585#define RG_AUDMICBIAS0DCSW2P2EN_SFT 131586#define RG_AUDMICBIAS0DCSW2P2EN_MASK 0x11587#define RG_AUDMICBIAS0DCSW2P2EN_MASK_SFT (0x1 << 13)1588#define RG_AUDMICBIAS0DCSW2NEN_SFT 141589#define RG_AUDMICBIAS0DCSW2NEN_MASK 0x11590#define RG_AUDMICBIAS0DCSW2NEN_MASK_SFT (0x1 << 14)1591 1592/* MT6358_AUDENC_ANA_CON10 */1593#define RG_AUDPWDBMICBIAS1_SFT 01594#define RG_AUDPWDBMICBIAS1_MASK 0x11595#define RG_AUDPWDBMICBIAS1_MASK_SFT (0x1 << 0)1596#define RG_AUDMICBIAS1BYPASSEN_SFT 11597#define RG_AUDMICBIAS1BYPASSEN_MASK 0x11598#define RG_AUDMICBIAS1BYPASSEN_MASK_SFT (0x1 << 1)1599#define RG_AUDMICBIAS1LOWPEN_SFT 21600#define RG_AUDMICBIAS1LOWPEN_MASK 0x11601#define RG_AUDMICBIAS1LOWPEN_MASK_SFT (0x1 << 2)1602#define RG_AUDMICBIAS1VREF_SFT 41603#define RG_AUDMICBIAS1VREF_MASK 0x71604#define RG_AUDMICBIAS1VREF_MASK_SFT (0x7 << 4)1605#define RG_AUDMICBIAS1DCSW1PEN_SFT 81606#define RG_AUDMICBIAS1DCSW1PEN_MASK 0x11607#define RG_AUDMICBIAS1DCSW1PEN_MASK_SFT (0x1 << 8)1608#define RG_AUDMICBIAS1DCSW1NEN_SFT 91609#define RG_AUDMICBIAS1DCSW1NEN_MASK 0x11610#define RG_AUDMICBIAS1DCSW1NEN_MASK_SFT (0x1 << 9)1611#define RG_BANDGAPGEN_SFT 121612#define RG_BANDGAPGEN_MASK 0x11613#define RG_BANDGAPGEN_MASK_SFT (0x1 << 12)1614#define RG_MTEST_EN_SFT 131615#define RG_MTEST_EN_MASK 0x11616#define RG_MTEST_EN_MASK_SFT (0x1 << 13)1617#define RG_MTEST_SEL_SFT 141618#define RG_MTEST_SEL_MASK 0x11619#define RG_MTEST_SEL_MASK_SFT (0x1 << 14)1620#define RG_MTEST_CURRENT_SFT 151621#define RG_MTEST_CURRENT_MASK 0x11622#define RG_MTEST_CURRENT_MASK_SFT (0x1 << 15)1623 1624/* MT6358_AUDENC_ANA_CON11 */1625#define RG_AUDACCDETMICBIAS0PULLLOW_SFT 01626#define RG_AUDACCDETMICBIAS0PULLLOW_MASK 0x11627#define RG_AUDACCDETMICBIAS0PULLLOW_MASK_SFT (0x1 << 0)1628#define RG_AUDACCDETMICBIAS1PULLLOW_SFT 11629#define RG_AUDACCDETMICBIAS1PULLLOW_MASK 0x11630#define RG_AUDACCDETMICBIAS1PULLLOW_MASK_SFT (0x1 << 1)1631#define RG_AUDACCDETVIN1PULLLOW_SFT 21632#define RG_AUDACCDETVIN1PULLLOW_MASK 0x11633#define RG_AUDACCDETVIN1PULLLOW_MASK_SFT (0x1 << 2)1634#define RG_AUDACCDETVTHACAL_SFT 41635#define RG_AUDACCDETVTHACAL_MASK 0x11636#define RG_AUDACCDETVTHACAL_MASK_SFT (0x1 << 4)1637#define RG_AUDACCDETVTHBCAL_SFT 51638#define RG_AUDACCDETVTHBCAL_MASK 0x11639#define RG_AUDACCDETVTHBCAL_MASK_SFT (0x1 << 5)1640#define RG_AUDACCDETTVDET_SFT 61641#define RG_AUDACCDETTVDET_MASK 0x11642#define RG_AUDACCDETTVDET_MASK_SFT (0x1 << 6)1643#define RG_ACCDETSEL_SFT 71644#define RG_ACCDETSEL_MASK 0x11645#define RG_ACCDETSEL_MASK_SFT (0x1 << 7)1646#define RG_SWBUFMODSEL_SFT 81647#define RG_SWBUFMODSEL_MASK 0x11648#define RG_SWBUFMODSEL_MASK_SFT (0x1 << 8)1649#define RG_SWBUFSWEN_SFT 91650#define RG_SWBUFSWEN_MASK 0x11651#define RG_SWBUFSWEN_MASK_SFT (0x1 << 9)1652#define RG_EINTCOMPVTH_SFT 101653#define RG_EINTCOMPVTH_MASK 0x11654#define RG_EINTCOMPVTH_MASK_SFT (0x1 << 10)1655#define RG_EINTCONFIGACCDET_SFT 111656#define RG_EINTCONFIGACCDET_MASK 0x11657#define RG_EINTCONFIGACCDET_MASK_SFT (0x1 << 11)1658#define RG_EINTHIRENB_SFT 121659#define RG_EINTHIRENB_MASK 0x11660#define RG_EINTHIRENB_MASK_SFT (0x1 << 12)1661#define RG_ACCDET2AUXRESBYPASS_SFT 131662#define RG_ACCDET2AUXRESBYPASS_MASK 0x11663#define RG_ACCDET2AUXRESBYPASS_MASK_SFT (0x1 << 13)1664#define RG_ACCDET2AUXBUFFERBYPASS_SFT 141665#define RG_ACCDET2AUXBUFFERBYPASS_MASK 0x11666#define RG_ACCDET2AUXBUFFERBYPASS_MASK_SFT (0x1 << 14)1667#define RG_ACCDET2AUXSWEN_SFT 151668#define RG_ACCDET2AUXSWEN_MASK 0x11669#define RG_ACCDET2AUXSWEN_MASK_SFT (0x1 << 15)1670 1671/* MT6358_AUDENC_ANA_CON12 */1672#define RGS_AUDRCTUNELREAD_SFT 01673#define RGS_AUDRCTUNELREAD_MASK 0x1f1674#define RGS_AUDRCTUNELREAD_MASK_SFT (0x1f << 0)1675#define RGS_AUDRCTUNERREAD_SFT 81676#define RGS_AUDRCTUNERREAD_MASK 0x1f1677#define RGS_AUDRCTUNERREAD_MASK_SFT (0x1f << 8)1678 1679/* MT6358_AUDDEC_DSN_ID */1680#define AUDDEC_ANA_ID_SFT 01681#define AUDDEC_ANA_ID_MASK 0xff1682#define AUDDEC_ANA_ID_MASK_SFT (0xff << 0)1683#define AUDDEC_DIG_ID_SFT 81684#define AUDDEC_DIG_ID_MASK 0xff1685#define AUDDEC_DIG_ID_MASK_SFT (0xff << 8)1686 1687/* MT6358_AUDDEC_DSN_REV0 */1688#define AUDDEC_ANA_MINOR_REV_SFT 01689#define AUDDEC_ANA_MINOR_REV_MASK 0xf1690#define AUDDEC_ANA_MINOR_REV_MASK_SFT (0xf << 0)1691#define AUDDEC_ANA_MAJOR_REV_SFT 41692#define AUDDEC_ANA_MAJOR_REV_MASK 0xf1693#define AUDDEC_ANA_MAJOR_REV_MASK_SFT (0xf << 4)1694#define AUDDEC_DIG_MINOR_REV_SFT 81695#define AUDDEC_DIG_MINOR_REV_MASK 0xf1696#define AUDDEC_DIG_MINOR_REV_MASK_SFT (0xf << 8)1697#define AUDDEC_DIG_MAJOR_REV_SFT 121698#define AUDDEC_DIG_MAJOR_REV_MASK 0xf1699#define AUDDEC_DIG_MAJOR_REV_MASK_SFT (0xf << 12)1700 1701/* MT6358_AUDDEC_DSN_DBI */1702#define AUDDEC_DSN_CBS_SFT 01703#define AUDDEC_DSN_CBS_MASK 0x31704#define AUDDEC_DSN_CBS_MASK_SFT (0x3 << 0)1705#define AUDDEC_DSN_BIX_SFT 21706#define AUDDEC_DSN_BIX_MASK 0x31707#define AUDDEC_DSN_BIX_MASK_SFT (0x3 << 2)1708#define AUDDEC_DSN_ESP_SFT 81709#define AUDDEC_DSN_ESP_MASK 0xff1710#define AUDDEC_DSN_ESP_MASK_SFT (0xff << 8)1711 1712/* MT6358_AUDDEC_DSN_FPI */1713#define AUDDEC_DSN_FPI_SFT 01714#define AUDDEC_DSN_FPI_MASK 0xff1715#define AUDDEC_DSN_FPI_MASK_SFT (0xff << 0)1716 1717/* MT6358_AUDDEC_ANA_CON0 */1718#define RG_AUDDACLPWRUP_VAUDP15_SFT 01719#define RG_AUDDACLPWRUP_VAUDP15_MASK 0x11720#define RG_AUDDACLPWRUP_VAUDP15_MASK_SFT (0x1 << 0)1721#define RG_AUDDACRPWRUP_VAUDP15_SFT 11722#define RG_AUDDACRPWRUP_VAUDP15_MASK 0x11723#define RG_AUDDACRPWRUP_VAUDP15_MASK_SFT (0x1 << 1)1724#define RG_AUD_DAC_PWR_UP_VA28_SFT 21725#define RG_AUD_DAC_PWR_UP_VA28_MASK 0x11726#define RG_AUD_DAC_PWR_UP_VA28_MASK_SFT (0x1 << 2)1727#define RG_AUD_DAC_PWL_UP_VA28_SFT 31728#define RG_AUD_DAC_PWL_UP_VA28_MASK 0x11729#define RG_AUD_DAC_PWL_UP_VA28_MASK_SFT (0x1 << 3)1730#define RG_AUDHPLPWRUP_VAUDP15_SFT 41731#define RG_AUDHPLPWRUP_VAUDP15_MASK 0x11732#define RG_AUDHPLPWRUP_VAUDP15_MASK_SFT (0x1 << 4)1733#define RG_AUDHPRPWRUP_VAUDP15_SFT 51734#define RG_AUDHPRPWRUP_VAUDP15_MASK 0x11735#define RG_AUDHPRPWRUP_VAUDP15_MASK_SFT (0x1 << 5)1736#define RG_AUDHPLPWRUP_IBIAS_VAUDP15_SFT 61737#define RG_AUDHPLPWRUP_IBIAS_VAUDP15_MASK 0x11738#define RG_AUDHPLPWRUP_IBIAS_VAUDP15_MASK_SFT (0x1 << 6)1739#define RG_AUDHPRPWRUP_IBIAS_VAUDP15_SFT 71740#define RG_AUDHPRPWRUP_IBIAS_VAUDP15_MASK 0x11741#define RG_AUDHPRPWRUP_IBIAS_VAUDP15_MASK_SFT (0x1 << 7)1742#define RG_AUDHPLMUXINPUTSEL_VAUDP15_SFT 81743#define RG_AUDHPLMUXINPUTSEL_VAUDP15_MASK 0x31744#define RG_AUDHPLMUXINPUTSEL_VAUDP15_MASK_SFT (0x3 << 8)1745#define RG_AUDHPRMUXINPUTSEL_VAUDP15_SFT 101746#define RG_AUDHPRMUXINPUTSEL_VAUDP15_MASK 0x31747#define RG_AUDHPRMUXINPUTSEL_VAUDP15_MASK_SFT (0x3 << 10)1748#define RG_AUDHPLSCDISABLE_VAUDP15_SFT 121749#define RG_AUDHPLSCDISABLE_VAUDP15_MASK 0x11750#define RG_AUDHPLSCDISABLE_VAUDP15_MASK_SFT (0x1 << 12)1751#define RG_AUDHPRSCDISABLE_VAUDP15_SFT 131752#define RG_AUDHPRSCDISABLE_VAUDP15_MASK 0x11753#define RG_AUDHPRSCDISABLE_VAUDP15_MASK_SFT (0x1 << 13)1754#define RG_AUDHPLBSCCURRENT_VAUDP15_SFT 141755#define RG_AUDHPLBSCCURRENT_VAUDP15_MASK 0x11756#define RG_AUDHPLBSCCURRENT_VAUDP15_MASK_SFT (0x1 << 14)1757#define RG_AUDHPRBSCCURRENT_VAUDP15_SFT 151758#define RG_AUDHPRBSCCURRENT_VAUDP15_MASK 0x11759#define RG_AUDHPRBSCCURRENT_VAUDP15_MASK_SFT (0x1 << 15)1760 1761/* MT6358_AUDDEC_ANA_CON1 */1762#define RG_AUDHPLOUTPWRUP_VAUDP15_SFT 01763#define RG_AUDHPLOUTPWRUP_VAUDP15_MASK 0x11764#define RG_AUDHPLOUTPWRUP_VAUDP15_MASK_SFT (0x1 << 0)1765#define RG_AUDHPROUTPWRUP_VAUDP15_SFT 11766#define RG_AUDHPROUTPWRUP_VAUDP15_MASK 0x11767#define RG_AUDHPROUTPWRUP_VAUDP15_MASK_SFT (0x1 << 1)1768#define RG_AUDHPLOUTAUXPWRUP_VAUDP15_SFT 21769#define RG_AUDHPLOUTAUXPWRUP_VAUDP15_MASK 0x11770#define RG_AUDHPLOUTAUXPWRUP_VAUDP15_MASK_SFT (0x1 << 2)1771#define RG_AUDHPROUTAUXPWRUP_VAUDP15_SFT 31772#define RG_AUDHPROUTAUXPWRUP_VAUDP15_MASK 0x11773#define RG_AUDHPROUTAUXPWRUP_VAUDP15_MASK_SFT (0x1 << 3)1774#define RG_HPLAUXFBRSW_EN_VAUDP15_SFT 41775#define RG_HPLAUXFBRSW_EN_VAUDP15_MASK 0x11776#define RG_HPLAUXFBRSW_EN_VAUDP15_MASK_SFT (0x1 << 4)1777#define RG_HPRAUXFBRSW_EN_VAUDP15_SFT 51778#define RG_HPRAUXFBRSW_EN_VAUDP15_MASK 0x11779#define RG_HPRAUXFBRSW_EN_VAUDP15_MASK_SFT (0x1 << 5)1780#define RG_HPLSHORT2HPLAUX_EN_VAUDP15_SFT 61781#define RG_HPLSHORT2HPLAUX_EN_VAUDP15_MASK 0x11782#define RG_HPLSHORT2HPLAUX_EN_VAUDP15_MASK_SFT (0x1 << 6)1783#define RG_HPRSHORT2HPRAUX_EN_VAUDP15_SFT 71784#define RG_HPRSHORT2HPRAUX_EN_VAUDP15_MASK 0x11785#define RG_HPRSHORT2HPRAUX_EN_VAUDP15_MASK_SFT (0x1 << 7)1786#define RG_HPLOUTSTGCTRL_VAUDP15_SFT 81787#define RG_HPLOUTSTGCTRL_VAUDP15_MASK 0x71788#define RG_HPLOUTSTGCTRL_VAUDP15_MASK_SFT (0x7 << 8)1789#define RG_HPROUTSTGCTRL_VAUDP15_SFT 111790#define RG_HPROUTSTGCTRL_VAUDP15_MASK 0x71791#define RG_HPROUTSTGCTRL_VAUDP15_MASK_SFT (0x7 << 11)1792 1793/* MT6358_AUDDEC_ANA_CON2 */1794#define RG_HPLOUTPUTSTBENH_VAUDP15_SFT 01795#define RG_HPLOUTPUTSTBENH_VAUDP15_MASK 0x71796#define RG_HPLOUTPUTSTBENH_VAUDP15_MASK_SFT (0x7 << 0)1797#define RG_HPROUTPUTSTBENH_VAUDP15_SFT 41798#define RG_HPROUTPUTSTBENH_VAUDP15_MASK 0x71799#define RG_HPROUTPUTSTBENH_VAUDP15_MASK_SFT (0x7 << 4)1800#define RG_AUDHPSTARTUP_VAUDP15_SFT 131801#define RG_AUDHPSTARTUP_VAUDP15_MASK 0x11802#define RG_AUDHPSTARTUP_VAUDP15_MASK_SFT (0x1 << 13)1803#define RG_AUDREFN_DERES_EN_VAUDP15_SFT 141804#define RG_AUDREFN_DERES_EN_VAUDP15_MASK 0x11805#define RG_AUDREFN_DERES_EN_VAUDP15_MASK_SFT (0x1 << 14)1806#define RG_HPPSHORT2VCM_VAUDP15_SFT 151807#define RG_HPPSHORT2VCM_VAUDP15_MASK 0x11808#define RG_HPPSHORT2VCM_VAUDP15_MASK_SFT (0x1 << 15)1809 1810/* MT6358_AUDDEC_ANA_CON3 */1811#define RG_HPINPUTSTBENH_VAUDP15_SFT 131812#define RG_HPINPUTSTBENH_VAUDP15_MASK 0x11813#define RG_HPINPUTSTBENH_VAUDP15_MASK_SFT (0x1 << 13)1814#define RG_HPINPUTRESET0_VAUDP15_SFT 141815#define RG_HPINPUTRESET0_VAUDP15_MASK 0x11816#define RG_HPINPUTRESET0_VAUDP15_MASK_SFT (0x1 << 14)1817#define RG_HPOUTPUTRESET0_VAUDP15_SFT 151818#define RG_HPOUTPUTRESET0_VAUDP15_MASK 0x11819#define RG_HPOUTPUTRESET0_VAUDP15_MASK_SFT (0x1 << 15)1820 1821/* MT6358_AUDDEC_ANA_CON4 */1822#define RG_ABIDEC_RSVD0_VAUDP28_SFT 01823#define RG_ABIDEC_RSVD0_VAUDP28_MASK 0xff1824#define RG_ABIDEC_RSVD0_VAUDP28_MASK_SFT (0xff << 0)1825 1826/* MT6358_AUDDEC_ANA_CON5 */1827#define RG_AUDHPDECMGAINADJ_VAUDP15_SFT 01828#define RG_AUDHPDECMGAINADJ_VAUDP15_MASK 0x71829#define RG_AUDHPDECMGAINADJ_VAUDP15_MASK_SFT (0x7 << 0)1830#define RG_AUDHPDEDMGAINADJ_VAUDP15_SFT 41831#define RG_AUDHPDEDMGAINADJ_VAUDP15_MASK 0x71832#define RG_AUDHPDEDMGAINADJ_VAUDP15_MASK_SFT (0x7 << 4)1833 1834/* MT6358_AUDDEC_ANA_CON6 */1835#define RG_AUDHSPWRUP_VAUDP15_SFT 01836#define RG_AUDHSPWRUP_VAUDP15_MASK 0x11837#define RG_AUDHSPWRUP_VAUDP15_MASK_SFT (0x1 << 0)1838#define RG_AUDHSPWRUP_IBIAS_VAUDP15_SFT 11839#define RG_AUDHSPWRUP_IBIAS_VAUDP15_MASK 0x11840#define RG_AUDHSPWRUP_IBIAS_VAUDP15_MASK_SFT (0x1 << 1)1841#define RG_AUDHSMUXINPUTSEL_VAUDP15_SFT 21842#define RG_AUDHSMUXINPUTSEL_VAUDP15_MASK 0x31843#define RG_AUDHSMUXINPUTSEL_VAUDP15_MASK_SFT (0x3 << 2)1844#define RG_AUDHSSCDISABLE_VAUDP15_SFT 41845#define RG_AUDHSSCDISABLE_VAUDP15_MASK 0x11846#define RG_AUDHSSCDISABLE_VAUDP15_MASK_SFT (0x1 << 4)1847#define RG_AUDHSBSCCURRENT_VAUDP15_SFT 51848#define RG_AUDHSBSCCURRENT_VAUDP15_MASK 0x11849#define RG_AUDHSBSCCURRENT_VAUDP15_MASK_SFT (0x1 << 5)1850#define RG_AUDHSSTARTUP_VAUDP15_SFT 61851#define RG_AUDHSSTARTUP_VAUDP15_MASK 0x11852#define RG_AUDHSSTARTUP_VAUDP15_MASK_SFT (0x1 << 6)1853#define RG_HSOUTPUTSTBENH_VAUDP15_SFT 71854#define RG_HSOUTPUTSTBENH_VAUDP15_MASK 0x11855#define RG_HSOUTPUTSTBENH_VAUDP15_MASK_SFT (0x1 << 7)1856#define RG_HSINPUTSTBENH_VAUDP15_SFT 81857#define RG_HSINPUTSTBENH_VAUDP15_MASK 0x11858#define RG_HSINPUTSTBENH_VAUDP15_MASK_SFT (0x1 << 8)1859#define RG_HSINPUTRESET0_VAUDP15_SFT 91860#define RG_HSINPUTRESET0_VAUDP15_MASK 0x11861#define RG_HSINPUTRESET0_VAUDP15_MASK_SFT (0x1 << 9)1862#define RG_HSOUTPUTRESET0_VAUDP15_SFT 101863#define RG_HSOUTPUTRESET0_VAUDP15_MASK 0x11864#define RG_HSOUTPUTRESET0_VAUDP15_MASK_SFT (0x1 << 10)1865#define RG_HSOUT_SHORTVCM_VAUDP15_SFT 111866#define RG_HSOUT_SHORTVCM_VAUDP15_MASK 0x11867#define RG_HSOUT_SHORTVCM_VAUDP15_MASK_SFT (0x1 << 11)1868 1869/* MT6358_AUDDEC_ANA_CON7 */1870#define RG_AUDLOLPWRUP_VAUDP15_SFT 01871#define RG_AUDLOLPWRUP_VAUDP15_MASK 0x11872#define RG_AUDLOLPWRUP_VAUDP15_MASK_SFT (0x1 << 0)1873#define RG_AUDLOLPWRUP_IBIAS_VAUDP15_SFT 11874#define RG_AUDLOLPWRUP_IBIAS_VAUDP15_MASK 0x11875#define RG_AUDLOLPWRUP_IBIAS_VAUDP15_MASK_SFT (0x1 << 1)1876#define RG_AUDLOLMUXINPUTSEL_VAUDP15_SFT 21877#define RG_AUDLOLMUXINPUTSEL_VAUDP15_MASK 0x31878#define RG_AUDLOLMUXINPUTSEL_VAUDP15_MASK_SFT (0x3 << 2)1879#define RG_AUDLOLSCDISABLE_VAUDP15_SFT 41880#define RG_AUDLOLSCDISABLE_VAUDP15_MASK 0x11881#define RG_AUDLOLSCDISABLE_VAUDP15_MASK_SFT (0x1 << 4)1882#define RG_AUDLOLBSCCURRENT_VAUDP15_SFT 51883#define RG_AUDLOLBSCCURRENT_VAUDP15_MASK 0x11884#define RG_AUDLOLBSCCURRENT_VAUDP15_MASK_SFT (0x1 << 5)1885#define RG_AUDLOSTARTUP_VAUDP15_SFT 61886#define RG_AUDLOSTARTUP_VAUDP15_MASK 0x11887#define RG_AUDLOSTARTUP_VAUDP15_MASK_SFT (0x1 << 6)1888#define RG_LOINPUTSTBENH_VAUDP15_SFT 71889#define RG_LOINPUTSTBENH_VAUDP15_MASK 0x11890#define RG_LOINPUTSTBENH_VAUDP15_MASK_SFT (0x1 << 7)1891#define RG_LOOUTPUTSTBENH_VAUDP15_SFT 81892#define RG_LOOUTPUTSTBENH_VAUDP15_MASK 0x11893#define RG_LOOUTPUTSTBENH_VAUDP15_MASK_SFT (0x1 << 8)1894#define RG_LOINPUTRESET0_VAUDP15_SFT 91895#define RG_LOINPUTRESET0_VAUDP15_MASK 0x11896#define RG_LOINPUTRESET0_VAUDP15_MASK_SFT (0x1 << 9)1897#define RG_LOOUTPUTRESET0_VAUDP15_SFT 101898#define RG_LOOUTPUTRESET0_VAUDP15_MASK 0x11899#define RG_LOOUTPUTRESET0_VAUDP15_MASK_SFT (0x1 << 10)1900#define RG_LOOUT_SHORTVCM_VAUDP15_SFT 111901#define RG_LOOUT_SHORTVCM_VAUDP15_MASK 0x11902#define RG_LOOUT_SHORTVCM_VAUDP15_MASK_SFT (0x1 << 11)1903 1904/* MT6358_AUDDEC_ANA_CON8 */1905#define RG_AUDTRIMBUF_INPUTMUXSEL_VAUDP15_SFT 01906#define RG_AUDTRIMBUF_INPUTMUXSEL_VAUDP15_MASK 0xf1907#define RG_AUDTRIMBUF_INPUTMUXSEL_VAUDP15_MASK_SFT (0xf << 0)1908#define RG_AUDTRIMBUF_GAINSEL_VAUDP15_SFT 41909#define RG_AUDTRIMBUF_GAINSEL_VAUDP15_MASK 0x31910#define RG_AUDTRIMBUF_GAINSEL_VAUDP15_MASK_SFT (0x3 << 4)1911#define RG_AUDTRIMBUF_EN_VAUDP15_SFT 61912#define RG_AUDTRIMBUF_EN_VAUDP15_MASK 0x11913#define RG_AUDTRIMBUF_EN_VAUDP15_MASK_SFT (0x1 << 6)1914#define RG_AUDHPSPKDET_INPUTMUXSEL_VAUDP15_SFT 81915#define RG_AUDHPSPKDET_INPUTMUXSEL_VAUDP15_MASK 0x31916#define RG_AUDHPSPKDET_INPUTMUXSEL_VAUDP15_MASK_SFT (0x3 << 8)1917#define RG_AUDHPSPKDET_OUTPUTMUXSEL_VAUDP15_SFT 101918#define RG_AUDHPSPKDET_OUTPUTMUXSEL_VAUDP15_MASK 0x31919#define RG_AUDHPSPKDET_OUTPUTMUXSEL_VAUDP15_MASK_SFT (0x3 << 10)1920#define RG_AUDHPSPKDET_EN_VAUDP15_SFT 121921#define RG_AUDHPSPKDET_EN_VAUDP15_MASK 0x11922#define RG_AUDHPSPKDET_EN_VAUDP15_MASK_SFT (0x1 << 12)1923 1924/* MT6358_AUDDEC_ANA_CON9 */1925#define RG_ABIDEC_RSVD0_VA28_SFT 01926#define RG_ABIDEC_RSVD0_VA28_MASK 0xff1927#define RG_ABIDEC_RSVD0_VA28_MASK_SFT (0xff << 0)1928#define RG_ABIDEC_RSVD0_VAUDP15_SFT 81929#define RG_ABIDEC_RSVD0_VAUDP15_MASK 0xff1930#define RG_ABIDEC_RSVD0_VAUDP15_MASK_SFT (0xff << 8)1931 1932/* MT6358_AUDDEC_ANA_CON10 */1933#define RG_ABIDEC_RSVD1_VAUDP15_SFT 01934#define RG_ABIDEC_RSVD1_VAUDP15_MASK 0xff1935#define RG_ABIDEC_RSVD1_VAUDP15_MASK_SFT (0xff << 0)1936#define RG_ABIDEC_RSVD2_VAUDP15_SFT 81937#define RG_ABIDEC_RSVD2_VAUDP15_MASK 0xff1938#define RG_ABIDEC_RSVD2_VAUDP15_MASK_SFT (0xff << 8)1939 1940/* MT6358_AUDDEC_ANA_CON11 */1941#define RG_AUDZCDMUXSEL_VAUDP15_SFT 01942#define RG_AUDZCDMUXSEL_VAUDP15_MASK 0x71943#define RG_AUDZCDMUXSEL_VAUDP15_MASK_SFT (0x7 << 0)1944#define RG_AUDZCDCLKSEL_VAUDP15_SFT 31945#define RG_AUDZCDCLKSEL_VAUDP15_MASK 0x11946#define RG_AUDZCDCLKSEL_VAUDP15_MASK_SFT (0x1 << 3)1947#define RG_AUDBIASADJ_0_VAUDP15_SFT 71948#define RG_AUDBIASADJ_0_VAUDP15_MASK 0x1ff1949#define RG_AUDBIASADJ_0_VAUDP15_MASK_SFT (0x1ff << 7)1950 1951/* MT6358_AUDDEC_ANA_CON12 */1952#define RG_AUDBIASADJ_1_VAUDP15_SFT 01953#define RG_AUDBIASADJ_1_VAUDP15_MASK 0xff1954#define RG_AUDBIASADJ_1_VAUDP15_MASK_SFT (0xff << 0)1955#define RG_AUDIBIASPWRDN_VAUDP15_SFT 81956#define RG_AUDIBIASPWRDN_VAUDP15_MASK 0x11957#define RG_AUDIBIASPWRDN_VAUDP15_MASK_SFT (0x1 << 8)1958 1959/* MT6358_AUDDEC_ANA_CON13 */1960#define RG_RSTB_DECODER_VA28_SFT 01961#define RG_RSTB_DECODER_VA28_MASK 0x11962#define RG_RSTB_DECODER_VA28_MASK_SFT (0x1 << 0)1963#define RG_SEL_DECODER_96K_VA28_SFT 11964#define RG_SEL_DECODER_96K_VA28_MASK 0x11965#define RG_SEL_DECODER_96K_VA28_MASK_SFT (0x1 << 1)1966#define RG_SEL_DELAY_VCORE_SFT 21967#define RG_SEL_DELAY_VCORE_MASK 0x11968#define RG_SEL_DELAY_VCORE_MASK_SFT (0x1 << 2)1969#define RG_AUDGLB_PWRDN_VA28_SFT 41970#define RG_AUDGLB_PWRDN_VA28_MASK 0x11971#define RG_AUDGLB_PWRDN_VA28_MASK_SFT (0x1 << 4)1972#define RG_RSTB_ENCODER_VA28_SFT 51973#define RG_RSTB_ENCODER_VA28_MASK 0x11974#define RG_RSTB_ENCODER_VA28_MASK_SFT (0x1 << 5)1975#define RG_SEL_ENCODER_96K_VA28_SFT 61976#define RG_SEL_ENCODER_96K_VA28_MASK 0x11977#define RG_SEL_ENCODER_96K_VA28_MASK_SFT (0x1 << 6)1978 1979/* MT6358_AUDDEC_ANA_CON14 */1980#define RG_HCLDO_EN_VA18_SFT 01981#define RG_HCLDO_EN_VA18_MASK 0x11982#define RG_HCLDO_EN_VA18_MASK_SFT (0x1 << 0)1983#define RG_HCLDO_PDDIS_EN_VA18_SFT 11984#define RG_HCLDO_PDDIS_EN_VA18_MASK 0x11985#define RG_HCLDO_PDDIS_EN_VA18_MASK_SFT (0x1 << 1)1986#define RG_HCLDO_REMOTE_SENSE_VA18_SFT 21987#define RG_HCLDO_REMOTE_SENSE_VA18_MASK 0x11988#define RG_HCLDO_REMOTE_SENSE_VA18_MASK_SFT (0x1 << 2)1989#define RG_LCLDO_EN_VA18_SFT 41990#define RG_LCLDO_EN_VA18_MASK 0x11991#define RG_LCLDO_EN_VA18_MASK_SFT (0x1 << 4)1992#define RG_LCLDO_PDDIS_EN_VA18_SFT 51993#define RG_LCLDO_PDDIS_EN_VA18_MASK 0x11994#define RG_LCLDO_PDDIS_EN_VA18_MASK_SFT (0x1 << 5)1995#define RG_LCLDO_REMOTE_SENSE_VA18_SFT 61996#define RG_LCLDO_REMOTE_SENSE_VA18_MASK 0x11997#define RG_LCLDO_REMOTE_SENSE_VA18_MASK_SFT (0x1 << 6)1998#define RG_LCLDO_ENC_EN_VA28_SFT 81999#define RG_LCLDO_ENC_EN_VA28_MASK 0x12000#define RG_LCLDO_ENC_EN_VA28_MASK_SFT (0x1 << 8)2001#define RG_LCLDO_ENC_PDDIS_EN_VA28_SFT 92002#define RG_LCLDO_ENC_PDDIS_EN_VA28_MASK 0x12003#define RG_LCLDO_ENC_PDDIS_EN_VA28_MASK_SFT (0x1 << 9)2004#define RG_LCLDO_ENC_REMOTE_SENSE_VA28_SFT 102005#define RG_LCLDO_ENC_REMOTE_SENSE_VA28_MASK 0x12006#define RG_LCLDO_ENC_REMOTE_SENSE_VA28_MASK_SFT (0x1 << 10)2007#define RG_VA33REFGEN_EN_VA18_SFT 122008#define RG_VA33REFGEN_EN_VA18_MASK 0x12009#define RG_VA33REFGEN_EN_VA18_MASK_SFT (0x1 << 12)2010#define RG_VA28REFGEN_EN_VA28_SFT 132011#define RG_VA28REFGEN_EN_VA28_MASK 0x12012#define RG_VA28REFGEN_EN_VA28_MASK_SFT (0x1 << 13)2013#define RG_HCLDO_VOSEL_VA18_SFT 142014#define RG_HCLDO_VOSEL_VA18_MASK 0x12015#define RG_HCLDO_VOSEL_VA18_MASK_SFT (0x1 << 14)2016#define RG_LCLDO_VOSEL_VA18_SFT 152017#define RG_LCLDO_VOSEL_VA18_MASK 0x12018#define RG_LCLDO_VOSEL_VA18_MASK_SFT (0x1 << 15)2019 2020/* MT6358_AUDDEC_ANA_CON15 */2021#define RG_NVREG_EN_VAUDP15_SFT 02022#define RG_NVREG_EN_VAUDP15_MASK 0x12023#define RG_NVREG_EN_VAUDP15_MASK_SFT (0x1 << 0)2024#define RG_NVREG_PULL0V_VAUDP15_SFT 12025#define RG_NVREG_PULL0V_VAUDP15_MASK 0x12026#define RG_NVREG_PULL0V_VAUDP15_MASK_SFT (0x1 << 1)2027#define RG_AUDPMU_RSD0_VAUDP15_SFT 42028#define RG_AUDPMU_RSD0_VAUDP15_MASK 0xf2029#define RG_AUDPMU_RSD0_VAUDP15_MASK_SFT (0xf << 4)2030#define RG_AUDPMU_RSD0_VA18_SFT 82031#define RG_AUDPMU_RSD0_VA18_MASK 0xf2032#define RG_AUDPMU_RSD0_VA18_MASK_SFT (0xf << 8)2033#define RG_AUDPMU_RSD0_VA28_SFT 122034#define RG_AUDPMU_RSD0_VA28_MASK 0xf2035#define RG_AUDPMU_RSD0_VA28_MASK_SFT (0xf << 12)2036 2037/* MT6358_ZCD_CON0 */2038#define RG_AUDZCDENABLE_SFT 02039#define RG_AUDZCDENABLE_MASK 0x12040#define RG_AUDZCDENABLE_MASK_SFT (0x1 << 0)2041#define RG_AUDZCDGAINSTEPTIME_SFT 12042#define RG_AUDZCDGAINSTEPTIME_MASK 0x72043#define RG_AUDZCDGAINSTEPTIME_MASK_SFT (0x7 << 1)2044#define RG_AUDZCDGAINSTEPSIZE_SFT 42045#define RG_AUDZCDGAINSTEPSIZE_MASK 0x32046#define RG_AUDZCDGAINSTEPSIZE_MASK_SFT (0x3 << 4)2047#define RG_AUDZCDTIMEOUTMODESEL_SFT 62048#define RG_AUDZCDTIMEOUTMODESEL_MASK 0x12049#define RG_AUDZCDTIMEOUTMODESEL_MASK_SFT (0x1 << 6)2050 2051/* MT6358_ZCD_CON1 */2052#define RG_AUDLOLGAIN_SFT 02053#define RG_AUDLOLGAIN_MASK 0x1f2054#define RG_AUDLOLGAIN_MASK_SFT (0x1f << 0)2055#define RG_AUDLORGAIN_SFT 72056#define RG_AUDLORGAIN_MASK 0x1f2057#define RG_AUDLORGAIN_MASK_SFT (0x1f << 7)2058 2059/* MT6358_ZCD_CON2 */2060#define RG_AUDHPLGAIN_SFT 02061#define RG_AUDHPLGAIN_MASK 0x1f2062#define RG_AUDHPLGAIN_MASK_SFT (0x1f << 0)2063#define RG_AUDHPRGAIN_SFT 72064#define RG_AUDHPRGAIN_MASK 0x1f2065#define RG_AUDHPRGAIN_MASK_SFT (0x1f << 7)2066 2067/* MT6358_ZCD_CON3 */2068#define RG_AUDHSGAIN_SFT 02069#define RG_AUDHSGAIN_MASK 0x1f2070#define RG_AUDHSGAIN_MASK_SFT (0x1f << 0)2071 2072/* MT6358_ZCD_CON4 */2073#define RG_AUDIVLGAIN_SFT 02074#define RG_AUDIVLGAIN_MASK 0x72075#define RG_AUDIVLGAIN_MASK_SFT (0x7 << 0)2076#define RG_AUDIVRGAIN_SFT 82077#define RG_AUDIVRGAIN_MASK 0x72078#define RG_AUDIVRGAIN_MASK_SFT (0x7 << 8)2079 2080/* MT6358_ZCD_CON5 */2081#define RG_AUDINTGAIN1_SFT 02082#define RG_AUDINTGAIN1_MASK 0x3f2083#define RG_AUDINTGAIN1_MASK_SFT (0x3f << 0)2084#define RG_AUDINTGAIN2_SFT 82085#define RG_AUDINTGAIN2_MASK 0x3f2086#define RG_AUDINTGAIN2_MASK_SFT (0x3f << 8)2087 2088/* audio register */2089#define MT6358_DRV_CON3 0x3c2090#define MT6358_GPIO_DIR0 0x882091 2092#define MT6358_GPIO_MODE2 0xd8 /* mosi */2093#define MT6358_GPIO_MODE2_SET 0xda2094#define MT6358_GPIO_MODE2_CLR 0xdc2095 2096#define MT6358_GPIO_MODE3 0xde /* miso */2097#define MT6358_GPIO_MODE3_SET 0xe02098#define MT6358_GPIO_MODE3_CLR 0xe22099 2100#define MT6358_TOP_CKPDN_CON0 0x10c2101#define MT6358_TOP_CKPDN_CON0_SET 0x10e2102#define MT6358_TOP_CKPDN_CON0_CLR 0x1102103 2104#define MT6358_TOP_CKHWEN_CON0 0x12a2105#define MT6358_TOP_CKHWEN_CON0_SET 0x12c2106#define MT6358_TOP_CKHWEN_CON0_CLR 0x12e2107 2108#define MT6358_OTP_CON0 0x38a2109#define MT6358_OTP_CON8 0x39a2110#define MT6358_OTP_CON11 0x3a02111#define MT6358_OTP_CON12 0x3a22112#define MT6358_OTP_CON13 0x3a42113 2114#define MT6358_DCXO_CW13 0x7aa2115#define MT6358_DCXO_CW14 0x7ac2116 2117#define MT6358_AUXADC_CON10 0x11a02118 2119/* audio register */2120#define MT6358_AUD_TOP_ID 0x22002121#define MT6358_AUD_TOP_REV0 0x22022122#define MT6358_AUD_TOP_DBI 0x22042123#define MT6358_AUD_TOP_DXI 0x22062124#define MT6358_AUD_TOP_CKPDN_TPM0 0x22082125#define MT6358_AUD_TOP_CKPDN_TPM1 0x220a2126#define MT6358_AUD_TOP_CKPDN_CON0 0x220c2127#define MT6358_AUD_TOP_CKPDN_CON0_SET 0x220e2128#define MT6358_AUD_TOP_CKPDN_CON0_CLR 0x22102129#define MT6358_AUD_TOP_CKSEL_CON0 0x22122130#define MT6358_AUD_TOP_CKSEL_CON0_SET 0x22142131#define MT6358_AUD_TOP_CKSEL_CON0_CLR 0x22162132#define MT6358_AUD_TOP_CKTST_CON0 0x22182133#define MT6358_AUD_TOP_CLK_HWEN_CON0 0x221a2134#define MT6358_AUD_TOP_CLK_HWEN_CON0_SET 0x221c2135#define MT6358_AUD_TOP_CLK_HWEN_CON0_CLR 0x221e2136#define MT6358_AUD_TOP_RST_CON0 0x22202137#define MT6358_AUD_TOP_RST_CON0_SET 0x22222138#define MT6358_AUD_TOP_RST_CON0_CLR 0x22242139#define MT6358_AUD_TOP_RST_BANK_CON0 0x22262140#define MT6358_AUD_TOP_INT_CON0 0x22282141#define MT6358_AUD_TOP_INT_CON0_SET 0x222a2142#define MT6358_AUD_TOP_INT_CON0_CLR 0x222c2143#define MT6358_AUD_TOP_INT_MASK_CON0 0x222e2144#define MT6358_AUD_TOP_INT_MASK_CON0_SET 0x22302145#define MT6358_AUD_TOP_INT_MASK_CON0_CLR 0x22322146#define MT6358_AUD_TOP_INT_STATUS0 0x22342147#define MT6358_AUD_TOP_INT_RAW_STATUS0 0x22362148#define MT6358_AUD_TOP_INT_MISC_CON0 0x22382149#define MT6358_AUDNCP_CLKDIV_CON0 0x223a2150#define MT6358_AUDNCP_CLKDIV_CON1 0x223c2151#define MT6358_AUDNCP_CLKDIV_CON2 0x223e2152#define MT6358_AUDNCP_CLKDIV_CON3 0x22402153#define MT6358_AUDNCP_CLKDIV_CON4 0x22422154#define MT6358_AUD_TOP_MON_CON0 0x22442155#define MT6358_AUDIO_DIG_DSN_ID 0x22802156#define MT6358_AUDIO_DIG_DSN_REV0 0x22822157#define MT6358_AUDIO_DIG_DSN_DBI 0x22842158#define MT6358_AUDIO_DIG_DSN_DXI 0x22862159#define MT6358_AFE_UL_DL_CON0 0x22882160#define MT6358_AFE_DL_SRC2_CON0_L 0x228a2161#define MT6358_AFE_UL_SRC_CON0_H 0x228c2162#define MT6358_AFE_UL_SRC_CON0_L 0x228e2163#define MT6358_AFE_TOP_CON0 0x22902164#define MT6358_AUDIO_TOP_CON0 0x22922165#define MT6358_AFE_MON_DEBUG0 0x22942166#define MT6358_AFUNC_AUD_CON0 0x22962167#define MT6358_AFUNC_AUD_CON1 0x22982168#define MT6358_AFUNC_AUD_CON2 0x229a2169#define MT6358_AFUNC_AUD_CON3 0x229c2170#define MT6358_AFUNC_AUD_CON4 0x229e2171#define MT6358_AFUNC_AUD_CON5 0x22a02172#define MT6358_AFUNC_AUD_CON6 0x22a22173#define MT6358_AFUNC_AUD_MON0 0x22a42174#define MT6358_AUDRC_TUNE_MON0 0x22a62175#define MT6358_AFE_ADDA_MTKAIF_FIFO_CFG0 0x22a82176#define MT6358_AFE_ADDA_MTKAIF_FIFO_LOG_MON1 0x22aa2177#define MT6358_AFE_ADDA_MTKAIF_MON0 0x22ac2178#define MT6358_AFE_ADDA_MTKAIF_MON1 0x22ae2179#define MT6358_AFE_ADDA_MTKAIF_MON2 0x22b02180#define MT6358_AFE_ADDA_MTKAIF_MON3 0x22b22181#define MT6358_AFE_ADDA_MTKAIF_CFG0 0x22b42182#define MT6358_AFE_ADDA_MTKAIF_RX_CFG0 0x22b62183#define MT6358_AFE_ADDA_MTKAIF_RX_CFG1 0x22b82184#define MT6358_AFE_ADDA_MTKAIF_RX_CFG2 0x22ba2185#define MT6358_AFE_ADDA_MTKAIF_RX_CFG3 0x22bc2186#define MT6358_AFE_ADDA_MTKAIF_TX_CFG1 0x22be2187#define MT6358_AFE_SGEN_CFG0 0x22c02188#define MT6358_AFE_SGEN_CFG1 0x22c22189#define MT6358_AFE_ADC_ASYNC_FIFO_CFG 0x22c42190#define MT6358_AFE_DCCLK_CFG0 0x22c62191#define MT6358_AFE_DCCLK_CFG1 0x22c82192#define MT6358_AUDIO_DIG_CFG 0x22ca2193#define MT6358_AFE_AUD_PAD_TOP 0x22cc2194#define MT6358_AFE_AUD_PAD_TOP_MON 0x22ce2195#define MT6358_AFE_AUD_PAD_TOP_MON1 0x22d02196#define MT6358_AFE_DL_NLE_CFG 0x22d22197#define MT6358_AFE_DL_NLE_MON 0x22d42198#define MT6358_AFE_CG_EN_MON 0x22d62199#define MT6358_AUDIO_DIG_2ND_DSN_ID 0x23002200#define MT6358_AUDIO_DIG_2ND_DSN_REV0 0x23022201#define MT6358_AUDIO_DIG_2ND_DSN_DBI 0x23042202#define MT6358_AUDIO_DIG_2ND_DSN_DXI 0x23062203#define MT6358_AFE_PMIC_NEWIF_CFG3 0x23082204#define MT6358_AFE_VOW_TOP 0x230a2205#define MT6358_AFE_VOW_CFG0 0x230c2206#define MT6358_AFE_VOW_CFG1 0x230e2207#define MT6358_AFE_VOW_CFG2 0x23102208#define MT6358_AFE_VOW_CFG3 0x23122209#define MT6358_AFE_VOW_CFG4 0x23142210#define MT6358_AFE_VOW_CFG5 0x23162211#define MT6358_AFE_VOW_CFG6 0x23182212#define MT6358_AFE_VOW_MON0 0x231a2213#define MT6358_AFE_VOW_MON1 0x231c2214#define MT6358_AFE_VOW_MON2 0x231e2215#define MT6358_AFE_VOW_MON3 0x23202216#define MT6358_AFE_VOW_MON4 0x23222217#define MT6358_AFE_VOW_MON5 0x23242218#define MT6358_AFE_VOW_SN_INI_CFG 0x23262219#define MT6358_AFE_VOW_TGEN_CFG0 0x23282220#define MT6358_AFE_VOW_POSDIV_CFG0 0x232a2221#define MT6358_AFE_VOW_HPF_CFG0 0x232c2222#define MT6358_AFE_VOW_PERIODIC_CFG0 0x232e2223#define MT6358_AFE_VOW_PERIODIC_CFG1 0x23302224#define MT6358_AFE_VOW_PERIODIC_CFG2 0x23322225#define MT6358_AFE_VOW_PERIODIC_CFG3 0x23342226#define MT6358_AFE_VOW_PERIODIC_CFG4 0x23362227#define MT6358_AFE_VOW_PERIODIC_CFG5 0x23382228#define MT6358_AFE_VOW_PERIODIC_CFG6 0x233a2229#define MT6358_AFE_VOW_PERIODIC_CFG7 0x233c2230#define MT6358_AFE_VOW_PERIODIC_CFG8 0x233e2231#define MT6358_AFE_VOW_PERIODIC_CFG9 0x23402232#define MT6358_AFE_VOW_PERIODIC_CFG10 0x23422233#define MT6358_AFE_VOW_PERIODIC_CFG11 0x23442234#define MT6358_AFE_VOW_PERIODIC_CFG12 0x23462235#define MT6358_AFE_VOW_PERIODIC_CFG13 0x23482236#define MT6358_AFE_VOW_PERIODIC_CFG14 0x234a2237#define MT6358_AFE_VOW_PERIODIC_CFG15 0x234c2238#define MT6358_AFE_VOW_PERIODIC_CFG16 0x234e2239#define MT6358_AFE_VOW_PERIODIC_CFG17 0x23502240#define MT6358_AFE_VOW_PERIODIC_CFG18 0x23522241#define MT6358_AFE_VOW_PERIODIC_CFG19 0x23542242#define MT6358_AFE_VOW_PERIODIC_CFG20 0x23562243#define MT6358_AFE_VOW_PERIODIC_CFG21 0x23582244#define MT6358_AFE_VOW_PERIODIC_CFG22 0x235a2245#define MT6358_AFE_VOW_PERIODIC_CFG23 0x235c2246#define MT6358_AFE_VOW_PERIODIC_MON0 0x235e2247#define MT6358_AFE_VOW_PERIODIC_MON1 0x23602248#define MT6358_AUDENC_DSN_ID 0x23802249#define MT6358_AUDENC_DSN_REV0 0x23822250#define MT6358_AUDENC_DSN_DBI 0x23842251#define MT6358_AUDENC_DSN_FPI 0x23862252#define MT6358_AUDENC_ANA_CON0 0x23882253#define MT6358_AUDENC_ANA_CON1 0x238a2254#define MT6358_AUDENC_ANA_CON2 0x238c2255#define MT6358_AUDENC_ANA_CON3 0x238e2256#define MT6358_AUDENC_ANA_CON4 0x23902257#define MT6358_AUDENC_ANA_CON5 0x23922258#define MT6358_AUDENC_ANA_CON6 0x23942259#define MT6358_AUDENC_ANA_CON7 0x23962260#define MT6358_AUDENC_ANA_CON8 0x23982261#define MT6358_AUDENC_ANA_CON9 0x239a2262#define MT6358_AUDENC_ANA_CON10 0x239c2263#define MT6358_AUDENC_ANA_CON11 0x239e2264#define MT6358_AUDENC_ANA_CON12 0x23a02265#define MT6358_AUDDEC_DSN_ID 0x24002266#define MT6358_AUDDEC_DSN_REV0 0x24022267#define MT6358_AUDDEC_DSN_DBI 0x24042268#define MT6358_AUDDEC_DSN_FPI 0x24062269#define MT6358_AUDDEC_ANA_CON0 0x24082270#define MT6358_AUDDEC_ANA_CON1 0x240a2271#define MT6358_AUDDEC_ANA_CON2 0x240c2272#define MT6358_AUDDEC_ANA_CON3 0x240e2273#define MT6358_AUDDEC_ANA_CON4 0x24102274#define MT6358_AUDDEC_ANA_CON5 0x24122275#define MT6358_AUDDEC_ANA_CON6 0x24142276#define MT6358_AUDDEC_ANA_CON7 0x24162277#define MT6358_AUDDEC_ANA_CON8 0x24182278#define MT6358_AUDDEC_ANA_CON9 0x241a2279#define MT6358_AUDDEC_ANA_CON10 0x241c2280#define MT6358_AUDDEC_ANA_CON11 0x241e2281#define MT6358_AUDDEC_ANA_CON12 0x24202282#define MT6358_AUDDEC_ANA_CON13 0x24222283#define MT6358_AUDDEC_ANA_CON14 0x24242284#define MT6358_AUDDEC_ANA_CON15 0x24262285#define MT6358_AUDDEC_ELR_NUM 0x24282286#define MT6358_AUDDEC_ELR_0 0x242a2287#define MT6358_AUDZCD_DSN_ID 0x24802288#define MT6358_AUDZCD_DSN_REV0 0x24822289#define MT6358_AUDZCD_DSN_DBI 0x24842290#define MT6358_AUDZCD_DSN_FPI 0x24862291#define MT6358_ZCD_CON0 0x24882292#define MT6358_ZCD_CON1 0x248a2293#define MT6358_ZCD_CON2 0x248c2294#define MT6358_ZCD_CON3 0x248e2295#define MT6358_ZCD_CON4 0x24902296#define MT6358_ZCD_CON5 0x24922297#define MT6358_ACCDET_CON13 0x25222298 2299#define MT6358_MAX_REGISTER MT6358_ZCD_CON52300 2301enum {2302 MT6358_MTKAIF_PROTOCOL_1 = 0,2303 MT6358_MTKAIF_PROTOCOL_2,2304 MT6358_MTKAIF_PROTOCOL_2_CLK_P2,2305};2306 2307/* set only during init */2308int mt6358_set_mtkaif_protocol(struct snd_soc_component *cmpnt,2309 int mtkaif_protocol);2310int mt6358_mtkaif_calibration_enable(struct snd_soc_component *cmpnt);2311int mt6358_mtkaif_calibration_disable(struct snd_soc_component *cmpnt);2312int mt6358_set_mtkaif_calibration_phase(struct snd_soc_component *cmpnt,2313 int phase_1, int phase_2);2314#endif /* __MT6358_H__ */2315