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1/* SPDX-License-Identifier: GPL-2.0 */2/*3 * Copyright (c) 2019 MediaTek Inc.4 */5 6#ifndef __SND_SOC_MT6660_H7#define __SND_SOC_MT6660_H8 9#include <linux/mutex.h>10#include <linux/regmap.h>11 12#pragma pack(push, 1)13struct mt6660_platform_data {14 u8 init_setting_num;15 u32 *init_setting_addr;16 u32 *init_setting_mask;17 u32 *init_setting_val;18};19 20struct mt6660_chip {21 struct i2c_client *i2c;22 struct device *dev;23 struct platform_device *param_dev;24 struct mt6660_platform_data plat_data;25 struct mutex io_lock;26 struct regmap *regmap;27 u16 chip_rev;28};29#pragma pack(pop)30 31#define MT6660_REG_DEVID (0x00)32#define MT6660_REG_SYSTEM_CTRL (0x03)33#define MT6660_REG_IRQ_STATUS1 (0x05)34#define MT6660_REG_ADDA_CLOCK (0x07)35#define MT6660_REG_SERIAL_CFG1 (0x10)36#define MT6660_REG_DATAO_SEL (0x12)37#define MT6660_REG_TDM_CFG3 (0x15)38#define MT6660_REG_HPF_CTRL (0x18)39#define MT6660_REG_HPF1_COEF (0x1A)40#define MT6660_REG_HPF2_COEF (0x1B)41#define MT6660_REG_PATH_BYPASS (0x1E)42#define MT6660_REG_WDT_CTRL (0x20)43#define MT6660_REG_HCLIP_CTRL (0x24)44#define MT6660_REG_VOL_CTRL (0x29)45#define MT6660_REG_SPS_CTRL (0x30)46#define MT6660_REG_SIGMAX (0x33)47#define MT6660_REG_CALI_T0 (0x3F)48#define MT6660_REG_BST_CTRL (0x40)49#define MT6660_REG_PROTECTION_CFG (0x46)50#define MT6660_REG_DA_GAIN (0x4c)51#define MT6660_REG_AUDIO_IN2_SEL (0x50)52#define MT6660_REG_SIG_GAIN (0x51)53#define MT6660_REG_PLL_CFG1 (0x60)54#define MT6660_REG_DRE_CTRL (0x68)55#define MT6660_REG_DRE_THDMODE (0x69)56#define MT6660_REG_DRE_CORASE (0x6B)57#define MT6660_REG_PWM_CTRL (0x70)58#define MT6660_REG_DC_PROTECT_CTRL (0x74)59#define MT6660_REG_ADC_USB_MODE (0x7c)60#define MT6660_REG_INTERNAL_CFG (0x88)61#define MT6660_REG_RESV0 (0x98)62#define MT6660_REG_RESV1 (0x99)63#define MT6660_REG_RESV2 (0x9A)64#define MT6660_REG_RESV3 (0x9B)65#define MT6660_REG_RESV6 (0xA2)66#define MT6660_REG_RESV7 (0xA3)67#define MT6660_REG_RESV10 (0xB0)68#define MT6660_REG_RESV11 (0xB1)69#define MT6660_REG_RESV16 (0xB6)70#define MT6660_REG_RESV17 (0xB7)71#define MT6660_REG_RESV19 (0xB9)72#define MT6660_REG_RESV21 (0xBB)73#define MT6660_REG_RESV23 (0xBD)74#define MT6660_REG_RESV31 (0xD3)75#define MT6660_REG_RESV40 (0xE0)76 77#endif /* __SND_SOC_MT6660_H */78