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1/* SPDX-License-Identifier: GPL-2.0 */2/*3 * PCM3060 codec driver4 *5 * Copyright (C) 2018 Kirill Marinushkin <k.marinushkin@gmail.com>6 */7 8#ifndef _SND_SOC_PCM3060_H9#define _SND_SOC_PCM3060_H10 11#include <linux/device.h>12#include <linux/regmap.h>13 14extern const struct regmap_config pcm3060_regmap;15 16#define PCM3060_DAI_ID_DAC 017#define PCM3060_DAI_ID_ADC 118#define PCM3060_DAI_IDS_NUM 219 20/* ADC and DAC can be clocked from separate or same sources CLK1 and CLK2 */21#define PCM3060_CLK_DEF 0 /* default: CLK1->ADC, CLK2->DAC */22#define PCM3060_CLK1 123#define PCM3060_CLK2 224 25struct pcm3060_priv_dai {26 bool is_provider;27 unsigned int sclk_freq;28};29 30struct pcm3060_priv {31 struct regmap *regmap;32 struct pcm3060_priv_dai dai[PCM3060_DAI_IDS_NUM];33 u8 out_se: 1;34};35 36int pcm3060_probe(struct device *dev);37int pcm3060_remove(struct device *dev);38 39/* registers */40 41#define PCM3060_REG64 0x4042#define PCM3060_REG_MRST 0x8043#define PCM3060_REG_SRST 0x4044#define PCM3060_REG_ADPSV 0x2045#define PCM3060_REG_SHIFT_ADPSV 0x0546#define PCM3060_REG_DAPSV 0x1047#define PCM3060_REG_SHIFT_DAPSV 0x0448#define PCM3060_REG_SE 0x0149 50#define PCM3060_REG65 0x4151#define PCM3060_REG66 0x4252#define PCM3060_REG_AT2_MIN 0x3653#define PCM3060_REG_AT2_MAX 0xFF54 55#define PCM3060_REG67 0x4356#define PCM3060_REG72 0x4857#define PCM3060_REG_CSEL 0x8058#define PCM3060_REG_MASK_MS 0x7059#define PCM3060_REG_MS_S 0x0060#define PCM3060_REG_MS_M768 (0x01 << 4)61#define PCM3060_REG_MS_M512 (0x02 << 4)62#define PCM3060_REG_MS_M384 (0x03 << 4)63#define PCM3060_REG_MS_M256 (0x04 << 4)64#define PCM3060_REG_MS_M192 (0x05 << 4)65#define PCM3060_REG_MS_M128 (0x06 << 4)66#define PCM3060_REG_MASK_FMT 0x0367#define PCM3060_REG_FMT_I2S 0x0068#define PCM3060_REG_FMT_LJ 0x0169#define PCM3060_REG_FMT_RJ 0x0270 71#define PCM3060_REG68 0x4472#define PCM3060_REG_OVER 0x4073#define PCM3060_REG_DREV2 0x0474#define PCM3060_REG_SHIFT_MUT21 0x0075#define PCM3060_REG_SHIFT_MUT22 0x0176 77#define PCM3060_REG69 0x4578#define PCM3060_REG_FLT 0x8079#define PCM3060_REG_MASK_DMF 0x6080#define PCM3060_REG_DMC 0x1081#define PCM3060_REG_ZREV 0x0282#define PCM3060_REG_AZRO 0x0183 84#define PCM3060_REG70 0x4685#define PCM3060_REG71 0x4786#define PCM3060_REG_AT1_MIN 0x0E87#define PCM3060_REG_AT1_MAX 0xFF88 89#define PCM3060_REG73 0x4990#define PCM3060_REG_ZCDD 0x1091#define PCM3060_REG_BYP 0x0892#define PCM3060_REG_DREV1 0x0493#define PCM3060_REG_SHIFT_MUT11 0x0094#define PCM3060_REG_SHIFT_MUT12 0x0195 96#endif /* _SND_SOC_PCM3060_H */97