705 lines · c
1/* SPDX-License-Identifier: GPL-2.0 */2/*3 * rt1011.h -- RT1011 ALSA SoC amplifier component driver header4 *5 * Copyright(c) 2019 Realtek Semiconductor Corp.6 */7 8#ifndef _RT1011_H_9#define _RT1011_H_10 11#define RT1011_DEVICE_ID_NUM 0x101112 13#define RT1011_RESET 0x000014#define RT1011_CLK_1 0x000215#define RT1011_CLK_2 0x000416#define RT1011_CLK_3 0x000617#define RT1011_CLK_4 0x000818#define RT1011_PLL_1 0x000a19#define RT1011_PLL_2 0x000c20#define RT1011_SRC_1 0x000e21#define RT1011_SRC_2 0x001022#define RT1011_SRC_3 0x001223#define RT1011_CLK_DET 0x002024#define RT1011_SIL_DET 0x002225#define RT1011_PRIV_INDEX 0x006a26#define RT1011_PRIV_DATA 0x006c27#define RT1011_CUSTOMER_ID 0x007628#define RT1011_FM_VER 0x007829#define RT1011_VERSION_ID 0x007a30#define RT1011_VENDOR_ID 0x007c31#define RT1011_DEVICE_ID 0x007d32#define RT1011_DUM_RW_0 0x00f033#define RT1011_DUM_YUN 0x00f234#define RT1011_DUM_RW_1 0x00f335#define RT1011_DUM_RO 0x00f436#define RT1011_MAN_I2C_DEV 0x010037#define RT1011_DAC_SET_1 0x010238#define RT1011_DAC_SET_2 0x010439#define RT1011_DAC_SET_3 0x010640#define RT1011_ADC_SET 0x010741#define RT1011_ADC_SET_1 0x010842#define RT1011_ADC_SET_2 0x010a43#define RT1011_ADC_SET_3 0x010c44#define RT1011_ADC_SET_4 0x010e45#define RT1011_ADC_SET_5 0x011046#define RT1011_TDM_TOTAL_SET 0x011147#define RT1011_TDM1_SET_TCON 0x011248#define RT1011_TDM1_SET_1 0x011449#define RT1011_TDM1_SET_2 0x011650#define RT1011_TDM1_SET_3 0x011851#define RT1011_TDM1_SET_4 0x011a52#define RT1011_TDM1_SET_5 0x011c53#define RT1011_TDM2_SET_1 0x011e54#define RT1011_TDM2_SET_2 0x012055#define RT1011_TDM2_SET_3 0x012256#define RT1011_TDM2_SET_4 0x012457#define RT1011_TDM2_SET_5 0x012658#define RT1011_PWM_CAL 0x020059#define RT1011_MIXER_1 0x030060#define RT1011_MIXER_2 0x030261#define RT1011_ADRC_LIMIT 0x031062#define RT1011_A_PRO 0x031163#define RT1011_A_TIMING_1 0x031364#define RT1011_A_TIMING_2 0x031465#define RT1011_A_TEMP_SEN 0x031666#define RT1011_SPK_VOL_DET_1 0x031967#define RT1011_SPK_VOL_DET_2 0x031a68#define RT1011_SPK_VOL_TEST_OUT 0x031b69#define RT1011_VBAT_VOL_DET_1 0x031c70#define RT1011_VBAT_VOL_DET_2 0x031d71#define RT1011_VBAT_TEST_OUT_1 0x031e72#define RT1011_VBAT_TEST_OUT_2 0x031f73#define RT1011_VBAT_PROTECTION 0x032074#define RT1011_VBAT_DET 0x032175#define RT1011_POWER_1 0x032276#define RT1011_POWER_2 0x032477#define RT1011_POWER_3 0x032678#define RT1011_POWER_4 0x032879#define RT1011_POWER_5 0x032980#define RT1011_POWER_6 0x032a81#define RT1011_POWER_7 0x032b82#define RT1011_POWER_8 0x032c83#define RT1011_POWER_9 0x032d84#define RT1011_CLASS_D_POS 0x032e85#define RT1011_BOOST_CON_1 0x033086#define RT1011_BOOST_CON_2 0x033287#define RT1011_ANALOG_CTRL 0x033488#define RT1011_POWER_SEQ 0x034089#define RT1011_SHORT_CIRCUIT_DET_1 0x050890#define RT1011_SHORT_CIRCUIT_DET_2 0x050a91#define RT1011_SPK_TEMP_PROTECT_0 0x050c92#define RT1011_SPK_TEMP_PROTECT_1 0x050d93#define RT1011_SPK_TEMP_PROTECT_2 0x050e94#define RT1011_SPK_TEMP_PROTECT_3 0x050f95#define RT1011_SPK_TEMP_PROTECT_4 0x051096#define RT1011_SPK_TEMP_PROTECT_5 0x051197#define RT1011_SPK_TEMP_PROTECT_6 0x051298#define RT1011_SPK_TEMP_PROTECT_7 0x051699#define RT1011_SPK_TEMP_PROTECT_8 0x0517100#define RT1011_SPK_TEMP_PROTECT_9 0x0518101#define RT1011_SPK_PRO_DC_DET_1 0x0519102#define RT1011_SPK_PRO_DC_DET_2 0x051a103#define RT1011_SPK_PRO_DC_DET_3 0x051b104#define RT1011_SPK_PRO_DC_DET_4 0x051c105#define RT1011_SPK_PRO_DC_DET_5 0x051d106#define RT1011_SPK_PRO_DC_DET_6 0x051e107#define RT1011_SPK_PRO_DC_DET_7 0x051f108#define RT1011_SPK_PRO_DC_DET_8 0x0520109#define RT1011_SPL_1 0x0521110#define RT1011_SPL_2 0x0522111#define RT1011_SPL_3 0x0524112#define RT1011_SPL_4 0x0526113#define RT1011_THER_FOLD_BACK_1 0x0528114#define RT1011_THER_FOLD_BACK_2 0x052a115#define RT1011_EXCUR_PROTECT_1 0x0530116#define RT1011_EXCUR_PROTECT_2 0x0532117#define RT1011_EXCUR_PROTECT_3 0x0534118#define RT1011_EXCUR_PROTECT_4 0x0535119#define RT1011_BAT_GAIN_1 0x0536120#define RT1011_BAT_GAIN_2 0x0538121#define RT1011_BAT_GAIN_3 0x053a122#define RT1011_BAT_GAIN_4 0x053c123#define RT1011_BAT_GAIN_5 0x053d124#define RT1011_BAT_GAIN_6 0x053e125#define RT1011_BAT_GAIN_7 0x053f126#define RT1011_BAT_GAIN_8 0x0540127#define RT1011_BAT_GAIN_9 0x0541128#define RT1011_BAT_GAIN_10 0x0542129#define RT1011_BAT_GAIN_11 0x0543130#define RT1011_BAT_RT_THMAX_1 0x0544131#define RT1011_BAT_RT_THMAX_2 0x0545132#define RT1011_BAT_RT_THMAX_3 0x0546133#define RT1011_BAT_RT_THMAX_4 0x0547134#define RT1011_BAT_RT_THMAX_5 0x0548135#define RT1011_BAT_RT_THMAX_6 0x0549136#define RT1011_BAT_RT_THMAX_7 0x054a137#define RT1011_BAT_RT_THMAX_8 0x054b138#define RT1011_BAT_RT_THMAX_9 0x054c139#define RT1011_BAT_RT_THMAX_10 0x054d140#define RT1011_BAT_RT_THMAX_11 0x054e141#define RT1011_BAT_RT_THMAX_12 0x054f142#define RT1011_SPREAD_SPECTURM 0x0568143#define RT1011_PRO_GAIN_MODE 0x056a144#define RT1011_RT_DRC_CROSS 0x0600145#define RT1011_RT_DRC_HB_1 0x0611146#define RT1011_RT_DRC_HB_2 0x0612147#define RT1011_RT_DRC_HB_3 0x0613148#define RT1011_RT_DRC_HB_4 0x0614149#define RT1011_RT_DRC_HB_5 0x0615150#define RT1011_RT_DRC_HB_6 0x0616151#define RT1011_RT_DRC_HB_7 0x0617152#define RT1011_RT_DRC_HB_8 0x0618153#define RT1011_RT_DRC_BB_1 0x0621154#define RT1011_RT_DRC_BB_2 0x0622155#define RT1011_RT_DRC_BB_3 0x0623156#define RT1011_RT_DRC_BB_4 0x0624157#define RT1011_RT_DRC_BB_5 0x0625158#define RT1011_RT_DRC_BB_6 0x0626159#define RT1011_RT_DRC_BB_7 0x0627160#define RT1011_RT_DRC_BB_8 0x0628161#define RT1011_RT_DRC_POS_1 0x0631162#define RT1011_RT_DRC_POS_2 0x0632163#define RT1011_RT_DRC_POS_3 0x0633164#define RT1011_RT_DRC_POS_4 0x0634165#define RT1011_RT_DRC_POS_5 0x0635166#define RT1011_RT_DRC_POS_6 0x0636167#define RT1011_RT_DRC_POS_7 0x0637168#define RT1011_RT_DRC_POS_8 0x0638169#define RT1011_CROSS_BQ_SET_1 0x0702170#define RT1011_CROSS_BQ_SET_2 0x0704171#define RT1011_BQ_SET_0 0x0706172#define RT1011_BQ_SET_1 0x0708173#define RT1011_BQ_SET_2 0x070a174#define RT1011_BQ_PRE_GAIN_28_16 0x0710175#define RT1011_BQ_PRE_GAIN_15_0 0x0711176#define RT1011_BQ_POST_GAIN_28_16 0x0712177#define RT1011_BQ_POST_GAIN_15_0 0x0713178 179#define RT1011_BQ_H0_28_16 0x0720180#define RT1011_BQ_A2_15_0 0x0729181#define RT1011_BQ_1_H0_28_16 0x0730182#define RT1011_BQ_1_A2_15_0 0x0739183#define RT1011_BQ_2_H0_28_16 0x0740184#define RT1011_BQ_2_A2_15_0 0x0749185#define RT1011_BQ_3_H0_28_16 0x0750186#define RT1011_BQ_3_A2_15_0 0x0759187#define RT1011_BQ_4_H0_28_16 0x0760188#define RT1011_BQ_4_A2_15_0 0x0769189#define RT1011_BQ_5_H0_28_16 0x0770190#define RT1011_BQ_5_A2_15_0 0x0779191#define RT1011_BQ_6_H0_28_16 0x0780192#define RT1011_BQ_6_A2_15_0 0x0789193#define RT1011_BQ_7_H0_28_16 0x0790194#define RT1011_BQ_7_A2_15_0 0x0799195#define RT1011_BQ_8_H0_28_16 0x07a0196#define RT1011_BQ_8_A2_15_0 0x07a9197#define RT1011_BQ_9_H0_28_16 0x07b0198#define RT1011_BQ_9_A2_15_0 0x07b9199#define RT1011_BQ_10_H0_28_16 0x07c0200#define RT1011_BQ_10_A2_15_0 0x07c9201#define RT1011_TEST_PAD_STATUS 0x1000202#define RT1011_SYSTEM_RESET_1 0x1007203#define RT1011_SYSTEM_RESET_2 0x1008204#define RT1011_SYSTEM_RESET_3 0x1009205#define RT1011_ADCDAT_OUT_SOURCE 0x100D206#define RT1011_PLL_INTERNAL_SET 0x1010207#define RT1011_TEST_OUT_1 0x1020208#define RT1011_TEST_OUT_3 0x1024209#define RT1011_DC_CALIB_CLASSD_1 0x1200210#define RT1011_DC_CALIB_CLASSD_2 0x1202211#define RT1011_DC_CALIB_CLASSD_3 0x1204212#define RT1011_DC_CALIB_CLASSD_5 0x1208213#define RT1011_DC_CALIB_CLASSD_6 0x120a214#define RT1011_DC_CALIB_CLASSD_7 0x120c215#define RT1011_DC_CALIB_CLASSD_8 0x120e216#define RT1011_DC_CALIB_CLASSD_10 0x1212217#define RT1011_CLASSD_INTERNAL_SET_1 0x1300218#define RT1011_CLASSD_INTERNAL_SET_3 0x1304219#define RT1011_CLASSD_INTERNAL_SET_8 0x130c220#define RT1011_VREF_LV_1 0x131a221#define RT1011_SMART_BOOST_TIMING_1 0x1322222#define RT1011_SMART_BOOST_TIMING_36 0x1349223#define RT1011_SINE_GEN_REG_1 0x1500224#define RT1011_SINE_GEN_REG_2 0x1502225#define RT1011_SINE_GEN_REG_3 0x1504226#define RT1011_STP_INITIAL_RS_TEMP 0x1510227#define RT1011_STP_CALIB_RS_TEMP 0x152a228#define RT1011_INIT_RECIPROCAL_REG_24_16 0x1538229#define RT1011_INIT_RECIPROCAL_REG_15_0 0x1539230#define RT1011_STP_INITIAL_RESISTANCE_TEMP 0x153c231#define RT1011_STP_ALPHA_RECIPROCAL_MSB 0x153e232#define RT1011_SPK_RESISTANCE_1 0x1544233#define RT1011_SPK_RESISTANCE_2 0x1546234#define RT1011_SPK_THERMAL 0x1548235#define RT1011_STP_OTP_TH 0x1552236#define RT1011_ALC_BK_GAIN_O 0x1554237#define RT1011_ALC_BK_GAIN_O_PRE 0x1556238#define RT1011_SPK_DC_O_23_16 0x155a239#define RT1011_SPK_DC_O_15_0 0x155c240#define RT1011_INIT_RECIPROCAL_SYN_24_16 0x1560241#define RT1011_INIT_RECIPROCAL_SYN_15_0 0x1562242#define RT1011_STP_BQ_1_A1_L_28_16 0x1570243#define RT1011_STP_BQ_1_H0_R_15_0 0x1583244#define RT1011_STP_BQ_2_A1_L_28_16 0x1590245#define RT1011_SPK_EXCURSION_23_16 0x15be246#define RT1011_SPK_EXCURSION_15_0 0x15bf247#define RT1011_SEP_MAIN_OUT_23_16 0x15c0248#define RT1011_SEP_MAIN_OUT_15_0 0x15c1249#define RT1011_SEP_RE_REG_15_0 0x15f9250#define RT1011_DRC_CF_PARAMS_1 0x1600251#define RT1011_DRC_CF_PARAMS_12 0x160b252#define RT1011_ALC_DRC_HB_INTERNAL_1 0x1611253#define RT1011_ALC_DRC_HB_INTERNAL_5 0x1615254#define RT1011_ALC_DRC_HB_INTERNAL_6 0x1616255#define RT1011_ALC_DRC_HB_INTERNAL_7 0x1617256#define RT1011_ALC_DRC_BB_INTERNAL_1 0x1621257#define RT1011_ALC_DRC_BB_INTERNAL_5 0x1625258#define RT1011_ALC_DRC_BB_INTERNAL_6 0x1626259#define RT1011_ALC_DRC_BB_INTERNAL_7 0x1627260#define RT1011_ALC_DRC_POS_INTERNAL_1 0x1631261#define RT1011_ALC_DRC_POS_INTERNAL_5 0x1635262#define RT1011_ALC_DRC_POS_INTERNAL_6 0x1636263#define RT1011_ALC_DRC_POS_INTERNAL_7 0x1637264#define RT1011_ALC_DRC_POS_INTERNAL_8 0x1638265#define RT1011_ALC_DRC_POS_INTERNAL_9 0x163a266#define RT1011_ALC_DRC_POS_INTERNAL_10 0x163c267#define RT1011_ALC_DRC_POS_INTERNAL_11 0x163e268#define RT1011_BQ_1_PARAMS_CHECK_5 0x1648269#define RT1011_BQ_2_PARAMS_CHECK_1 0x1650270#define RT1011_BQ_2_PARAMS_CHECK_5 0x1658271#define RT1011_BQ_3_PARAMS_CHECK_1 0x1660272#define RT1011_BQ_3_PARAMS_CHECK_5 0x1668273#define RT1011_BQ_4_PARAMS_CHECK_1 0x1670274#define RT1011_BQ_4_PARAMS_CHECK_5 0x1678275#define RT1011_BQ_5_PARAMS_CHECK_1 0x1680276#define RT1011_BQ_5_PARAMS_CHECK_5 0x1688277#define RT1011_BQ_6_PARAMS_CHECK_1 0x1690278#define RT1011_BQ_6_PARAMS_CHECK_5 0x1698279#define RT1011_BQ_7_PARAMS_CHECK_1 0x1700280#define RT1011_BQ_7_PARAMS_CHECK_5 0x1708281#define RT1011_BQ_8_PARAMS_CHECK_1 0x1710282#define RT1011_BQ_8_PARAMS_CHECK_5 0x1718283#define RT1011_BQ_9_PARAMS_CHECK_1 0x1720284#define RT1011_BQ_9_PARAMS_CHECK_5 0x1728285#define RT1011_BQ_10_PARAMS_CHECK_1 0x1730286#define RT1011_BQ_10_PARAMS_CHECK_5 0x1738287#define RT1011_IRQ_1 0x173a288#define RT1011_PART_NUMBER_EFUSE 0x173e289#define RT1011_EFUSE_CONTROL_1 0x17bb290#define RT1011_EFUSE_CONTROL_2 0x17bd291#define RT1011_EFUSE_MATCH_DONE 0x17cb292#define RT1011_EFUSE_ADC_OFFSET_18_16 0x17e5293#define RT1011_EFUSE_ADC_OFFSET_15_0 0x17e7294#define RT1011_EFUSE_DAC_OFFSET_G0_20_16 0x17e9295#define RT1011_EFUSE_DAC_OFFSET_G0_15_0 0x17eb296#define RT1011_EFUSE_DAC_OFFSET_G1_20_16 0x17ed297#define RT1011_EFUSE_DAC_OFFSET_G1_15_0 0x17ef298#define RT1011_EFUSE_READ_R0_3_15_0 0x1803299#define RT1011_MAX_REG 0x1803300#define RT1011_REG_DISP_LEN 23301 302 303/* CLOCK-2 (0x0004) */304#define RT1011_FS_SYS_PRE_MASK (0x3 << 14)305#define RT1011_FS_SYS_PRE_SFT 14306#define RT1011_FS_SYS_PRE_MCLK (0x0 << 14)307#define RT1011_FS_SYS_PRE_BCLK (0x1 << 14)308#define RT1011_FS_SYS_PRE_PLL1 (0x2 << 14)309#define RT1011_FS_SYS_PRE_RCCLK (0x3 << 14)310#define RT1011_PLL1_SRC_MASK (0x1 << 13)311#define RT1011_PLL1_SRC_SFT 13312#define RT1011_PLL1_SRC_PLL2 (0x0 << 13)313#define RT1011_PLL1_SRC_BCLK (0x1 << 13)314#define RT1011_PLL2_SRC_MASK (0x1 << 12)315#define RT1011_PLL2_SRC_SFT 12316#define RT1011_PLL2_SRC_MCLK (0x0 << 12)317#define RT1011_PLL2_SRC_RCCLK (0x1 << 12)318#define RT1011_PLL2_SRC_DIV_MASK (0x3 << 10)319#define RT1011_PLL2_SRC_DIV_SFT 10320#define RT1011_SRCIN_DIV_MASK (0x3 << 8)321#define RT1011_SRCIN_DIV_SFT 8322#define RT1011_FS_SYS_DIV_MASK (0x7 << 4)323#define RT1011_FS_SYS_DIV_SFT 4324 325/* PLL-1 (0x000a) */326#define RT1011_PLL1_QM_MASK (0xf << 12)327#define RT1011_PLL1_QM_SFT 12328#define RT1011_PLL1_BPM_MASK (0x1 << 11)329#define RT1011_PLL1_BPM_SFT 11330#define RT1011_PLL1_BPM (0x1 << 11)331#define RT1011_PLL1_QN_MASK (0x1ff << 0)332#define RT1011_PLL1_QN_SFT 0333 334/* PLL-2 (0x000c) */335#define RT1011_PLL2_BPK_MASK (0x1 << 5)336#define RT1011_PLL2_BPK_SFT 5337#define RT1011_PLL2_BPK (0x1 << 5)338#define RT1011_PLL2_QK_MASK (0x1f << 0)339#define RT1011_PLL2_QK_SFT 0340 341/* Clock Detect (0x0020) */342#define RT1011_EN_MCLK_DET_MASK (0x1 << 15)343#define RT1011_EN_MCLK_DET_SFT 15344#define RT1011_EN_MCLK_DET (0x1 << 15)345 346/* DAC Setting-2 (0x0104) */347#define RT1011_EN_CKGEN_DAC_MASK (0x1 << 13)348#define RT1011_EN_CKGEN_DAC_SFT 13349#define RT1011_EN_CKGEN_DAC (0x1 << 13)350 351/* DAC Setting-3 (0x0106) */352#define RT1011_DA_MUTE_EN_MASK (0x1 << 15)353#define RT1011_DA_MUTE_EN_SFT 15354 355/* ADC Setting-5 (0x0110) */356#define RT1011_AD_EN_CKGEN_ADC_MASK (0x1 << 9)357#define RT1011_AD_EN_CKGEN_ADC_SFT 9358#define RT1011_AD_EN_CKGEN_ADC (0x1 << 9)359 360/* TDM Total Setting (0x0111) */361#define RT1011_I2S_TDM_MS_MASK (0x1 << 14)362#define RT1011_I2S_TDM_MS_SFT 14363#define RT1011_I2S_TDM_MS_S (0x0 << 14)364#define RT1011_I2S_TDM_MS_M (0x1 << 14)365#define RT1011_I2S_TX_DL_MASK (0x7 << 8)366#define RT1011_I2S_TX_DL_SFT 8367#define RT1011_I2S_TX_DL_16B (0x0 << 8)368#define RT1011_I2S_TX_DL_20B (0x1 << 8)369#define RT1011_I2S_TX_DL_24B (0x2 << 8)370#define RT1011_I2S_TX_DL_32B (0x3 << 8)371#define RT1011_I2S_TX_DL_8B (0x4 << 8)372#define RT1011_I2S_RX_DL_MASK (0x7 << 5)373#define RT1011_I2S_RX_DL_SFT 5374#define RT1011_I2S_RX_DL_16B (0x0 << 5)375#define RT1011_I2S_RX_DL_20B (0x1 << 5)376#define RT1011_I2S_RX_DL_24B (0x2 << 5)377#define RT1011_I2S_RX_DL_32B (0x3 << 5)378#define RT1011_I2S_RX_DL_8B (0x4 << 5)379#define RT1011_ADCDAT1_PIN_CONFIG (0x1 << 4)380#define RT1011_ADCDAT1_OUTPUT (0x0 << 4)381#define RT1011_ADCDAT1_INPUT (0x1 << 4)382#define RT1011_ADCDAT2_PIN_CONFIG (0x1 << 3)383#define RT1011_ADCDAT2_OUTPUT (0x0 << 3)384#define RT1011_ADCDAT2_INPUT (0x1 << 3)385#define RT1011_I2S_TDM_DF_MASK (0x7 << 0)386#define RT1011_I2S_TDM_DF_SFT 0387#define RT1011_I2S_TDM_DF_I2S (0x0)388#define RT1011_I2S_TDM_DF_LEFT (0x1)389#define RT1011_I2S_TDM_DF_PCM_A (0x2)390#define RT1011_I2S_TDM_DF_PCM_B (0x3)391#define RT1011_I2S_TDM_DF_PCM_A_N (0x6)392#define RT1011_I2S_TDM_DF_PCM_B_N (0x7)393 394/* TDM_tcon Setting (0x0112) */395#define RT1011_TCON_DF_MASK (0x7 << 13)396#define RT1011_TCON_DF_SFT 13397#define RT1011_TCON_DF_I2S (0x0 << 13)398#define RT1011_TCON_DF_LEFT (0x1 << 13)399#define RT1011_TCON_DF_PCM_A (0x2 << 13)400#define RT1011_TCON_DF_PCM_B (0x3 << 13)401#define RT1011_TCON_DF_PCM_A_N (0x6 << 13)402#define RT1011_TCON_DF_PCM_B_N (0x7 << 13)403#define RT1011_TCON_BCLK_SEL_MASK (0x3 << 10)404#define RT1011_TCON_BCLK_SEL_SFT 10405#define RT1011_TCON_BCLK_SEL_32FS (0x0 << 10)406#define RT1011_TCON_BCLK_SEL_64FS (0x1 << 10)407#define RT1011_TCON_BCLK_SEL_128FS (0x2 << 10)408#define RT1011_TCON_BCLK_SEL_256FS (0x3 << 10)409#define RT1011_TCON_CH_LEN_MASK (0x3 << 5)410#define RT1011_TCON_CH_LEN_SFT 5411#define RT1011_TCON_CH_LEN_16B (0x0 << 5)412#define RT1011_TCON_CH_LEN_20B (0x1 << 5)413#define RT1011_TCON_CH_LEN_24B (0x2 << 5)414#define RT1011_TCON_CH_LEN_32B (0x3 << 5)415#define RT1011_TCON_BCLK_MST_MASK (0x1 << 4)416#define RT1011_TCON_BCLK_MST_SFT 4417#define RT1011_TCON_BCLK_MST_INV (0x1 << 4)418 419/* TDM1 Setting-1 (0x0114) */420#define RT1011_TDM_INV_BCLK_MASK (0x1 << 15)421#define RT1011_TDM_INV_BCLK_SFT 15422#define RT1011_TDM_INV_BCLK (0x1 << 15)423#define RT1011_I2S_CH_TX_MASK (0x3 << 10)424#define RT1011_I2S_CH_TX_SFT 10425#define RT1011_I2S_TX_2CH (0x0 << 10)426#define RT1011_I2S_TX_4CH (0x1 << 10)427#define RT1011_I2S_TX_6CH (0x2 << 10)428#define RT1011_I2S_TX_8CH (0x3 << 10)429#define RT1011_I2S_CH_RX_MASK (0x3 << 8)430#define RT1011_I2S_CH_RX_SFT 8431#define RT1011_I2S_RX_2CH (0x0 << 8)432#define RT1011_I2S_RX_4CH (0x1 << 8)433#define RT1011_I2S_RX_6CH (0x2 << 8)434#define RT1011_I2S_RX_8CH (0x3 << 8)435#define RT1011_I2S_LR_CH_SEL_MASK (0x1 << 7)436#define RT1011_I2S_LR_CH_SEL_SFT 7437#define RT1011_I2S_LEFT_CH_SEL (0x0 << 7)438#define RT1011_I2S_RIGHT_CH_SEL (0x1 << 7)439#define RT1011_I2S_CH_TX_LEN_MASK (0x7 << 4)440#define RT1011_I2S_CH_TX_LEN_SFT 4441#define RT1011_I2S_CH_TX_LEN_16B (0x0 << 4)442#define RT1011_I2S_CH_TX_LEN_20B (0x1 << 4)443#define RT1011_I2S_CH_TX_LEN_24B (0x2 << 4)444#define RT1011_I2S_CH_TX_LEN_32B (0x3 << 4)445#define RT1011_I2S_CH_TX_LEN_8B (0x4 << 4)446#define RT1011_I2S_CH_RX_LEN_MASK (0x7 << 0)447#define RT1011_I2S_CH_RX_LEN_SFT 0448#define RT1011_I2S_CH_RX_LEN_16B (0x0 << 0)449#define RT1011_I2S_CH_RX_LEN_20B (0x1 << 0)450#define RT1011_I2S_CH_RX_LEN_24B (0x2 << 0)451#define RT1011_I2S_CH_RX_LEN_32B (0x3 << 0)452#define RT1011_I2S_CH_RX_LEN_8B (0x4 << 0)453 454/* TDM1 Setting-2 (0x0116) */455#define RT1011_TDM_I2S_DOCK_ADCDAT_LEN_1_MASK (0x7 << 13)456#define RT1011_TDM_I2S_DOCK_ADCDAT_2CH (0x1 << 13)457#define RT1011_TDM_I2S_DOCK_ADCDAT_4CH (0x3 << 13)458#define RT1011_TDM_I2S_DOCK_ADCDAT_6CH (0x5 << 13)459#define RT1011_TDM_I2S_DOCK_ADCDAT_8CH (0x7 << 13)460#define RT1011_TDM_I2S_DOCK_EN_1_MASK (0x1 << 3)461#define RT1011_TDM_I2S_DOCK_EN_1_SFT 3462#define RT1011_TDM_I2S_DOCK_EN_1 (0x1 << 3)463#define RT1011_TDM_ADCDAT1_DATA_LOCATION (0x7 << 0)464 465/* TDM1 Setting-3 (0x0118) */466#define RT1011_TDM_I2S_RX_ADC1_1_MASK (0x3 << 6)467#define RT1011_TDM_I2S_RX_ADC2_1_MASK (0x3 << 4)468#define RT1011_TDM_I2S_RX_ADC3_1_MASK (0x3 << 2)469#define RT1011_TDM_I2S_RX_ADC4_1_MASK (0x3 << 0)470#define RT1011_TDM_I2S_RX_ADC1_1_LL (0x2 << 6)471#define RT1011_TDM_I2S_RX_ADC2_1_LL (0x2 << 4)472#define RT1011_TDM_I2S_RX_ADC3_1_LL (0x2 << 2)473#define RT1011_TDM_I2S_RX_ADC4_1_LL (0x2 << 0)474 475/* TDM1 Setting-4 (0x011a) */476#define RT1011_TDM_I2S_TX_L_DAC1_1_MASK (0x7 << 12)477#define RT1011_TDM_I2S_TX_R_DAC1_1_MASK (0x7 << 8)478#define RT1011_TDM_I2S_TX_L_DAC1_1_SFT 12479#define RT1011_TDM_I2S_TX_R_DAC1_1_SFT 8480 481/* TDM2 Setting-2 (0x0120) */482#define RT1011_TDM_I2S_DOCK_ADCDAT_LEN_2_MASK (0x7 << 13)483#define RT1011_TDM_I2S_DOCK_EN_2_MASK (0x1 << 3)484#define RT1011_TDM_I2S_DOCK_EN_2_SFT 3485#define RT1011_TDM_I2S_DOCK_EN_2 (0x1 << 3)486 487/* MIXER 1 (0x0300) */488#define RT1011_MIXER_MUTE_MIX_I_MASK (0x1 << 15)489#define RT1011_MIXER_MUTE_MIX_I_SFT 15490#define RT1011_MIXER_MUTE_MIX_I (0x1 << 15)491#define RT1011_MIXER_MUTE_SUM_I_MASK (0x1 << 14)492#define RT1011_MIXER_MUTE_SUM_I_SFT 14493#define RT1011_MIXER_MUTE_SUM_I (0x1 << 14)494#define RT1011_MIXER_MUTE_MIX_V_MASK (0x1 << 7)495#define RT1011_MIXER_MUTE_MIX_V_SFT 7496#define RT1011_MIXER_MUTE_MIX_V (0x1 << 7)497#define RT1011_MIXER_MUTE_SUM_V_MASK (0x1 << 6)498#define RT1011_MIXER_MUTE_SUM_V_SFT 6499#define RT1011_MIXER_MUTE_SUM_V (0x1 << 6)500 501/* Analog Temperature Sensor (0x0316) */502#define RT1011_POW_TEMP_REG (0x1 << 2)503#define RT1011_POW_TEMP_REG_BIT 2504 505/* POWER-1 (0x0322) */506#define RT1011_POW_LDO2 (0x1 << 15)507#define RT1011_POW_LDO2_BIT 15508#define RT1011_POW_DAC (0x1 << 14)509#define RT1011_POW_DAC_BIT 14510#define RT1011_POW_CLK12M (0x1 << 13)511#define RT1011_POW_CLK12M_BIT 13512#define RT1011_POW_TEMP (0x1 << 12)513#define RT1011_POW_TEMP_BIT 12514#define RT1011_POW_ISENSE_SPK (0x1 << 7)515#define RT1011_POW_ISENSE_SPK_BIT 7516#define RT1011_POW_LPF_SPK (0x1 << 6)517#define RT1011_POW_LPF_SPK_BIT 6518#define RT1011_POW_VSENSE_SPK (0x1 << 5)519#define RT1011_POW_VSENSE_SPK_BIT 5520#define RT1011_POW_TWO_BATTERY_SPK (0x1 << 4)521#define RT1011_POW_TWO_BATTERY_SPK_BIT 4522 523/* POWER-2 (0x0324) */524#define RT1011_PLLEN (0x1 << 2)525#define RT1011_PLLEN_BIT 2526#define RT1011_POW_BG (0x1 << 1)527#define RT1011_POW_BG_BIT 1528#define RT1011_POW_BG_MBIAS_LV (0x1 << 0)529#define RT1011_POW_BG_MBIAS_LV_BIT 0530 531/* POWER-3 (0x0326) */532#define RT1011_POW_DET_SPKVDD (0x1 << 15)533#define RT1011_POW_DET_SPKVDD_BIT 15534#define RT1011_POW_DET_VBAT (0x1 << 14)535#define RT1011_POW_DET_VBAT_BIT 14536#define RT1011_POW_FC (0x1 << 13)537#define RT1011_POW_FC_BIT 13538#define RT1011_POW_MBIAS_LV (0x1 << 12)539#define RT1011_POW_MBIAS_LV_BIT 12540#define RT1011_POW_ADC_I (0x1 << 11)541#define RT1011_POW_ADC_I_BIT 11542#define RT1011_POW_ADC_V (0x1 << 10)543#define RT1011_POW_ADC_V_BIT 10544#define RT1011_POW_ADC_T (0x1 << 9)545#define RT1011_POW_ADC_T_BIT 9546#define RT1011_POWD_ADC_T (0x1 << 8)547#define RT1011_POWD_ADC_T_BIT 8548#define RT1011_POW_MIX_I (0x1 << 7)549#define RT1011_POW_MIX_I_BIT 7550#define RT1011_POW_MIX_V (0x1 << 6)551#define RT1011_POW_MIX_V_BIT 6552#define RT1011_POW_SUM_I (0x1 << 5)553#define RT1011_POW_SUM_I_BIT 5554#define RT1011_POW_SUM_V (0x1 << 4)555#define RT1011_POW_SUM_V_BIT 4556#define RT1011_POW_MIX_T (0x1 << 2)557#define RT1011_POW_MIX_T_BIT 2558#define RT1011_BYPASS_MIX_T (0x1 << 1)559#define RT1011_BYPASS_MIX_T_BIT 1560#define RT1011_POW_VREF_LV (0x1 << 0)561#define RT1011_POW_VREF_LV_BIT 0562 563/* POWER-4 (0x0328) */564#define RT1011_POW_EN_SWR (0x1 << 12)565#define RT1011_POW_EN_SWR_BIT 12566#define RT1011_POW_EN_PASS_BGOK_SWR (0x1 << 10)567#define RT1011_POW_EN_PASS_BGOK_SWR_BIT 10568#define RT1011_POW_EN_PASS_VPOK_SWR (0x1 << 9)569#define RT1011_POW_EN_PASS_VPOK_SWR_BIT 9570 571/* POWER-9 (0x032d) */572#define RT1011_POW_SDB_REG_MASK (0x1 << 9)573#define RT1011_POW_SDB_REG_BIT 9574#define RT1011_POW_SDB_REG (0x1 << 9)575#define RT1011_POW_SEL_SDB_MODE_MASK (0x1 << 6)576#define RT1011_POW_SEL_SDB_MODE_BIT 6577#define RT1011_POW_SEL_SDB_MODE (0x1 << 6)578#define RT1011_POW_MNL_SDB_MASK (0x1 << 5)579#define RT1011_POW_MNL_SDB_BIT 5580#define RT1011_POW_MNL_SDB (0x1 << 5)581 582/* SPK Protection-Temperature Protection (0x050c) */583#define RT1011_STP_EN_MASK (0x1 << 15)584#define RT1011_STP_EN_BIT 15585#define RT1011_STP_EN (0x1 << 15)586#define RT1011_STP_RS_CLB_EN_MASK (0x1 << 14)587#define RT1011_STP_RS_CLB_EN_BIT 14588#define RT1011_STP_RS_CLB_EN (0x1 << 14)589 590/* SPK Protection-Temperature Protection-4 (0x0510) */591#define RT1011_STP_R0_SELECT_MASK (0x3 << 6)592#define RT1011_STP_R0_SELECT_EFUSE (0x0 << 6)593#define RT1011_STP_R0_SELECT_START_VAL (0x1 << 6)594#define RT1011_STP_R0_SELECT_REG (0x2 << 6)595#define RT1011_STP_R0_SELECT_FORCE_ZERO (0x3 << 6)596 597/* SPK Protection-Temperature Protection-6 (0x0512) */598#define RT1011_STP_R0_EN_MASK (0x1 << 7)599#define RT1011_STP_R0_EN_BIT 7600#define RT1011_STP_R0_EN (0x1 << 7)601#define RT1011_STP_T0_EN_MASK (0x1 << 6)602#define RT1011_STP_T0_EN_BIT 6603#define RT1011_STP_T0_EN (0x1 << 6)604 605/* Cross Biquad Setting-1 (0x0702) */606#define RT1011_MONO_LR_SEL_MASK (0x3 << 5)607#define RT1011_MONO_L_CHANNEL (0x0 << 5)608#define RT1011_MONO_R_CHANNEL (0x1 << 5)609#define RT1011_MONO_LR_MIX_CHANNEL (0x2 << 5)610 611/* ClassD Internal Setting-1 (0x1300) */612#define RT1011_DRIVER_READY_SPK (0x1 << 12)613#define RT1011_DRIVER_READY_SPK_BIT 12614#define RT1011_RECV_MODE_SPK_MASK (0x1 << 5)615#define RT1011_SPK_MODE (0x0 << 5)616#define RT1011_RECV_MODE (0x1 << 5)617#define RT1011_RECV_MODE_SPK_BIT 5618 619/* ClassD Internal Setting-3 (0x1304) */620#define RT1011_REG_GAIN_CLASSD_RI_SPK_MASK (0x7 << 12)621#define RT1011_REG_GAIN_CLASSD_RI_410K (0x0 << 12)622#define RT1011_REG_GAIN_CLASSD_RI_95K (0x1 << 12)623#define RT1011_REG_GAIN_CLASSD_RI_82P5K (0x2 << 12)624#define RT1011_REG_GAIN_CLASSD_RI_72P5K (0x3 << 12)625#define RT1011_REG_GAIN_CLASSD_RI_62P5K (0x4 << 12)626 627/* ClassD Internal Setting-8 (0x130c) */628#define RT1011_TM_PORPVDD_SPK (0x1 << 1)629#define RT1011_TM_PORPVDD_SPK_BIT 1630 631/* SPK Protection-Temperature Protection-SINE_GEN_REG-1 (0x1500) */632#define RT1011_STP_SIN_GEN_EN_MASK (0x1 << 13)633#define RT1011_STP_SIN_GEN_EN (0x1 << 13)634#define RT1011_STP_SIN_GEN_EN_BIT 13635 636 637/* System Clock Source */638enum {639 RT1011_FS_SYS_PRE_S_MCLK,640 RT1011_FS_SYS_PRE_S_BCLK,641 RT1011_FS_SYS_PRE_S_PLL1,642 RT1011_FS_SYS_PRE_S_RCCLK, /* 12M Hz */643};644 645/* PLL Source 1/2 */646enum {647 RT1011_PLL1_S_BCLK,648 RT1011_PLL2_S_MCLK,649 RT1011_PLL2_S_RCCLK, /* 12M Hz */650};651 652enum {653 RT1011_AIF1,654 RT1011_AIFS655};656 657enum {658 RT1011_I2S_REF_NONE,659 RT1011_I2S_REF_LEFT_CH,660 RT1011_I2S_REF_RIGHT_CH,661};662 663/* BiQual & DRC related settings */664#define RT1011_BQ_DRC_NUM 128665struct rt1011_bq_drc_params {666 unsigned short val;667 unsigned short reg;668#ifdef CONFIG_64BIT669 unsigned int reserved;670#endif671};672enum {673 RT1011_ADVMODE_INITIAL_SET,674 RT1011_ADVMODE_SEP_BQ_COEFF,675 RT1011_ADVMODE_EQ_BQ_COEFF,676 RT1011_ADVMODE_BQ_UI_COEFF,677 RT1011_ADVMODE_SMARTBOOST_COEFF,678 RT1011_ADVMODE_NUM,679};680 681struct rt1011_priv {682 struct snd_soc_component *component;683 struct regmap *regmap;684 struct work_struct cali_work;685 struct rt1011_bq_drc_params **bq_drc_params;686 687 int sysclk;688 int sysclk_src;689 int lrck;690 int bclk;691 int id;692 693 int pll_src;694 int pll_in;695 int pll_out;696 697 int bq_drc_set;698 unsigned int r0_reg, cali_done;699 unsigned int r0_calib, temperature_calib;700 int recv_spk_mode;701 int i2s_ref;702};703 704#endif /* end of _RT1011_H_ */705