450 lines · c
1// SPDX-License-Identifier: GPL-2.02//3// rt1015.h -- RT1015 ALSA SoC audio amplifier driver4//5// Copyright 2019 Realtek Semiconductor Corp.6// Author: Jack Yu <jack.yu@realtek.com>7//8// This program is free software; you can redistribute it and/or modify9// it under the terms of the GNU General Public License version 2 as10// published by the Free Software Foundation.11//12 13#ifndef __RT1015_H__14#define __RT1015_H__15#include <sound/rt1015.h>16 17#define RT1015_DEVICE_ID_VAL 0x101118#define RT1015_DEVICE_ID_VAL2 0x101519 20#define RT1015_RESET 0x000021#define RT1015_CLK2 0x000422#define RT1015_CLK3 0x000623#define RT1015_PLL1 0x000a24#define RT1015_PLL2 0x000c25#define RT1015_DUM_RW1 0x000e26#define RT1015_DUM_RW2 0x001027#define RT1015_DUM_RW3 0x001228#define RT1015_DUM_RW4 0x001429#define RT1015_DUM_RW5 0x001630#define RT1015_DUM_RW6 0x001831#define RT1015_CLK_DET 0x002032#define RT1015_SIL_DET 0x002233#define RT1015_CUSTOMER_ID 0x007634#define RT1015_PCODE_FWVER 0x007835#define RT1015_VER_ID 0x007a36#define RT1015_VENDOR_ID 0x007c37#define RT1015_DEVICE_ID 0x007d38#define RT1015_PAD_DRV1 0x00f039#define RT1015_PAD_DRV2 0x00f240#define RT1015_GAT_BOOST 0x00f341#define RT1015_PRO_ALT 0x00f442#define RT1015_OSCK_STA 0x00f643#define RT1015_MAN_I2C 0x010044#define RT1015_DAC1 0x010245#define RT1015_DAC2 0x010446#define RT1015_DAC3 0x010647#define RT1015_ADC1 0x010c48#define RT1015_ADC2 0x010e49#define RT1015_TDM_MASTER 0x011150#define RT1015_TDM_TCON 0x011251#define RT1015_TDM1_1 0x011452#define RT1015_TDM1_2 0x011653#define RT1015_TDM1_3 0x011854#define RT1015_TDM1_4 0x011a55#define RT1015_TDM1_5 0x011c56#define RT1015_MIXER1 0x030057#define RT1015_MIXER2 0x030258#define RT1015_ANA_PROTECT1 0x031159#define RT1015_ANA_CTRL_SEQ1 0x031360#define RT1015_ANA_CTRL_SEQ2 0x031461#define RT1015_VBAT_DET_DEB 0x031a62#define RT1015_VBAT_VOLT_DET1 0x031c63#define RT1015_VBAT_VOLT_DET2 0x031d64#define RT1015_VBAT_TEST_OUT1 0x031e65#define RT1015_VBAT_TEST_OUT2 0x031f66#define RT1015_VBAT_PROT_ATT 0x032067#define RT1015_VBAT_DET_CODE 0x032168#define RT1015_PWR1 0x032269#define RT1015_PWR4 0x032870#define RT1015_PWR5 0x032971#define RT1015_PWR6 0x032a72#define RT1015_PWR7 0x032b73#define RT1015_PWR8 0x032c74#define RT1015_PWR9 0x032d75#define RT1015_CLASSD_SEQ 0x032e76#define RT1015_SMART_BST_CTRL1 0x033077#define RT1015_SMART_BST_CTRL2 0x033278#define RT1015_ANA_CTRL1 0x033479#define RT1015_ANA_CTRL2 0x033680#define RT1015_PWR_STATE_CTRL 0x033881#define RT1015_MONO_DYNA_CTRL 0x04fa82#define RT1015_MONO_DYNA_CTRL1 0x04fc83#define RT1015_MONO_DYNA_CTRL2 0x04fe84#define RT1015_MONO_DYNA_CTRL3 0x050085#define RT1015_MONO_DYNA_CTRL4 0x050286#define RT1015_MONO_DYNA_CTRL5 0x050487#define RT1015_SPK_VOL 0x050688#define RT1015_SHORT_DETTOP1 0x050889#define RT1015_SHORT_DETTOP2 0x050a90#define RT1015_SPK_DC_DETECT1 0x051991#define RT1015_SPK_DC_DETECT2 0x051a92#define RT1015_SPK_DC_DETECT3 0x051b93#define RT1015_SPK_DC_DETECT4 0x051d94#define RT1015_SPK_DC_DETECT5 0x051f95#define RT1015_BAT_RPO_STEP1 0x053696#define RT1015_BAT_RPO_STEP2 0x053897#define RT1015_BAT_RPO_STEP3 0x053a98#define RT1015_BAT_RPO_STEP4 0x053c99#define RT1015_BAT_RPO_STEP5 0x053d100#define RT1015_BAT_RPO_STEP6 0x053e101#define RT1015_BAT_RPO_STEP7 0x053f102#define RT1015_BAT_RPO_STEP8 0x0540103#define RT1015_BAT_RPO_STEP9 0x0541104#define RT1015_BAT_RPO_STEP10 0x0542105#define RT1015_BAT_RPO_STEP11 0x0543106#define RT1015_BAT_RPO_STEP12 0x0544107#define RT1015_SPREAD_SPEC1 0x0568108#define RT1015_SPREAD_SPEC2 0x056a109#define RT1015_PAD_STATUS 0x1000110#define RT1015_PADS_PULLING_CTRL1 0x1002111#define RT1015_PADS_DRIVING 0x1006112#define RT1015_SYS_RST1 0x1007113#define RT1015_SYS_RST2 0x1009114#define RT1015_SYS_GATING1 0x100a115#define RT1015_TEST_MODE1 0x100c116#define RT1015_TEST_MODE2 0x100d117#define RT1015_TIMING_CTRL1 0x100e118#define RT1015_PLL_INT 0x1010119#define RT1015_TEST_OUT1 0x1020120#define RT1015_DC_CALIB_CLSD1 0x1200121#define RT1015_DC_CALIB_CLSD2 0x1202122#define RT1015_DC_CALIB_CLSD3 0x1204123#define RT1015_DC_CALIB_CLSD4 0x1206124#define RT1015_DC_CALIB_CLSD5 0x1208125#define RT1015_DC_CALIB_CLSD6 0x120a126#define RT1015_DC_CALIB_CLSD7 0x120c127#define RT1015_DC_CALIB_CLSD8 0x120e128#define RT1015_DC_CALIB_CLSD9 0x1210129#define RT1015_DC_CALIB_CLSD10 0x1212130#define RT1015_CLSD_INTERNAL1 0x1300131#define RT1015_CLSD_INTERNAL2 0x1302132#define RT1015_CLSD_INTERNAL3 0x1304133#define RT1015_CLSD_INTERNAL4 0x1305134#define RT1015_CLSD_INTERNAL5 0x1306135#define RT1015_CLSD_INTERNAL6 0x1308136#define RT1015_CLSD_INTERNAL7 0x130a137#define RT1015_CLSD_INTERNAL8 0x130c138#define RT1015_CLSD_INTERNAL9 0x130e139#define RT1015_CLSD_OCP_CTRL 0x130f140#define RT1015_VREF_LV 0x1310141#define RT1015_MBIAS1 0x1312142#define RT1015_MBIAS2 0x1314143#define RT1015_MBIAS3 0x1316144#define RT1015_MBIAS4 0x1318145#define RT1015_VREF_LV1 0x131a146#define RT1015_S_BST_TIMING_INTER1 0x1322147#define RT1015_S_BST_TIMING_INTER2 0x1323148#define RT1015_S_BST_TIMING_INTER3 0x1324149#define RT1015_S_BST_TIMING_INTER4 0x1325150#define RT1015_S_BST_TIMING_INTER5 0x1326151#define RT1015_S_BST_TIMING_INTER6 0x1327152#define RT1015_S_BST_TIMING_INTER7 0x1328153#define RT1015_S_BST_TIMING_INTER8 0x1329154#define RT1015_S_BST_TIMING_INTER9 0x132a155#define RT1015_S_BST_TIMING_INTER10 0x132b156#define RT1015_S_BST_TIMING_INTER11 0x1330157#define RT1015_S_BST_TIMING_INTER12 0x1331158#define RT1015_S_BST_TIMING_INTER13 0x1332159#define RT1015_S_BST_TIMING_INTER14 0x1333160#define RT1015_S_BST_TIMING_INTER15 0x1334161#define RT1015_S_BST_TIMING_INTER16 0x1335162#define RT1015_S_BST_TIMING_INTER17 0x1336163#define RT1015_S_BST_TIMING_INTER18 0x1337164#define RT1015_S_BST_TIMING_INTER19 0x1338165#define RT1015_S_BST_TIMING_INTER20 0x1339166#define RT1015_S_BST_TIMING_INTER21 0x133a167#define RT1015_S_BST_TIMING_INTER22 0x133b168#define RT1015_S_BST_TIMING_INTER23 0x133c169#define RT1015_S_BST_TIMING_INTER24 0x133d170#define RT1015_S_BST_TIMING_INTER25 0x133e171#define RT1015_S_BST_TIMING_INTER26 0x133f172#define RT1015_S_BST_TIMING_INTER27 0x1340173#define RT1015_S_BST_TIMING_INTER28 0x1341174#define RT1015_S_BST_TIMING_INTER29 0x1342175#define RT1015_S_BST_TIMING_INTER30 0x1343176#define RT1015_S_BST_TIMING_INTER31 0x1344177#define RT1015_S_BST_TIMING_INTER32 0x1345178#define RT1015_S_BST_TIMING_INTER33 0x1346179#define RT1015_S_BST_TIMING_INTER34 0x1347180#define RT1015_S_BST_TIMING_INTER35 0x1348181#define RT1015_S_BST_TIMING_INTER36 0x1349182 183/* 0x0004 */184#define RT1015_CLK_SYS_PRE_SEL_MASK (0x3 << 14)185#define RT1015_CLK_SYS_PRE_SEL_SFT 14186#define RT1015_CLK_SYS_PRE_SEL_MCLK (0x0 << 14)187#define RT1015_CLK_SYS_PRE_SEL_PLL (0x2 << 14)188#define RT1015_PLL_SEL_MASK (0x1 << 13)189#define RT1015_PLL_SEL_SFT 13190#define RT1015_PLL_SEL_PLL_SRC2 (0x0 << 13)191#define RT1015_PLL_SEL_BCLK (0x1 << 13)192#define RT1015_FS_PD_MASK (0x7 << 4)193#define RT1015_FS_PD_SFT 4194 195/* 0x000a */196#define RT1015_PLL_M_MAX 0xf197#define RT1015_PLL_M_MASK (RT1015_PLL_M_MAX << 12)198#define RT1015_PLL_M_SFT 12199#define RT1015_PLL_M_BP (0x1 << 11)200#define RT1015_PLL_M_BP_SFT 11201#define RT1015_PLL_N_MAX 0x1ff202#define RT1015_PLL_N_MASK (RT1015_PLL_N_MAX << 0)203#define RT1015_PLL_N_SFT 0204 205/* 0x000c */206#define RT1015_PLL_BPK_MASK (0x1 << 5)207#define RT1015_PLL_BPK (0x0 << 5)208#define RT1015_PLL_K_MAX 0x1f209#define RT1015_PLL_K_MASK (RT1015_PLL_K_MAX)210#define RT1015_PLL_K_SFT 0211 212/* 0x0020 */213#define RT1015_EN_BCLK_DET_MASK (0x1 << 15)214#define RT1015_EN_BCLK_DET (0x1 << 15)215#define RT1015_DIS_BCLK_DET (0x0 << 15)216 217/* 0x007a */218#define RT1015_ID_MASK 0xff219#define RT1015_ID_VERA 0x0220#define RT1015_ID_VERB 0x1221 222/* 0x00f2 */223#define RT1015_MONO_LR_SEL_MASK (0x3 << 4)224#define RT1015_MONO_L_CHANNEL (0x0 << 4)225#define RT1015_MONO_R_CHANNEL (0x1 << 4)226#define RT1015_MONO_LR_MIX_CHANNEL (0x2 << 4)227 228/* 0x0102 */229#define RT1015_DAC_VOL_MASK (0x7f << 9)230#define RT1015_DAC_VOL_SFT 9231 232/* 0x0104 */233#define RT1015_DAC_CLK (0x1 << 13)234#define RT1015_DAC_CLK_BIT 13235 236/* 0x0106 */237#define RT1015_DAC_MUTE_MASK (0x1 << 15)238#define RT1015_DA_MUTE_SFT 15239#define RT1015_DVOL_MUTE_FLAG_SFT 12240 241/* 0x0111 */242#define RT1015_TCON_TDM_MS_MASK (0x1 << 14)243#define RT1015_TCON_TDM_MS_SFT 14244#define RT1015_TCON_TDM_MS_S (0x0 << 14)245#define RT1015_TCON_TDM_MS_M (0x1 << 14)246#define RT1015_I2S_DL_MASK (0x7 << 8)247#define RT1015_I2S_DL_SFT 8248#define RT1015_I2S_DL_16 (0x0 << 8)249#define RT1015_I2S_DL_20 (0x1 << 8)250#define RT1015_I2S_DL_24 (0x2 << 8)251#define RT1015_I2S_DL_8 (0x3 << 8)252#define RT1015_I2S_M_DF_MASK (0x7 << 0)253#define RT1015_I2S_M_DF_SFT 0254#define RT1015_I2S_M_DF_I2S (0x0)255#define RT1015_I2S_M_DF_LEFT (0x1)256#define RT1015_I2S_M_DF_PCM_A (0x2)257#define RT1015_I2S_M_DF_PCM_B (0x3)258#define RT1015_I2S_M_DF_PCM_A_N (0x6)259#define RT1015_I2S_M_DF_PCM_B_N (0x7)260 261/* TDM_tcon Setting (0x0112) */262#define RT1015_I2S_TCON_DF_MASK (0x7 << 13)263#define RT1015_I2S_TCON_DF_SFT 13264#define RT1015_I2S_TCON_DF_I2S (0x0 << 13)265#define RT1015_I2S_TCON_DF_LEFT (0x1 << 13)266#define RT1015_I2S_TCON_DF_PCM_A (0x2 << 13)267#define RT1015_I2S_TCON_DF_PCM_B (0x3 << 13)268#define RT1015_I2S_TCON_DF_PCM_A_N (0x6 << 13)269#define RT1015_I2S_TCON_DF_PCM_B_N (0x7 << 13)270#define RT1015_TCON_BCLK_SEL_MASK (0x3 << 10)271#define RT1015_TCON_BCLK_SEL_SFT 10272#define RT1015_TCON_BCLK_SEL_32FS (0x0 << 10)273#define RT1015_TCON_BCLK_SEL_64FS (0x1 << 10)274#define RT1015_TCON_BCLK_SEL_128FS (0x2 << 10)275#define RT1015_TCON_BCLK_SEL_256FS (0x3 << 10)276#define RT1015_TCON_CH_LEN_MASK (0x3 << 5)277#define RT1015_TCON_CH_LEN_SFT 5278#define RT1015_TCON_CH_LEN_16B (0x0 << 5)279#define RT1015_TCON_CH_LEN_20B (0x1 << 5)280#define RT1015_TCON_CH_LEN_24B (0x2 << 5)281#define RT1015_TCON_CH_LEN_32B (0x3 << 5)282#define RT1015_TCON_BCLK_MST_MASK (0x1 << 4)283#define RT1015_TCON_BCLK_MST_SFT 4284#define RT1015_TCON_BCLK_MST_INV (0x1 << 4)285 286/* TDM1 Setting-1 (0x0114) */287#define RT1015_TDM_INV_BCLK_MASK (0x1 << 15)288#define RT1015_TDM_INV_BCLK_SFT 15289#define RT1015_TDM_INV_BCLK (0x1 << 15)290#define RT1015_I2S_CH_TX_MASK (0x3 << 10)291#define RT1015_I2S_CH_TX_SFT 10292#define RT1015_I2S_TX_2CH (0x0 << 10)293#define RT1015_I2S_TX_4CH (0x1 << 10)294#define RT1015_I2S_TX_6CH (0x2 << 10)295#define RT1015_I2S_TX_8CH (0x3 << 10)296#define RT1015_I2S_CH_RX_MASK (0x3 << 8)297#define RT1015_I2S_CH_RX_SFT 8298#define RT1015_I2S_RX_2CH (0x0 << 8)299#define RT1015_I2S_RX_4CH (0x1 << 8)300#define RT1015_I2S_RX_6CH (0x2 << 8)301#define RT1015_I2S_RX_8CH (0x3 << 8)302#define RT1015_I2S_LR_CH_SEL_MASK (0x1 << 7)303#define RT1015_I2S_LR_CH_SEL_SFT 7304#define RT1015_I2S_LEFT_CH_SEL (0x0 << 7)305#define RT1015_I2S_RIGHT_CH_SEL (0x1 << 7)306#define RT1015_I2S_CH_TX_LEN_MASK (0x7 << 4)307#define RT1015_I2S_CH_TX_LEN_SFT 4308#define RT1015_I2S_CH_TX_LEN_16B (0x0 << 4)309#define RT1015_I2S_CH_TX_LEN_20B (0x1 << 4)310#define RT1015_I2S_CH_TX_LEN_24B (0x2 << 4)311#define RT1015_I2S_CH_TX_LEN_32B (0x3 << 4)312#define RT1015_I2S_CH_TX_LEN_8B (0x4 << 4)313#define RT1015_I2S_CH_RX_LEN_MASK (0x7 << 0)314#define RT1015_I2S_CH_RX_LEN_SFT 0315#define RT1015_I2S_CH_RX_LEN_16B (0x0 << 0)316#define RT1015_I2S_CH_RX_LEN_20B (0x1 << 0)317#define RT1015_I2S_CH_RX_LEN_24B (0x2 << 0)318#define RT1015_I2S_CH_RX_LEN_32B (0x3 << 0)319#define RT1015_I2S_CH_RX_LEN_8B (0x4 << 0)320 321/* TDM1 Setting-4 (0x011a) */322#define RT1015_TDM_I2S_TX_L_DAC1_1_MASK (0x7 << 12)323#define RT1015_TDM_I2S_TX_R_DAC1_1_MASK (0x7 << 8)324#define RT1015_TDM_I2S_TX_L_DAC1_1_SFT 12325#define RT1015_TDM_I2S_TX_R_DAC1_1_SFT 8326 327/* 0x0330 */328#define RT1015_ABST_AUTO_EN_MASK (0x1 << 13)329#define RT1015_ABST_AUTO_MODE (0x1 << 13)330#define RT1015_ABST_REG_MODE (0x0 << 13)331#define RT1015_ABST_FIX_TGT_MASK (0x1 << 12)332#define RT1015_ABST_FIX_TGT_EN (0x1 << 12)333#define RT1015_ABST_FIX_TGT_DIS (0x0 << 12)334#define RT1015_BYPASS_SWR_REG_MASK (0x1 << 7)335#define RT1015_BYPASS_SWRREG_BYPASS (0x1 << 7)336#define RT1015_BYPASS_SWRREG_PASS (0x0 << 7)337 338/* 0x0322 */339#define RT1015_PWR_LDO2 (0x1 << 15)340#define RT1015_PWR_LDO2_BIT 15341#define RT1015_PWR_DAC (0x1 << 14)342#define RT1015_PWR_DAC_BIT 14343#define RT1015_PWR_INTCLK (0x1 << 13)344#define RT1015_PWR_INTCLK_BIT 13345#define RT1015_PWR_ISENSE (0x1 << 12)346#define RT1015_PWR_ISENSE_BIT 12347#define RT1015_PWR_VSENSE (0x1 << 10)348#define RT1015_PWR_VSENSE_BIT 10349#define RT1015_PWR_PLL (0x1 << 9)350#define RT1015_PWR_PLL_BIT 9351#define RT1015_PWR_BG_1_2 (0x1 << 8)352#define RT1015_PWR_BG_1_2_BIT 8353#define RT1015_PWR_MBIAS_BG (0x1 << 7)354#define RT1015_PWR_MBIAS_BG_BIT 7355#define RT1015_PWR_VBAT (0x1 << 6)356#define RT1015_PWR_VBAT_BIT 6357#define RT1015_PWR_MBIAS (0x1 << 4)358#define RT1015_PWR_MBIAS_BIT 4359#define RT1015_PWR_ADCV (0x1 << 3)360#define RT1015_PWR_ADCV_BIT 3361#define RT1015_PWR_MIXERV (0x1 << 2)362#define RT1015_PWR_MIXERV_BIT 2363#define RT1015_PWR_SUMV (0x1 << 1)364#define RT1015_PWR_SUMV_BIT 1365#define RT1015_PWR_VREFLV (0x1 << 0)366#define RT1015_PWR_VREFLV_BIT 0367 368/* 0x0324 */369#define RT1015_PWR_BASIC (0x1 << 15)370#define RT1015_PWR_BASIC_BIT 15371#define RT1015_PWR_SD (0x1 << 14)372#define RT1015_PWR_SD_BIT 14373#define RT1015_PWR_IBIAS (0x1 << 13)374#define RT1015_PWR_IBIAS_BIT 13375#define RT1015_PWR_VCM (0x1 << 11)376#define RT1015_PWR_VCM_BIT 11377 378/* 0x0328 */379#define RT1015_PWR_SWR (0x1 << 12)380#define RT1015_PWR_SWR_BIT 12381 382/* 0x0519 */383#define RT1015_EN_CLA_D_DC_DET_MASK (0x1 << 12)384#define RT1015_EN_CLA_D_DC_DET (0x1 << 12)385#define RT1015_DIS_CLA_D_DC_DET (0x0 << 12)386 387/* 0x1300 */388#define RT1015_PWR_CLSD (0x1 << 12)389#define RT1015_PWR_CLSD_BIT 12390 391/* 0x007a */392#define RT1015_ID_MASK 0xff393#define RT1015_ID_VERA 0x0394#define RT1015_ID_VERB 0x1395 396/* System Clock Source */397enum {398 RT1015_SCLK_S_MCLK,399 RT1015_SCLK_S_PLL,400};401 402/* PLL1 Source */403enum {404 RT1015_PLL_S_MCLK,405 RT1015_PLL_S_BCLK,406};407 408enum {409 RT1015_AIF1,410 RT1015_AIFS,411};412 413enum {414 RT1015_VERA,415 RT1015_VERB,416};417 418enum {419 BYPASS,420 ADAPTIVE,421 FIXED_ADAPTIVE,422};423 424enum {425 RT1015_Enable_Boost = 0,426 RT1015_Bypass_Boost,427};428 429enum {430 RT1015_HW_28 = 0,431 RT1015_HW_29,432};433 434struct rt1015_priv {435 struct snd_soc_component *component;436 struct rt1015_platform_data pdata;437 struct regmap *regmap;438 int sysclk;439 int sysclk_src;440 int pll_src;441 int pll_in;442 int pll_out;443 int boost_mode;444 int bypass_boost;445 int dac_is_used;446 int cali_done;447};448 449#endif /* __RT1015_H__ */450