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1/* SPDX-License-Identifier: GPL-2.0-only */2/*3 * rt5514.h -- RT5514 ALSA SoC audio driver4 *5 * Copyright 2015 Realtek Microelectronics6 * Author: Oder Chiou <oder_chiou@realtek.com>7 */8 9#ifndef __RT5514_H__10#define __RT5514_H__11 12#include <linux/clk.h>13#include <sound/rt5514.h>14 15#define RT5514_DEVICE_ID 0x10ec551416 17#define RT5514_RESET 0x200018#define RT5514_PWR_ANA1 0x200419#define RT5514_PWR_ANA2 0x200820#define RT5514_I2S_CTRL1 0x201021#define RT5514_I2S_CTRL2 0x201422#define RT5514_VAD_CTRL6 0x203023#define RT5514_EXT_VAD_CTRL 0x206c24#define RT5514_DIG_IO_CTRL 0x207025#define RT5514_PAD_CTRL1 0x208026#define RT5514_DMIC_DATA_CTRL 0x20a027#define RT5514_DIG_SOURCE_CTRL 0x20a428#define RT5514_SRC_CTRL 0x20ac29#define RT5514_DOWNFILTER2_CTRL1 0x20d030#define RT5514_PLL_SOURCE_CTRL 0x210031#define RT5514_CLK_CTRL1 0x210432#define RT5514_CLK_CTRL2 0x210833#define RT5514_PLL3_CALIB_CTRL1 0x211034#define RT5514_PLL3_CALIB_CTRL4 0x212035#define RT5514_PLL3_CALIB_CTRL5 0x212436#define RT5514_PLL3_CALIB_CTRL6 0x212837#define RT5514_DELAY_BUF_CTRL1 0x214038#define RT5514_DELAY_BUF_CTRL3 0x214839#define RT5514_ASRC_IN_CTRL1 0x218040#define RT5514_DOWNFILTER0_CTRL1 0x219041#define RT5514_DOWNFILTER0_CTRL2 0x219442#define RT5514_DOWNFILTER0_CTRL3 0x219843#define RT5514_DOWNFILTER1_CTRL1 0x21a044#define RT5514_DOWNFILTER1_CTRL2 0x21a445#define RT5514_DOWNFILTER1_CTRL3 0x21a846#define RT5514_ANA_CTRL_LDO10 0x220047#define RT5514_ANA_CTRL_LDO18_16 0x220448#define RT5514_ANA_CTRL_ADC12 0x221049#define RT5514_ANA_CTRL_ADC21 0x221450#define RT5514_ANA_CTRL_ADC22 0x221851#define RT5514_ANA_CTRL_ADC23 0x221c52#define RT5514_ANA_CTRL_MICBST 0x222053#define RT5514_ANA_CTRL_ADCFED 0x222454#define RT5514_ANA_CTRL_INBUF 0x222855#define RT5514_ANA_CTRL_VREF 0x222c56#define RT5514_ANA_CTRL_PLL3 0x224057#define RT5514_ANA_CTRL_PLL1_1 0x226058#define RT5514_ANA_CTRL_PLL1_2 0x226459#define RT5514_DMIC_LP_CTRL 0x2e0060#define RT5514_MISC_CTRL_DSP 0x2e0461#define RT5514_DSP_CTRL1 0x2f0062#define RT5514_DSP_CTRL3 0x2f0863#define RT5514_DSP_CTRL4 0x2f1064#define RT5514_VENDOR_ID1 0x2ff065#define RT5514_VENDOR_ID2 0x2ff466 67#define RT5514_DSP_MAPPING 0x1800000068 69/* RT5514_PWR_ANA1 (0x2004) */70#define RT5514_POW_LDO18_IN (0x1 << 5)71#define RT5514_POW_LDO18_IN_BIT 572#define RT5514_POW_LDO18_ADC (0x1 << 4)73#define RT5514_POW_LDO18_ADC_BIT 474#define RT5514_POW_LDO21 (0x1 << 3)75#define RT5514_POW_LDO21_BIT 376#define RT5514_POW_BG_LDO18_IN (0x1 << 2)77#define RT5514_POW_BG_LDO18_IN_BIT 278#define RT5514_POW_BG_LDO21 (0x1 << 1)79#define RT5514_POW_BG_LDO21_BIT 180 81/* RT5514_PWR_ANA2 (0x2008) */82#define RT5514_POW_PLL1 (0x1 << 18)83#define RT5514_POW_PLL1_BIT 1884#define RT5514_POW_PLL1_LDO (0x1 << 16)85#define RT5514_POW_PLL1_LDO_BIT 1686#define RT5514_POW_BG_MBIAS (0x1 << 15)87#define RT5514_POW_BG_MBIAS_BIT 1588#define RT5514_POW_MBIAS (0x1 << 14)89#define RT5514_POW_MBIAS_BIT 1490#define RT5514_POW_VREF2 (0x1 << 13)91#define RT5514_POW_VREF2_BIT 1392#define RT5514_POW_VREF1 (0x1 << 12)93#define RT5514_POW_VREF1_BIT 1294#define RT5514_POWR_LDO16 (0x1 << 11)95#define RT5514_POWR_LDO16_BIT 1196#define RT5514_POWL_LDO16 (0x1 << 10)97#define RT5514_POWL_LDO16_BIT 1098#define RT5514_POW_ADC2 (0x1 << 9)99#define RT5514_POW_ADC2_BIT 9100#define RT5514_POW_INPUT_BUF (0x1 << 8)101#define RT5514_POW_INPUT_BUF_BIT 8102#define RT5514_POW_ADC1_R (0x1 << 7)103#define RT5514_POW_ADC1_R_BIT 7104#define RT5514_POW_ADC1_L (0x1 << 6)105#define RT5514_POW_ADC1_L_BIT 6106#define RT5514_POW2_BSTR (0x1 << 5)107#define RT5514_POW2_BSTR_BIT 5108#define RT5514_POW2_BSTL (0x1 << 4)109#define RT5514_POW2_BSTL_BIT 4110#define RT5514_POW_BSTR (0x1 << 3)111#define RT5514_POW_BSTR_BIT 3112#define RT5514_POW_BSTL (0x1 << 2)113#define RT5514_POW_BSTL_BIT 2114#define RT5514_POW_ADCFEDR (0x1 << 1)115#define RT5514_POW_ADCFEDR_BIT 1116#define RT5514_POW_ADCFEDL (0x1 << 0)117#define RT5514_POW_ADCFEDL_BIT 0118 119/* RT5514_I2S_CTRL1 (0x2010) */120#define RT5514_TDM_MODE2 (0x1 << 30)121#define RT5514_TDM_MODE2_SFT 30122#define RT5514_TDM_MODE (0x1 << 28)123#define RT5514_TDM_MODE_SFT 28124#define RT5514_I2S_LR_MASK (0x1 << 26)125#define RT5514_I2S_LR_SFT 26126#define RT5514_I2S_LR_NOR (0x0 << 26)127#define RT5514_I2S_LR_INV (0x1 << 26)128#define RT5514_I2S_BP_MASK (0x1 << 25)129#define RT5514_I2S_BP_SFT 25130#define RT5514_I2S_BP_NOR (0x0 << 25)131#define RT5514_I2S_BP_INV (0x1 << 25)132#define RT5514_I2S_DF_MASK (0x7 << 16)133#define RT5514_I2S_DF_SFT 16134#define RT5514_I2S_DF_I2S (0x0 << 16)135#define RT5514_I2S_DF_LEFT (0x1 << 16)136#define RT5514_I2S_DF_PCM_A (0x2 << 16)137#define RT5514_I2S_DF_PCM_B (0x3 << 16)138#define RT5514_TDMSLOT_SEL_RX_MASK (0x3 << 10)139#define RT5514_TDMSLOT_SEL_RX_SFT 10140#define RT5514_TDMSLOT_SEL_RX_4CH (0x1 << 10)141#define RT5514_TDMSLOT_SEL_RX_6CH (0x2 << 10)142#define RT5514_TDMSLOT_SEL_RX_8CH (0x3 << 10)143#define RT5514_CH_LEN_RX_MASK (0x3 << 8)144#define RT5514_CH_LEN_RX_SFT 8145#define RT5514_CH_LEN_RX_16 (0x0 << 8)146#define RT5514_CH_LEN_RX_20 (0x1 << 8)147#define RT5514_CH_LEN_RX_24 (0x2 << 8)148#define RT5514_CH_LEN_RX_32 (0x3 << 8)149#define RT5514_TDMSLOT_SEL_TX_MASK (0x3 << 6)150#define RT5514_TDMSLOT_SEL_TX_SFT 6151#define RT5514_TDMSLOT_SEL_TX_4CH (0x1 << 6)152#define RT5514_TDMSLOT_SEL_TX_6CH (0x2 << 6)153#define RT5514_TDMSLOT_SEL_TX_8CH (0x3 << 6)154#define RT5514_CH_LEN_TX_MASK (0x3 << 4)155#define RT5514_CH_LEN_TX_SFT 4156#define RT5514_CH_LEN_TX_16 (0x0 << 4)157#define RT5514_CH_LEN_TX_20 (0x1 << 4)158#define RT5514_CH_LEN_TX_24 (0x2 << 4)159#define RT5514_CH_LEN_TX_32 (0x3 << 4)160#define RT5514_I2S_DL_MASK (0x3 << 0)161#define RT5514_I2S_DL_SFT 0162#define RT5514_I2S_DL_16 (0x0 << 0)163#define RT5514_I2S_DL_20 (0x1 << 0)164#define RT5514_I2S_DL_24 (0x2 << 0)165#define RT5514_I2S_DL_8 (0x3 << 0)166 167/* RT5514_I2S_CTRL2 (0x2014) */168#define RT5514_TDM_DOCKING_MODE (0x1 << 31)169#define RT5514_TDM_DOCKING_MODE_SFT 31170#define RT5514_TDM_DOCKING_VALID_CH_MASK (0x1 << 29)171#define RT5514_TDM_DOCKING_VALID_CH_SFT 29172#define RT5514_TDM_DOCKING_VALID_CH2 (0x0 << 29)173#define RT5514_TDM_DOCKING_VALID_CH4 (0x1 << 29)174#define RT5514_TDM_DOCKING_START_MASK (0x1 << 28)175#define RT5514_TDM_DOCKING_START_SFT 28176#define RT5514_TDM_DOCKING_START_SLOT0 (0x0 << 28)177#define RT5514_TDM_DOCKING_START_SLOT4 (0x1 << 28)178 179/* RT5514_DIG_SOURCE_CTRL (0x20a4) */180#define RT5514_AD1_DMIC_INPUT_SEL (0x1 << 1)181#define RT5514_AD1_DMIC_INPUT_SEL_SFT 1182#define RT5514_AD0_DMIC_INPUT_SEL (0x1 << 0)183#define RT5514_AD0_DMIC_INPUT_SEL_SFT 0184 185/* RT5514_PLL_SOURCE_CTRL (0x2100) */186#define RT5514_PLL_1_SEL_MASK (0x7 << 12)187#define RT5514_PLL_1_SEL_SFT 12188#define RT5514_PLL_1_SEL_SCLK (0x3 << 12)189#define RT5514_PLL_1_SEL_MCLK (0x4 << 12)190 191/* RT5514_CLK_CTRL1 (0x2104) */192#define RT5514_CLK_AD_ANA1_EN (0x1 << 31)193#define RT5514_CLK_AD_ANA1_EN_BIT 31194#define RT5514_CLK_AD1_EN (0x1 << 24)195#define RT5514_CLK_AD1_EN_BIT 24196#define RT5514_CLK_AD0_EN (0x1 << 23)197#define RT5514_CLK_AD0_EN_BIT 23198#define RT5514_CLK_DMIC_OUT_SEL_MASK (0x7 << 8)199#define RT5514_CLK_DMIC_OUT_SEL_SFT 8200#define RT5514_CLK_AD_ANA1_SEL_MASK (0xf << 0)201#define RT5514_CLK_AD_ANA1_SEL_SFT 0202 203/* RT5514_CLK_CTRL2 (0x2108) */204#define RT5514_CLK_AD1_ASRC_EN (0x1 << 17)205#define RT5514_CLK_AD1_ASRC_EN_BIT 17206#define RT5514_CLK_AD0_ASRC_EN (0x1 << 16)207#define RT5514_CLK_AD0_ASRC_EN_BIT 16208#define RT5514_CLK_SYS_DIV_OUT_MASK (0x7 << 8)209#define RT5514_CLK_SYS_DIV_OUT_SFT 8210#define RT5514_SEL_ADC_OSR_MASK (0x7 << 4)211#define RT5514_SEL_ADC_OSR_SFT 4212#define RT5514_CLK_SYS_PRE_SEL_MASK (0x3 << 0)213#define RT5514_CLK_SYS_PRE_SEL_SFT 0214#define RT5514_CLK_SYS_PRE_SEL_MCLK (0x2 << 0)215#define RT5514_CLK_SYS_PRE_SEL_PLL (0x3 << 0)216 217/* RT5514_DOWNFILTER_CTRL (0x2190 0x2194 0x21a0 0x21a4) */218#define RT5514_AD_DMIC_MIX (0x1 << 11)219#define RT5514_AD_DMIC_MIX_BIT 11220#define RT5514_AD_AD_MIX (0x1 << 10)221#define RT5514_AD_AD_MIX_BIT 10222#define RT5514_AD_AD_MUTE (0x1 << 7)223#define RT5514_AD_AD_MUTE_BIT 7224#define RT5514_AD_GAIN_MASK (0x3f << 1)225#define RT5514_AD_GAIN_SFT 1226 227/* RT5514_ANA_CTRL_MICBST (0x2220) */228#define RT5514_SEL_BSTL_MASK (0xf << 4)229#define RT5514_SEL_BSTL_SFT 4230#define RT5514_SEL_BSTR_MASK (0xf << 0)231#define RT5514_SEL_BSTR_SFT 0232 233/* RT5514_ANA_CTRL_PLL1_1 (0x2260) */234#define RT5514_PLL_K_MAX 0x1f235#define RT5514_PLL_K_MASK (RT5514_PLL_K_MAX << 16)236#define RT5514_PLL_K_SFT 16237#define RT5514_PLL_N_MAX 0x1ff238#define RT5514_PLL_N_MASK (RT5514_PLL_N_MAX << 7)239#define RT5514_PLL_N_SFT 4240#define RT5514_PLL_M_MAX 0xf241#define RT5514_PLL_M_MASK (RT5514_PLL_M_MAX << 0)242#define RT5514_PLL_M_SFT 0243 244/* RT5514_ANA_CTRL_PLL1_2 (0x2264) */245#define RT5514_PLL_M_BP (0x1 << 2)246#define RT5514_PLL_M_BP_SFT 2247#define RT5514_PLL_K_BP (0x1 << 1)248#define RT5514_PLL_K_BP_SFT 1249#define RT5514_EN_LDO_PLL1 (0x1 << 0)250#define RT5514_EN_LDO_PLL1_BIT 0251 252#define RT5514_PLL_INP_MAX 40000000253#define RT5514_PLL_INP_MIN 256000254 255#define RT5514_FIRMWARE1 "rt5514_dsp_fw1.bin"256#define RT5514_FIRMWARE2 "rt5514_dsp_fw2.bin"257 258/* System Clock Source */259enum {260 RT5514_SCLK_S_MCLK,261 RT5514_SCLK_S_PLL1,262};263 264/* PLL1 Source */265enum {266 RT5514_PLL1_S_MCLK,267 RT5514_PLL1_S_BCLK,268};269 270struct rt5514_priv {271 struct rt5514_platform_data pdata;272 struct snd_soc_component *component;273 struct regmap *i2c_regmap, *regmap;274 struct clk *mclk, *dsp_calib_clk;275 int sysclk;276 int sysclk_src;277 int lrck;278 int bclk;279 int pll_src;280 int pll_in;281 int pll_out;282 int dsp_enabled;283 unsigned int pll3_cal_value;284};285 286#endif /* __RT5514_H__ */287