3061 lines · c
1// SPDX-License-Identifier: GPL-2.0-only2/*3 * rt5640.c -- RT5640/RT5639 ALSA SoC audio codec driver4 *5 * Copyright 2011 Realtek Semiconductor Corp.6 * Author: Johnny Hsu <johnnyhsu@realtek.com>7 * Copyright (c) 2013, NVIDIA CORPORATION. All rights reserved.8 */9 10#include <linux/module.h>11#include <linux/moduleparam.h>12#include <linux/init.h>13#include <linux/delay.h>14#include <linux/pm.h>15#include <linux/gpio/consumer.h>16#include <linux/i2c.h>17#include <linux/regmap.h>18#include <linux/of.h>19#include <linux/platform_device.h>20#include <linux/spi/spi.h>21#include <linux/acpi.h>22#include <sound/core.h>23#include <sound/jack.h>24#include <sound/pcm.h>25#include <sound/pcm_params.h>26#include <sound/soc.h>27#include <sound/soc-dapm.h>28#include <sound/initval.h>29#include <sound/tlv.h>30 31#include "rl6231.h"32#include "rt5640.h"33 34#define RT5640_DEVICE_ID 0x623135 36#define RT5640_PR_RANGE_BASE (0xff + 1)37#define RT5640_PR_SPACING 0x10038 39#define RT5640_PR_BASE (RT5640_PR_RANGE_BASE + (0 * RT5640_PR_SPACING))40 41static const struct regmap_range_cfg rt5640_ranges[] = {42 { .name = "PR", .range_min = RT5640_PR_BASE,43 .range_max = RT5640_PR_BASE + 0xb4,44 .selector_reg = RT5640_PRIV_INDEX,45 .selector_mask = 0xff,46 .selector_shift = 0x0,47 .window_start = RT5640_PRIV_DATA,48 .window_len = 0x1, },49};50 51static const struct reg_sequence init_list[] = {52 {RT5640_PR_BASE + 0x3d, 0x3600},53 {RT5640_PR_BASE + 0x12, 0x0aa8},54 {RT5640_PR_BASE + 0x14, 0x0aaa},55 {RT5640_PR_BASE + 0x21, 0xe0e0},56 {RT5640_PR_BASE + 0x23, 0x1804},57};58 59static const struct reg_default rt5640_reg[] = {60 { 0x00, 0x000e },61 { 0x01, 0xc8c8 },62 { 0x02, 0xc8c8 },63 { 0x03, 0xc8c8 },64 { 0x04, 0x8000 },65 { 0x0d, 0x0000 },66 { 0x0e, 0x0000 },67 { 0x0f, 0x0808 },68 { 0x19, 0xafaf },69 { 0x1a, 0xafaf },70 { 0x1b, 0x0000 },71 { 0x1c, 0x2f2f },72 { 0x1d, 0x2f2f },73 { 0x1e, 0x0000 },74 { 0x27, 0x7060 },75 { 0x28, 0x7070 },76 { 0x29, 0x8080 },77 { 0x2a, 0x5454 },78 { 0x2b, 0x5454 },79 { 0x2c, 0xaa00 },80 { 0x2d, 0x0000 },81 { 0x2e, 0xa000 },82 { 0x2f, 0x0000 },83 { 0x3b, 0x0000 },84 { 0x3c, 0x007f },85 { 0x3d, 0x0000 },86 { 0x3e, 0x007f },87 { 0x45, 0xe000 },88 { 0x46, 0x003e },89 { 0x47, 0x003e },90 { 0x48, 0xf800 },91 { 0x49, 0x3800 },92 { 0x4a, 0x0004 },93 { 0x4c, 0xfc00 },94 { 0x4d, 0x0000 },95 { 0x4f, 0x01ff },96 { 0x50, 0x0000 },97 { 0x51, 0x0000 },98 { 0x52, 0x01ff },99 { 0x53, 0xf000 },100 { 0x61, 0x0000 },101 { 0x62, 0x0000 },102 { 0x63, 0x00c0 },103 { 0x64, 0x0000 },104 { 0x65, 0x0000 },105 { 0x66, 0x0000 },106 { 0x6a, 0x0000 },107 { 0x6c, 0x0000 },108 { 0x70, 0x8000 },109 { 0x71, 0x8000 },110 { 0x72, 0x8000 },111 { 0x73, 0x1114 },112 { 0x74, 0x0c00 },113 { 0x75, 0x1d00 },114 { 0x80, 0x0000 },115 { 0x81, 0x0000 },116 { 0x82, 0x0000 },117 { 0x83, 0x0000 },118 { 0x84, 0x0000 },119 { 0x85, 0x0008 },120 { 0x89, 0x0000 },121 { 0x8a, 0x0000 },122 { 0x8b, 0x0600 },123 { 0x8c, 0x0228 },124 { 0x8d, 0xa000 },125 { 0x8e, 0x0004 },126 { 0x8f, 0x1100 },127 { 0x90, 0x0646 },128 { 0x91, 0x0c00 },129 { 0x92, 0x0000 },130 { 0x93, 0x3000 },131 { 0xb0, 0x2080 },132 { 0xb1, 0x0000 },133 { 0xb4, 0x2206 },134 { 0xb5, 0x1f00 },135 { 0xb6, 0x0000 },136 { 0xb8, 0x034b },137 { 0xb9, 0x0066 },138 { 0xba, 0x000b },139 { 0xbb, 0x0000 },140 { 0xbc, 0x0000 },141 { 0xbd, 0x0000 },142 { 0xbe, 0x0000 },143 { 0xbf, 0x0000 },144 { 0xc0, 0x0400 },145 { 0xc2, 0x0000 },146 { 0xc4, 0x0000 },147 { 0xc5, 0x0000 },148 { 0xc6, 0x2000 },149 { 0xc8, 0x0000 },150 { 0xc9, 0x0000 },151 { 0xca, 0x0000 },152 { 0xcb, 0x0000 },153 { 0xcc, 0x0000 },154 { 0xcf, 0x0013 },155 { 0xd0, 0x0680 },156 { 0xd1, 0x1c17 },157 { 0xd2, 0x8c00 },158 { 0xd3, 0xaa20 },159 { 0xd6, 0x0400 },160 { 0xd9, 0x0809 },161 { 0xfe, 0x10ec },162 { 0xff, 0x6231 },163};164 165static int rt5640_reset(struct snd_soc_component *component)166{167 return snd_soc_component_write(component, RT5640_RESET, 0);168}169 170static bool rt5640_volatile_register(struct device *dev, unsigned int reg)171{172 int i;173 174 for (i = 0; i < ARRAY_SIZE(rt5640_ranges); i++)175 if ((reg >= rt5640_ranges[i].window_start &&176 reg <= rt5640_ranges[i].window_start +177 rt5640_ranges[i].window_len) ||178 (reg >= rt5640_ranges[i].range_min &&179 reg <= rt5640_ranges[i].range_max))180 return true;181 182 switch (reg) {183 case RT5640_RESET:184 case RT5640_ASRC_5:185 case RT5640_EQ_CTRL1:186 case RT5640_DRC_AGC_1:187 case RT5640_ANC_CTRL1:188 case RT5640_IRQ_CTRL2:189 case RT5640_INT_IRQ_ST:190 case RT5640_DSP_CTRL2:191 case RT5640_DSP_CTRL3:192 case RT5640_PRIV_INDEX:193 case RT5640_PRIV_DATA:194 case RT5640_PGM_REG_ARR1:195 case RT5640_PGM_REG_ARR3:196 case RT5640_DUMMY2:197 case RT5640_VENDOR_ID:198 case RT5640_VENDOR_ID1:199 case RT5640_VENDOR_ID2:200 return true;201 default:202 return false;203 }204}205 206static bool rt5640_readable_register(struct device *dev, unsigned int reg)207{208 int i;209 210 for (i = 0; i < ARRAY_SIZE(rt5640_ranges); i++)211 if ((reg >= rt5640_ranges[i].window_start &&212 reg <= rt5640_ranges[i].window_start +213 rt5640_ranges[i].window_len) ||214 (reg >= rt5640_ranges[i].range_min &&215 reg <= rt5640_ranges[i].range_max))216 return true;217 218 switch (reg) {219 case RT5640_RESET:220 case RT5640_SPK_VOL:221 case RT5640_HP_VOL:222 case RT5640_OUTPUT:223 case RT5640_MONO_OUT:224 case RT5640_IN1_IN2:225 case RT5640_IN3_IN4:226 case RT5640_INL_INR_VOL:227 case RT5640_DAC1_DIG_VOL:228 case RT5640_DAC2_DIG_VOL:229 case RT5640_DAC2_CTRL:230 case RT5640_ADC_DIG_VOL:231 case RT5640_ADC_DATA:232 case RT5640_ADC_BST_VOL:233 case RT5640_STO_ADC_MIXER:234 case RT5640_MONO_ADC_MIXER:235 case RT5640_AD_DA_MIXER:236 case RT5640_STO_DAC_MIXER:237 case RT5640_MONO_DAC_MIXER:238 case RT5640_DIG_MIXER:239 case RT5640_DSP_PATH1:240 case RT5640_DSP_PATH2:241 case RT5640_DIG_INF_DATA:242 case RT5640_REC_L1_MIXER:243 case RT5640_REC_L2_MIXER:244 case RT5640_REC_R1_MIXER:245 case RT5640_REC_R2_MIXER:246 case RT5640_HPO_MIXER:247 case RT5640_SPK_L_MIXER:248 case RT5640_SPK_R_MIXER:249 case RT5640_SPO_L_MIXER:250 case RT5640_SPO_R_MIXER:251 case RT5640_SPO_CLSD_RATIO:252 case RT5640_MONO_MIXER:253 case RT5640_OUT_L1_MIXER:254 case RT5640_OUT_L2_MIXER:255 case RT5640_OUT_L3_MIXER:256 case RT5640_OUT_R1_MIXER:257 case RT5640_OUT_R2_MIXER:258 case RT5640_OUT_R3_MIXER:259 case RT5640_LOUT_MIXER:260 case RT5640_PWR_DIG1:261 case RT5640_PWR_DIG2:262 case RT5640_PWR_ANLG1:263 case RT5640_PWR_ANLG2:264 case RT5640_PWR_MIXER:265 case RT5640_PWR_VOL:266 case RT5640_PRIV_INDEX:267 case RT5640_PRIV_DATA:268 case RT5640_I2S1_SDP:269 case RT5640_I2S2_SDP:270 case RT5640_ADDA_CLK1:271 case RT5640_ADDA_CLK2:272 case RT5640_DMIC:273 case RT5640_GLB_CLK:274 case RT5640_PLL_CTRL1:275 case RT5640_PLL_CTRL2:276 case RT5640_ASRC_1:277 case RT5640_ASRC_2:278 case RT5640_ASRC_3:279 case RT5640_ASRC_4:280 case RT5640_ASRC_5:281 case RT5640_HP_OVCD:282 case RT5640_CLS_D_OVCD:283 case RT5640_CLS_D_OUT:284 case RT5640_DEPOP_M1:285 case RT5640_DEPOP_M2:286 case RT5640_DEPOP_M3:287 case RT5640_CHARGE_PUMP:288 case RT5640_PV_DET_SPK_G:289 case RT5640_MICBIAS:290 case RT5640_EQ_CTRL1:291 case RT5640_EQ_CTRL2:292 case RT5640_WIND_FILTER:293 case RT5640_DRC_AGC_1:294 case RT5640_DRC_AGC_2:295 case RT5640_DRC_AGC_3:296 case RT5640_SVOL_ZC:297 case RT5640_ANC_CTRL1:298 case RT5640_ANC_CTRL2:299 case RT5640_ANC_CTRL3:300 case RT5640_JD_CTRL:301 case RT5640_ANC_JD:302 case RT5640_IRQ_CTRL1:303 case RT5640_IRQ_CTRL2:304 case RT5640_INT_IRQ_ST:305 case RT5640_GPIO_CTRL1:306 case RT5640_GPIO_CTRL2:307 case RT5640_GPIO_CTRL3:308 case RT5640_DSP_CTRL1:309 case RT5640_DSP_CTRL2:310 case RT5640_DSP_CTRL3:311 case RT5640_DSP_CTRL4:312 case RT5640_PGM_REG_ARR1:313 case RT5640_PGM_REG_ARR2:314 case RT5640_PGM_REG_ARR3:315 case RT5640_PGM_REG_ARR4:316 case RT5640_PGM_REG_ARR5:317 case RT5640_SCB_FUNC:318 case RT5640_SCB_CTRL:319 case RT5640_BASE_BACK:320 case RT5640_MP3_PLUS1:321 case RT5640_MP3_PLUS2:322 case RT5640_3D_HP:323 case RT5640_ADJ_HPF:324 case RT5640_HP_CALIB_AMP_DET:325 case RT5640_HP_CALIB2:326 case RT5640_SV_ZCD1:327 case RT5640_SV_ZCD2:328 case RT5640_DUMMY1:329 case RT5640_DUMMY2:330 case RT5640_DUMMY3:331 case RT5640_VENDOR_ID:332 case RT5640_VENDOR_ID1:333 case RT5640_VENDOR_ID2:334 return true;335 default:336 return false;337 }338}339 340static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -4650, 150, 0);341static const DECLARE_TLV_DB_MINMAX(dac_vol_tlv, -6562, 0);342static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -3450, 150, 0);343static const DECLARE_TLV_DB_MINMAX(adc_vol_tlv, -1762, 3000);344static const DECLARE_TLV_DB_SCALE(adc_bst_tlv, 0, 1200, 0);345 346/* {0, +20, +24, +30, +35, +40, +44, +50, +52} dB */347static const DECLARE_TLV_DB_RANGE(bst_tlv,348 0, 0, TLV_DB_SCALE_ITEM(0, 0, 0),349 1, 1, TLV_DB_SCALE_ITEM(2000, 0, 0),350 2, 2, TLV_DB_SCALE_ITEM(2400, 0, 0),351 3, 5, TLV_DB_SCALE_ITEM(3000, 500, 0),352 6, 6, TLV_DB_SCALE_ITEM(4400, 0, 0),353 7, 7, TLV_DB_SCALE_ITEM(5000, 0, 0),354 8, 8, TLV_DB_SCALE_ITEM(5200, 0, 0)355);356 357/* Interface data select */358static const char * const rt5640_data_select[] = {359 "Normal", "Swap", "left copy to right", "right copy to left"};360 361static SOC_ENUM_SINGLE_DECL(rt5640_if1_dac_enum, RT5640_DIG_INF_DATA,362 RT5640_IF1_DAC_SEL_SFT, rt5640_data_select);363 364static SOC_ENUM_SINGLE_DECL(rt5640_if1_adc_enum, RT5640_DIG_INF_DATA,365 RT5640_IF1_ADC_SEL_SFT, rt5640_data_select);366 367static SOC_ENUM_SINGLE_DECL(rt5640_if2_dac_enum, RT5640_DIG_INF_DATA,368 RT5640_IF2_DAC_SEL_SFT, rt5640_data_select);369 370static SOC_ENUM_SINGLE_DECL(rt5640_if2_adc_enum, RT5640_DIG_INF_DATA,371 RT5640_IF2_ADC_SEL_SFT, rt5640_data_select);372 373/* Class D speaker gain ratio */374static const char * const rt5640_clsd_spk_ratio[] = {"1.66x", "1.83x", "1.94x",375 "2x", "2.11x", "2.22x", "2.33x", "2.44x", "2.55x", "2.66x", "2.77x"};376 377static SOC_ENUM_SINGLE_DECL(rt5640_clsd_spk_ratio_enum, RT5640_CLS_D_OUT,378 RT5640_CLSD_RATIO_SFT, rt5640_clsd_spk_ratio);379 380static const struct snd_kcontrol_new rt5640_snd_controls[] = {381 /* Speaker Output Volume */382 SOC_DOUBLE("Speaker Channel Switch", RT5640_SPK_VOL,383 RT5640_VOL_L_SFT, RT5640_VOL_R_SFT, 1, 1),384 SOC_DOUBLE_TLV("Speaker Playback Volume", RT5640_SPK_VOL,385 RT5640_L_VOL_SFT, RT5640_R_VOL_SFT, 39, 1, out_vol_tlv),386 /* Headphone Output Volume */387 SOC_DOUBLE("HP Channel Switch", RT5640_HP_VOL,388 RT5640_VOL_L_SFT, RT5640_VOL_R_SFT, 1, 1),389 SOC_DOUBLE_TLV("HP Playback Volume", RT5640_HP_VOL,390 RT5640_L_VOL_SFT, RT5640_R_VOL_SFT, 39, 1, out_vol_tlv),391 /* OUTPUT Control */392 SOC_DOUBLE("OUT Playback Switch", RT5640_OUTPUT,393 RT5640_L_MUTE_SFT, RT5640_R_MUTE_SFT, 1, 1),394 SOC_DOUBLE("OUT Channel Switch", RT5640_OUTPUT,395 RT5640_VOL_L_SFT, RT5640_VOL_R_SFT, 1, 1),396 SOC_DOUBLE_TLV("OUT Playback Volume", RT5640_OUTPUT,397 RT5640_L_VOL_SFT, RT5640_R_VOL_SFT, 39, 1, out_vol_tlv),398 399 /* DAC Digital Volume */400 SOC_DOUBLE("DAC2 Playback Switch", RT5640_DAC2_CTRL,401 RT5640_M_DAC_L2_VOL_SFT, RT5640_M_DAC_R2_VOL_SFT, 1, 1),402 SOC_DOUBLE_TLV("DAC2 Playback Volume", RT5640_DAC2_DIG_VOL,403 RT5640_L_VOL_SFT, RT5640_R_VOL_SFT,404 175, 0, dac_vol_tlv),405 SOC_DOUBLE_TLV("DAC1 Playback Volume", RT5640_DAC1_DIG_VOL,406 RT5640_L_VOL_SFT, RT5640_R_VOL_SFT,407 175, 0, dac_vol_tlv),408 /* IN1/IN2/IN3 Control */409 SOC_SINGLE_TLV("IN1 Boost", RT5640_IN1_IN2,410 RT5640_BST_SFT1, 8, 0, bst_tlv),411 SOC_SINGLE_TLV("IN2 Boost", RT5640_IN3_IN4,412 RT5640_BST_SFT2, 8, 0, bst_tlv),413 SOC_SINGLE_TLV("IN3 Boost", RT5640_IN1_IN2,414 RT5640_BST_SFT2, 8, 0, bst_tlv),415 416 /* INL/INR Volume Control */417 SOC_DOUBLE_TLV("IN Capture Volume", RT5640_INL_INR_VOL,418 RT5640_INL_VOL_SFT, RT5640_INR_VOL_SFT,419 31, 1, in_vol_tlv),420 /* ADC Digital Volume Control */421 SOC_DOUBLE("ADC Capture Switch", RT5640_ADC_DIG_VOL,422 RT5640_L_MUTE_SFT, RT5640_R_MUTE_SFT, 1, 1),423 SOC_DOUBLE_TLV("ADC Capture Volume", RT5640_ADC_DIG_VOL,424 RT5640_L_VOL_SFT, RT5640_R_VOL_SFT,425 127, 0, adc_vol_tlv),426 SOC_DOUBLE("Mono ADC Capture Switch", RT5640_DUMMY1,427 RT5640_M_MONO_ADC_L_SFT, RT5640_M_MONO_ADC_R_SFT, 1, 1),428 SOC_DOUBLE_TLV("Mono ADC Capture Volume", RT5640_ADC_DATA,429 RT5640_L_VOL_SFT, RT5640_R_VOL_SFT,430 127, 0, adc_vol_tlv),431 /* ADC Boost Volume Control */432 SOC_DOUBLE_TLV("ADC Boost Gain", RT5640_ADC_BST_VOL,433 RT5640_ADC_L_BST_SFT, RT5640_ADC_R_BST_SFT,434 3, 0, adc_bst_tlv),435 /* Class D speaker gain ratio */436 SOC_ENUM("Class D SPK Ratio Control", rt5640_clsd_spk_ratio_enum),437 438 SOC_ENUM("ADC IF1 Data Switch", rt5640_if1_adc_enum),439 SOC_ENUM("DAC IF1 Data Switch", rt5640_if1_dac_enum),440 SOC_ENUM("ADC IF2 Data Switch", rt5640_if2_adc_enum),441 SOC_ENUM("DAC IF2 Data Switch", rt5640_if2_dac_enum),442};443 444static const struct snd_kcontrol_new rt5640_specific_snd_controls[] = {445 /* MONO Output Control */446 SOC_SINGLE("Mono Playback Switch", RT5640_MONO_OUT, RT5640_L_MUTE_SFT,447 1, 1),448};449 450/**451 * set_dmic_clk - Set parameter of dmic.452 *453 * @w: DAPM widget.454 * @kcontrol: The kcontrol of this widget.455 * @event: Event id.456 *457 */458static int set_dmic_clk(struct snd_soc_dapm_widget *w,459 struct snd_kcontrol *kcontrol, int event)460{461 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);462 struct rt5640_priv *rt5640 = snd_soc_component_get_drvdata(component);463 int idx, rate;464 465 rate = rt5640->sysclk / rl6231_get_pre_div(rt5640->regmap,466 RT5640_ADDA_CLK1, RT5640_I2S_PD1_SFT);467 idx = rl6231_calc_dmic_clk(rate);468 if (idx < 0)469 dev_err(component->dev, "Failed to set DMIC clock\n");470 else471 snd_soc_component_update_bits(component, RT5640_DMIC, RT5640_DMIC_CLK_MASK,472 idx << RT5640_DMIC_CLK_SFT);473 return idx;474}475 476static int is_using_asrc(struct snd_soc_dapm_widget *source,477 struct snd_soc_dapm_widget *sink)478{479 struct snd_soc_component *component = snd_soc_dapm_to_component(source->dapm);480 struct rt5640_priv *rt5640 = snd_soc_component_get_drvdata(component);481 482 if (!rt5640->asrc_en)483 return 0;484 485 return 1;486}487 488/* Digital Mixer */489static const struct snd_kcontrol_new rt5640_sto_adc_l_mix[] = {490 SOC_DAPM_SINGLE("ADC1 Switch", RT5640_STO_ADC_MIXER,491 RT5640_M_ADC_L1_SFT, 1, 1),492 SOC_DAPM_SINGLE("ADC2 Switch", RT5640_STO_ADC_MIXER,493 RT5640_M_ADC_L2_SFT, 1, 1),494};495 496static const struct snd_kcontrol_new rt5640_sto_adc_r_mix[] = {497 SOC_DAPM_SINGLE("ADC1 Switch", RT5640_STO_ADC_MIXER,498 RT5640_M_ADC_R1_SFT, 1, 1),499 SOC_DAPM_SINGLE("ADC2 Switch", RT5640_STO_ADC_MIXER,500 RT5640_M_ADC_R2_SFT, 1, 1),501};502 503static const struct snd_kcontrol_new rt5640_mono_adc_l_mix[] = {504 SOC_DAPM_SINGLE("ADC1 Switch", RT5640_MONO_ADC_MIXER,505 RT5640_M_MONO_ADC_L1_SFT, 1, 1),506 SOC_DAPM_SINGLE("ADC2 Switch", RT5640_MONO_ADC_MIXER,507 RT5640_M_MONO_ADC_L2_SFT, 1, 1),508};509 510static const struct snd_kcontrol_new rt5640_mono_adc_r_mix[] = {511 SOC_DAPM_SINGLE("ADC1 Switch", RT5640_MONO_ADC_MIXER,512 RT5640_M_MONO_ADC_R1_SFT, 1, 1),513 SOC_DAPM_SINGLE("ADC2 Switch", RT5640_MONO_ADC_MIXER,514 RT5640_M_MONO_ADC_R2_SFT, 1, 1),515};516 517static const struct snd_kcontrol_new rt5640_dac_l_mix[] = {518 SOC_DAPM_SINGLE("Stereo ADC Switch", RT5640_AD_DA_MIXER,519 RT5640_M_ADCMIX_L_SFT, 1, 1),520 SOC_DAPM_SINGLE("INF1 Switch", RT5640_AD_DA_MIXER,521 RT5640_M_IF1_DAC_L_SFT, 1, 1),522};523 524static const struct snd_kcontrol_new rt5640_dac_r_mix[] = {525 SOC_DAPM_SINGLE("Stereo ADC Switch", RT5640_AD_DA_MIXER,526 RT5640_M_ADCMIX_R_SFT, 1, 1),527 SOC_DAPM_SINGLE("INF1 Switch", RT5640_AD_DA_MIXER,528 RT5640_M_IF1_DAC_R_SFT, 1, 1),529};530 531static const struct snd_kcontrol_new rt5640_sto_dac_l_mix[] = {532 SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_STO_DAC_MIXER,533 RT5640_M_DAC_L1_SFT, 1, 1),534 SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_STO_DAC_MIXER,535 RT5640_M_DAC_L2_SFT, 1, 1),536 SOC_DAPM_SINGLE("ANC Switch", RT5640_STO_DAC_MIXER,537 RT5640_M_ANC_DAC_L_SFT, 1, 1),538};539 540static const struct snd_kcontrol_new rt5640_sto_dac_r_mix[] = {541 SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_STO_DAC_MIXER,542 RT5640_M_DAC_R1_SFT, 1, 1),543 SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_STO_DAC_MIXER,544 RT5640_M_DAC_R2_SFT, 1, 1),545 SOC_DAPM_SINGLE("ANC Switch", RT5640_STO_DAC_MIXER,546 RT5640_M_ANC_DAC_R_SFT, 1, 1),547};548 549static const struct snd_kcontrol_new rt5639_sto_dac_l_mix[] = {550 SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_STO_DAC_MIXER,551 RT5640_M_DAC_L1_SFT, 1, 1),552 SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_STO_DAC_MIXER,553 RT5640_M_DAC_L2_SFT, 1, 1),554};555 556static const struct snd_kcontrol_new rt5639_sto_dac_r_mix[] = {557 SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_STO_DAC_MIXER,558 RT5640_M_DAC_R1_SFT, 1, 1),559 SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_STO_DAC_MIXER,560 RT5640_M_DAC_R2_SFT, 1, 1),561};562 563static const struct snd_kcontrol_new rt5640_mono_dac_l_mix[] = {564 SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_MONO_DAC_MIXER,565 RT5640_M_DAC_L1_MONO_L_SFT, 1, 1),566 SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_MONO_DAC_MIXER,567 RT5640_M_DAC_L2_MONO_L_SFT, 1, 1),568 SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_MONO_DAC_MIXER,569 RT5640_M_DAC_R2_MONO_L_SFT, 1, 1),570};571 572static const struct snd_kcontrol_new rt5640_mono_dac_r_mix[] = {573 SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_MONO_DAC_MIXER,574 RT5640_M_DAC_R1_MONO_R_SFT, 1, 1),575 SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_MONO_DAC_MIXER,576 RT5640_M_DAC_R2_MONO_R_SFT, 1, 1),577 SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_MONO_DAC_MIXER,578 RT5640_M_DAC_L2_MONO_R_SFT, 1, 1),579};580 581static const struct snd_kcontrol_new rt5640_dig_l_mix[] = {582 SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_DIG_MIXER,583 RT5640_M_STO_L_DAC_L_SFT, 1, 1),584 SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_DIG_MIXER,585 RT5640_M_DAC_L2_DAC_L_SFT, 1, 1),586};587 588static const struct snd_kcontrol_new rt5640_dig_r_mix[] = {589 SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_DIG_MIXER,590 RT5640_M_STO_R_DAC_R_SFT, 1, 1),591 SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_DIG_MIXER,592 RT5640_M_DAC_R2_DAC_R_SFT, 1, 1),593};594 595/* Analog Input Mixer */596static const struct snd_kcontrol_new rt5640_rec_l_mix[] = {597 SOC_DAPM_SINGLE("HPOL Switch", RT5640_REC_L2_MIXER,598 RT5640_M_HP_L_RM_L_SFT, 1, 1),599 SOC_DAPM_SINGLE("INL Switch", RT5640_REC_L2_MIXER,600 RT5640_M_IN_L_RM_L_SFT, 1, 1),601 SOC_DAPM_SINGLE("BST3 Switch", RT5640_REC_L2_MIXER,602 RT5640_M_BST2_RM_L_SFT, 1, 1),603 SOC_DAPM_SINGLE("BST2 Switch", RT5640_REC_L2_MIXER,604 RT5640_M_BST4_RM_L_SFT, 1, 1),605 SOC_DAPM_SINGLE("BST1 Switch", RT5640_REC_L2_MIXER,606 RT5640_M_BST1_RM_L_SFT, 1, 1),607 SOC_DAPM_SINGLE("OUT MIXL Switch", RT5640_REC_L2_MIXER,608 RT5640_M_OM_L_RM_L_SFT, 1, 1),609};610 611static const struct snd_kcontrol_new rt5640_rec_r_mix[] = {612 SOC_DAPM_SINGLE("HPOR Switch", RT5640_REC_R2_MIXER,613 RT5640_M_HP_R_RM_R_SFT, 1, 1),614 SOC_DAPM_SINGLE("INR Switch", RT5640_REC_R2_MIXER,615 RT5640_M_IN_R_RM_R_SFT, 1, 1),616 SOC_DAPM_SINGLE("BST3 Switch", RT5640_REC_R2_MIXER,617 RT5640_M_BST2_RM_R_SFT, 1, 1),618 SOC_DAPM_SINGLE("BST2 Switch", RT5640_REC_R2_MIXER,619 RT5640_M_BST4_RM_R_SFT, 1, 1),620 SOC_DAPM_SINGLE("BST1 Switch", RT5640_REC_R2_MIXER,621 RT5640_M_BST1_RM_R_SFT, 1, 1),622 SOC_DAPM_SINGLE("OUT MIXR Switch", RT5640_REC_R2_MIXER,623 RT5640_M_OM_R_RM_R_SFT, 1, 1),624};625 626/* Analog Output Mixer */627static const struct snd_kcontrol_new rt5640_spk_l_mix[] = {628 SOC_DAPM_SINGLE("REC MIXL Switch", RT5640_SPK_L_MIXER,629 RT5640_M_RM_L_SM_L_SFT, 1, 1),630 SOC_DAPM_SINGLE("INL Switch", RT5640_SPK_L_MIXER,631 RT5640_M_IN_L_SM_L_SFT, 1, 1),632 SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_SPK_L_MIXER,633 RT5640_M_DAC_L1_SM_L_SFT, 1, 1),634 SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_SPK_L_MIXER,635 RT5640_M_DAC_L2_SM_L_SFT, 1, 1),636 SOC_DAPM_SINGLE("OUT MIXL Switch", RT5640_SPK_L_MIXER,637 RT5640_M_OM_L_SM_L_SFT, 1, 1),638};639 640static const struct snd_kcontrol_new rt5640_spk_r_mix[] = {641 SOC_DAPM_SINGLE("REC MIXR Switch", RT5640_SPK_R_MIXER,642 RT5640_M_RM_R_SM_R_SFT, 1, 1),643 SOC_DAPM_SINGLE("INR Switch", RT5640_SPK_R_MIXER,644 RT5640_M_IN_R_SM_R_SFT, 1, 1),645 SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_SPK_R_MIXER,646 RT5640_M_DAC_R1_SM_R_SFT, 1, 1),647 SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_SPK_R_MIXER,648 RT5640_M_DAC_R2_SM_R_SFT, 1, 1),649 SOC_DAPM_SINGLE("OUT MIXR Switch", RT5640_SPK_R_MIXER,650 RT5640_M_OM_R_SM_R_SFT, 1, 1),651};652 653static const struct snd_kcontrol_new rt5640_out_l_mix[] = {654 SOC_DAPM_SINGLE("SPK MIXL Switch", RT5640_OUT_L3_MIXER,655 RT5640_M_SM_L_OM_L_SFT, 1, 1),656 SOC_DAPM_SINGLE("BST1 Switch", RT5640_OUT_L3_MIXER,657 RT5640_M_BST1_OM_L_SFT, 1, 1),658 SOC_DAPM_SINGLE("INL Switch", RT5640_OUT_L3_MIXER,659 RT5640_M_IN_L_OM_L_SFT, 1, 1),660 SOC_DAPM_SINGLE("REC MIXL Switch", RT5640_OUT_L3_MIXER,661 RT5640_M_RM_L_OM_L_SFT, 1, 1),662 SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_OUT_L3_MIXER,663 RT5640_M_DAC_R2_OM_L_SFT, 1, 1),664 SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_OUT_L3_MIXER,665 RT5640_M_DAC_L2_OM_L_SFT, 1, 1),666 SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_OUT_L3_MIXER,667 RT5640_M_DAC_L1_OM_L_SFT, 1, 1),668};669 670static const struct snd_kcontrol_new rt5640_out_r_mix[] = {671 SOC_DAPM_SINGLE("SPK MIXR Switch", RT5640_OUT_R3_MIXER,672 RT5640_M_SM_L_OM_R_SFT, 1, 1),673 SOC_DAPM_SINGLE("BST2 Switch", RT5640_OUT_R3_MIXER,674 RT5640_M_BST4_OM_R_SFT, 1, 1),675 SOC_DAPM_SINGLE("BST1 Switch", RT5640_OUT_R3_MIXER,676 RT5640_M_BST1_OM_R_SFT, 1, 1),677 SOC_DAPM_SINGLE("INR Switch", RT5640_OUT_R3_MIXER,678 RT5640_M_IN_R_OM_R_SFT, 1, 1),679 SOC_DAPM_SINGLE("REC MIXR Switch", RT5640_OUT_R3_MIXER,680 RT5640_M_RM_R_OM_R_SFT, 1, 1),681 SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_OUT_R3_MIXER,682 RT5640_M_DAC_L2_OM_R_SFT, 1, 1),683 SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_OUT_R3_MIXER,684 RT5640_M_DAC_R2_OM_R_SFT, 1, 1),685 SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_OUT_R3_MIXER,686 RT5640_M_DAC_R1_OM_R_SFT, 1, 1),687};688 689static const struct snd_kcontrol_new rt5639_out_l_mix[] = {690 SOC_DAPM_SINGLE("BST1 Switch", RT5640_OUT_L3_MIXER,691 RT5640_M_BST1_OM_L_SFT, 1, 1),692 SOC_DAPM_SINGLE("INL Switch", RT5640_OUT_L3_MIXER,693 RT5640_M_IN_L_OM_L_SFT, 1, 1),694 SOC_DAPM_SINGLE("REC MIXL Switch", RT5640_OUT_L3_MIXER,695 RT5640_M_RM_L_OM_L_SFT, 1, 1),696 SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_OUT_L3_MIXER,697 RT5640_M_DAC_L1_OM_L_SFT, 1, 1),698};699 700static const struct snd_kcontrol_new rt5639_out_r_mix[] = {701 SOC_DAPM_SINGLE("BST2 Switch", RT5640_OUT_R3_MIXER,702 RT5640_M_BST4_OM_R_SFT, 1, 1),703 SOC_DAPM_SINGLE("BST1 Switch", RT5640_OUT_R3_MIXER,704 RT5640_M_BST1_OM_R_SFT, 1, 1),705 SOC_DAPM_SINGLE("INR Switch", RT5640_OUT_R3_MIXER,706 RT5640_M_IN_R_OM_R_SFT, 1, 1),707 SOC_DAPM_SINGLE("REC MIXR Switch", RT5640_OUT_R3_MIXER,708 RT5640_M_RM_R_OM_R_SFT, 1, 1),709 SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_OUT_R3_MIXER,710 RT5640_M_DAC_R1_OM_R_SFT, 1, 1),711};712 713static const struct snd_kcontrol_new rt5640_spo_l_mix[] = {714 SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_SPO_L_MIXER,715 RT5640_M_DAC_R1_SPM_L_SFT, 1, 1),716 SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_SPO_L_MIXER,717 RT5640_M_DAC_L1_SPM_L_SFT, 1, 1),718 SOC_DAPM_SINGLE("SPKVOL R Switch", RT5640_SPO_L_MIXER,719 RT5640_M_SV_R_SPM_L_SFT, 1, 1),720 SOC_DAPM_SINGLE("SPKVOL L Switch", RT5640_SPO_L_MIXER,721 RT5640_M_SV_L_SPM_L_SFT, 1, 1),722 SOC_DAPM_SINGLE("BST1 Switch", RT5640_SPO_L_MIXER,723 RT5640_M_BST1_SPM_L_SFT, 1, 1),724};725 726static const struct snd_kcontrol_new rt5640_spo_r_mix[] = {727 SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_SPO_R_MIXER,728 RT5640_M_DAC_R1_SPM_R_SFT, 1, 1),729 SOC_DAPM_SINGLE("SPKVOL R Switch", RT5640_SPO_R_MIXER,730 RT5640_M_SV_R_SPM_R_SFT, 1, 1),731 SOC_DAPM_SINGLE("BST1 Switch", RT5640_SPO_R_MIXER,732 RT5640_M_BST1_SPM_R_SFT, 1, 1),733};734 735static const struct snd_kcontrol_new rt5640_hpo_mix[] = {736 SOC_DAPM_SINGLE("HPO MIX DAC2 Switch", RT5640_HPO_MIXER,737 RT5640_M_DAC2_HM_SFT, 1, 1),738 SOC_DAPM_SINGLE("HPO MIX DAC1 Switch", RT5640_HPO_MIXER,739 RT5640_M_DAC1_HM_SFT, 1, 1),740 SOC_DAPM_SINGLE("HPO MIX HPVOL Switch", RT5640_HPO_MIXER,741 RT5640_M_HPVOL_HM_SFT, 1, 1),742};743 744static const struct snd_kcontrol_new rt5639_hpo_mix[] = {745 SOC_DAPM_SINGLE("HPO MIX DAC1 Switch", RT5640_HPO_MIXER,746 RT5640_M_DAC1_HM_SFT, 1, 1),747 SOC_DAPM_SINGLE("HPO MIX HPVOL Switch", RT5640_HPO_MIXER,748 RT5640_M_HPVOL_HM_SFT, 1, 1),749};750 751static const struct snd_kcontrol_new rt5640_lout_mix[] = {752 SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_LOUT_MIXER,753 RT5640_M_DAC_L1_LM_SFT, 1, 1),754 SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_LOUT_MIXER,755 RT5640_M_DAC_R1_LM_SFT, 1, 1),756 SOC_DAPM_SINGLE("OUTVOL L Switch", RT5640_LOUT_MIXER,757 RT5640_M_OV_L_LM_SFT, 1, 1),758 SOC_DAPM_SINGLE("OUTVOL R Switch", RT5640_LOUT_MIXER,759 RT5640_M_OV_R_LM_SFT, 1, 1),760};761 762static const struct snd_kcontrol_new rt5640_mono_mix[] = {763 SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_MONO_MIXER,764 RT5640_M_DAC_R2_MM_SFT, 1, 1),765 SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_MONO_MIXER,766 RT5640_M_DAC_L2_MM_SFT, 1, 1),767 SOC_DAPM_SINGLE("OUTVOL R Switch", RT5640_MONO_MIXER,768 RT5640_M_OV_R_MM_SFT, 1, 1),769 SOC_DAPM_SINGLE("OUTVOL L Switch", RT5640_MONO_MIXER,770 RT5640_M_OV_L_MM_SFT, 1, 1),771 SOC_DAPM_SINGLE("BST1 Switch", RT5640_MONO_MIXER,772 RT5640_M_BST1_MM_SFT, 1, 1),773};774 775static const struct snd_kcontrol_new spk_l_enable_control =776 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5640_SPK_VOL,777 RT5640_L_MUTE_SFT, 1, 1);778 779static const struct snd_kcontrol_new spk_r_enable_control =780 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5640_SPK_VOL,781 RT5640_R_MUTE_SFT, 1, 1);782 783static const struct snd_kcontrol_new hp_l_enable_control =784 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5640_HP_VOL,785 RT5640_L_MUTE_SFT, 1, 1);786 787static const struct snd_kcontrol_new hp_r_enable_control =788 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5640_HP_VOL,789 RT5640_R_MUTE_SFT, 1, 1);790 791/* Stereo ADC source */792static const char * const rt5640_stereo_adc1_src[] = {793 "DIG MIX", "ADC"794};795 796static SOC_ENUM_SINGLE_DECL(rt5640_stereo_adc1_enum, RT5640_STO_ADC_MIXER,797 RT5640_ADC_1_SRC_SFT, rt5640_stereo_adc1_src);798 799static const struct snd_kcontrol_new rt5640_sto_adc_1_mux =800 SOC_DAPM_ENUM("Stereo ADC1 Mux", rt5640_stereo_adc1_enum);801 802static const char * const rt5640_stereo_adc2_src[] = {803 "DMIC1", "DMIC2", "DIG MIX"804};805 806static SOC_ENUM_SINGLE_DECL(rt5640_stereo_adc2_enum, RT5640_STO_ADC_MIXER,807 RT5640_ADC_2_SRC_SFT, rt5640_stereo_adc2_src);808 809static const struct snd_kcontrol_new rt5640_sto_adc_2_mux =810 SOC_DAPM_ENUM("Stereo ADC2 Mux", rt5640_stereo_adc2_enum);811 812/* Mono ADC source */813static const char * const rt5640_mono_adc_l1_src[] = {814 "Mono DAC MIXL", "ADCL"815};816 817static SOC_ENUM_SINGLE_DECL(rt5640_mono_adc_l1_enum, RT5640_MONO_ADC_MIXER,818 RT5640_MONO_ADC_L1_SRC_SFT, rt5640_mono_adc_l1_src);819 820static const struct snd_kcontrol_new rt5640_mono_adc_l1_mux =821 SOC_DAPM_ENUM("Mono ADC1 left source", rt5640_mono_adc_l1_enum);822 823static const char * const rt5640_mono_adc_l2_src[] = {824 "DMIC L1", "DMIC L2", "Mono DAC MIXL"825};826 827static SOC_ENUM_SINGLE_DECL(rt5640_mono_adc_l2_enum, RT5640_MONO_ADC_MIXER,828 RT5640_MONO_ADC_L2_SRC_SFT, rt5640_mono_adc_l2_src);829 830static const struct snd_kcontrol_new rt5640_mono_adc_l2_mux =831 SOC_DAPM_ENUM("Mono ADC2 left source", rt5640_mono_adc_l2_enum);832 833static const char * const rt5640_mono_adc_r1_src[] = {834 "Mono DAC MIXR", "ADCR"835};836 837static SOC_ENUM_SINGLE_DECL(rt5640_mono_adc_r1_enum, RT5640_MONO_ADC_MIXER,838 RT5640_MONO_ADC_R1_SRC_SFT, rt5640_mono_adc_r1_src);839 840static const struct snd_kcontrol_new rt5640_mono_adc_r1_mux =841 SOC_DAPM_ENUM("Mono ADC1 right source", rt5640_mono_adc_r1_enum);842 843static const char * const rt5640_mono_adc_r2_src[] = {844 "DMIC R1", "DMIC R2", "Mono DAC MIXR"845};846 847static SOC_ENUM_SINGLE_DECL(rt5640_mono_adc_r2_enum, RT5640_MONO_ADC_MIXER,848 RT5640_MONO_ADC_R2_SRC_SFT, rt5640_mono_adc_r2_src);849 850static const struct snd_kcontrol_new rt5640_mono_adc_r2_mux =851 SOC_DAPM_ENUM("Mono ADC2 right source", rt5640_mono_adc_r2_enum);852 853/* DAC2 channel source */854static const char * const rt5640_dac_l2_src[] = {855 "IF2", "Base L/R"856};857 858static int rt5640_dac_l2_values[] = {859 0,860 3,861};862 863static SOC_VALUE_ENUM_SINGLE_DECL(rt5640_dac_l2_enum,864 RT5640_DSP_PATH2, RT5640_DAC_L2_SEL_SFT,865 0x3, rt5640_dac_l2_src, rt5640_dac_l2_values);866 867static const struct snd_kcontrol_new rt5640_dac_l2_mux =868 SOC_DAPM_ENUM("DAC2 left channel source", rt5640_dac_l2_enum);869 870static const char * const rt5640_dac_r2_src[] = {871 "IF2",872};873 874static int rt5640_dac_r2_values[] = {875 0,876};877 878static SOC_VALUE_ENUM_SINGLE_DECL(rt5640_dac_r2_enum,879 RT5640_DSP_PATH2, RT5640_DAC_R2_SEL_SFT,880 0x3, rt5640_dac_r2_src, rt5640_dac_r2_values);881 882static const struct snd_kcontrol_new rt5640_dac_r2_mux =883 SOC_DAPM_ENUM("DAC2 right channel source", rt5640_dac_r2_enum);884 885/* digital interface and iis interface map */886static const char * const rt5640_dai_iis_map[] = {887 "1:1|2:2", "1:2|2:1", "1:1|2:1", "1:2|2:2"888};889 890static int rt5640_dai_iis_map_values[] = {891 0,892 5,893 6,894 7,895};896 897static SOC_VALUE_ENUM_SINGLE_DECL(rt5640_dai_iis_map_enum,898 RT5640_I2S1_SDP, RT5640_I2S_IF_SFT,899 0x7, rt5640_dai_iis_map,900 rt5640_dai_iis_map_values);901 902static const struct snd_kcontrol_new rt5640_dai_mux =903 SOC_DAPM_ENUM("DAI select", rt5640_dai_iis_map_enum);904 905/* SDI select */906static const char * const rt5640_sdi_sel[] = {907 "IF1", "IF2"908};909 910static SOC_ENUM_SINGLE_DECL(rt5640_sdi_sel_enum, RT5640_I2S2_SDP,911 RT5640_I2S2_SDI_SFT, rt5640_sdi_sel);912 913static const struct snd_kcontrol_new rt5640_sdi_mux =914 SOC_DAPM_ENUM("SDI select", rt5640_sdi_sel_enum);915 916static void hp_amp_power_on(struct snd_soc_component *component)917{918 struct rt5640_priv *rt5640 = snd_soc_component_get_drvdata(component);919 920 /* depop parameters */921 regmap_update_bits(rt5640->regmap, RT5640_PR_BASE +922 RT5640_CHPUMP_INT_REG1, 0x0700, 0x0200);923 regmap_update_bits(rt5640->regmap, RT5640_DEPOP_M2,924 RT5640_DEPOP_MASK, RT5640_DEPOP_MAN);925 regmap_update_bits(rt5640->regmap, RT5640_DEPOP_M1,926 RT5640_HP_CP_MASK | RT5640_HP_SG_MASK | RT5640_HP_CB_MASK,927 RT5640_HP_CP_PU | RT5640_HP_SG_DIS | RT5640_HP_CB_PU);928 regmap_write(rt5640->regmap, RT5640_PR_BASE + RT5640_HP_DCC_INT1,929 0x9f00);930 /* headphone amp power on */931 regmap_update_bits(rt5640->regmap, RT5640_PWR_ANLG1,932 RT5640_PWR_FV1 | RT5640_PWR_FV2, 0);933 regmap_update_bits(rt5640->regmap, RT5640_PWR_ANLG1,934 RT5640_PWR_HA,935 RT5640_PWR_HA);936 usleep_range(10000, 15000);937 regmap_update_bits(rt5640->regmap, RT5640_PWR_ANLG1,938 RT5640_PWR_FV1 | RT5640_PWR_FV2 ,939 RT5640_PWR_FV1 | RT5640_PWR_FV2);940}941 942static void rt5640_pmu_depop(struct snd_soc_component *component)943{944 struct rt5640_priv *rt5640 = snd_soc_component_get_drvdata(component);945 946 regmap_update_bits(rt5640->regmap, RT5640_DEPOP_M2,947 RT5640_DEPOP_MASK | RT5640_DIG_DP_MASK,948 RT5640_DEPOP_AUTO | RT5640_DIG_DP_EN);949 regmap_update_bits(rt5640->regmap, RT5640_CHARGE_PUMP,950 RT5640_PM_HP_MASK, RT5640_PM_HP_HV);951 952 regmap_update_bits(rt5640->regmap, RT5640_DEPOP_M3,953 RT5640_CP_FQ1_MASK | RT5640_CP_FQ2_MASK | RT5640_CP_FQ3_MASK,954 (RT5640_CP_FQ_192_KHZ << RT5640_CP_FQ1_SFT) |955 (RT5640_CP_FQ_12_KHZ << RT5640_CP_FQ2_SFT) |956 (RT5640_CP_FQ_192_KHZ << RT5640_CP_FQ3_SFT));957 958 regmap_write(rt5640->regmap, RT5640_PR_BASE +959 RT5640_MAMP_INT_REG2, 0x1c00);960 regmap_update_bits(rt5640->regmap, RT5640_DEPOP_M1,961 RT5640_HP_CP_MASK | RT5640_HP_SG_MASK,962 RT5640_HP_CP_PD | RT5640_HP_SG_EN);963 regmap_update_bits(rt5640->regmap, RT5640_PR_BASE +964 RT5640_CHPUMP_INT_REG1, 0x0700, 0x0400);965}966 967static int rt5640_hp_event(struct snd_soc_dapm_widget *w,968 struct snd_kcontrol *kcontrol, int event)969{970 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);971 struct rt5640_priv *rt5640 = snd_soc_component_get_drvdata(component);972 973 switch (event) {974 case SND_SOC_DAPM_POST_PMU:975 rt5640_pmu_depop(component);976 rt5640->hp_mute = false;977 break;978 979 case SND_SOC_DAPM_PRE_PMD:980 rt5640->hp_mute = true;981 msleep(70);982 break;983 984 default:985 return 0;986 }987 988 return 0;989}990 991static int rt5640_lout_event(struct snd_soc_dapm_widget *w,992 struct snd_kcontrol *kcontrol, int event)993{994 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);995 996 switch (event) {997 case SND_SOC_DAPM_POST_PMU:998 hp_amp_power_on(component);999 snd_soc_component_update_bits(component, RT5640_PWR_ANLG1,1000 RT5640_PWR_LM, RT5640_PWR_LM);1001 snd_soc_component_update_bits(component, RT5640_OUTPUT,1002 RT5640_L_MUTE | RT5640_R_MUTE, 0);1003 break;1004 1005 case SND_SOC_DAPM_PRE_PMD:1006 snd_soc_component_update_bits(component, RT5640_OUTPUT,1007 RT5640_L_MUTE | RT5640_R_MUTE,1008 RT5640_L_MUTE | RT5640_R_MUTE);1009 snd_soc_component_update_bits(component, RT5640_PWR_ANLG1,1010 RT5640_PWR_LM, 0);1011 break;1012 1013 default:1014 return 0;1015 }1016 1017 return 0;1018}1019 1020static int rt5640_hp_power_event(struct snd_soc_dapm_widget *w,1021 struct snd_kcontrol *kcontrol, int event)1022{1023 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);1024 1025 switch (event) {1026 case SND_SOC_DAPM_POST_PMU:1027 hp_amp_power_on(component);1028 break;1029 default:1030 return 0;1031 }1032 1033 return 0;1034}1035 1036static int rt5640_hp_post_event(struct snd_soc_dapm_widget *w,1037 struct snd_kcontrol *kcontrol, int event)1038{1039 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);1040 struct rt5640_priv *rt5640 = snd_soc_component_get_drvdata(component);1041 1042 switch (event) {1043 case SND_SOC_DAPM_POST_PMU:1044 if (!rt5640->hp_mute)1045 msleep(80);1046 1047 break;1048 1049 default:1050 return 0;1051 }1052 1053 return 0;1054}1055 1056static const struct snd_soc_dapm_widget rt5640_dapm_widgets[] = {1057 /* ASRC */1058 SND_SOC_DAPM_SUPPLY_S("Stereo Filter ASRC", 1, RT5640_ASRC_1,1059 15, 0, NULL, 0),1060 SND_SOC_DAPM_SUPPLY_S("I2S2 Filter ASRC", 1, RT5640_ASRC_1,1061 12, 0, NULL, 0),1062 SND_SOC_DAPM_SUPPLY_S("I2S2 ASRC", 1, RT5640_ASRC_1,1063 11, 0, NULL, 0),1064 SND_SOC_DAPM_SUPPLY_S("DMIC1 ASRC", 1, RT5640_ASRC_1,1065 9, 0, NULL, 0),1066 SND_SOC_DAPM_SUPPLY_S("DMIC2 ASRC", 1, RT5640_ASRC_1,1067 8, 0, NULL, 0),1068 1069 1070 /* Input Side */1071 /* micbias */1072 SND_SOC_DAPM_SUPPLY("LDO2", RT5640_PWR_ANLG1,1073 RT5640_PWR_LDO2_BIT, 0, NULL, 0),1074 SND_SOC_DAPM_SUPPLY("MICBIAS1", RT5640_PWR_ANLG2,1075 RT5640_PWR_MB1_BIT, 0, NULL, 0),1076 /* Input Lines */1077 SND_SOC_DAPM_INPUT("DMIC1"),1078 SND_SOC_DAPM_INPUT("DMIC2"),1079 SND_SOC_DAPM_INPUT("IN1P"),1080 SND_SOC_DAPM_INPUT("IN1N"),1081 SND_SOC_DAPM_INPUT("IN2P"),1082 SND_SOC_DAPM_INPUT("IN2N"),1083 SND_SOC_DAPM_INPUT("IN3P"),1084 SND_SOC_DAPM_INPUT("IN3N"),1085 SND_SOC_DAPM_PGA("DMIC L1", SND_SOC_NOPM, 0, 0, NULL, 0),1086 SND_SOC_DAPM_PGA("DMIC R1", SND_SOC_NOPM, 0, 0, NULL, 0),1087 SND_SOC_DAPM_PGA("DMIC L2", SND_SOC_NOPM, 0, 0, NULL, 0),1088 SND_SOC_DAPM_PGA("DMIC R2", SND_SOC_NOPM, 0, 0, NULL, 0),1089 1090 SND_SOC_DAPM_SUPPLY("DMIC CLK", SND_SOC_NOPM, 0, 0,1091 set_dmic_clk, SND_SOC_DAPM_PRE_PMU),1092 SND_SOC_DAPM_SUPPLY("DMIC1 Power", RT5640_DMIC, RT5640_DMIC_1_EN_SFT, 0,1093 NULL, 0),1094 SND_SOC_DAPM_SUPPLY("DMIC2 Power", RT5640_DMIC, RT5640_DMIC_2_EN_SFT, 0,1095 NULL, 0),1096 /* Boost */1097 SND_SOC_DAPM_PGA("BST1", RT5640_PWR_ANLG2,1098 RT5640_PWR_BST1_BIT, 0, NULL, 0),1099 SND_SOC_DAPM_PGA("BST2", RT5640_PWR_ANLG2,1100 RT5640_PWR_BST4_BIT, 0, NULL, 0),1101 SND_SOC_DAPM_PGA("BST3", RT5640_PWR_ANLG2,1102 RT5640_PWR_BST2_BIT, 0, NULL, 0),1103 /* Input Volume */1104 SND_SOC_DAPM_PGA("INL VOL", RT5640_PWR_VOL,1105 RT5640_PWR_IN_L_BIT, 0, NULL, 0),1106 SND_SOC_DAPM_PGA("INR VOL", RT5640_PWR_VOL,1107 RT5640_PWR_IN_R_BIT, 0, NULL, 0),1108 /* REC Mixer */1109 SND_SOC_DAPM_MIXER("RECMIXL", RT5640_PWR_MIXER, RT5640_PWR_RM_L_BIT, 0,1110 rt5640_rec_l_mix, ARRAY_SIZE(rt5640_rec_l_mix)),1111 SND_SOC_DAPM_MIXER("RECMIXR", RT5640_PWR_MIXER, RT5640_PWR_RM_R_BIT, 0,1112 rt5640_rec_r_mix, ARRAY_SIZE(rt5640_rec_r_mix)),1113 /* ADCs */1114 SND_SOC_DAPM_ADC("ADC L", NULL, RT5640_PWR_DIG1,1115 RT5640_PWR_ADC_L_BIT, 0),1116 SND_SOC_DAPM_ADC("ADC R", NULL, RT5640_PWR_DIG1,1117 RT5640_PWR_ADC_R_BIT, 0),1118 /* ADC Mux */1119 SND_SOC_DAPM_MUX("Stereo ADC L2 Mux", SND_SOC_NOPM, 0, 0,1120 &rt5640_sto_adc_2_mux),1121 SND_SOC_DAPM_MUX("Stereo ADC R2 Mux", SND_SOC_NOPM, 0, 0,1122 &rt5640_sto_adc_2_mux),1123 SND_SOC_DAPM_MUX("Stereo ADC L1 Mux", SND_SOC_NOPM, 0, 0,1124 &rt5640_sto_adc_1_mux),1125 SND_SOC_DAPM_MUX("Stereo ADC R1 Mux", SND_SOC_NOPM, 0, 0,1126 &rt5640_sto_adc_1_mux),1127 SND_SOC_DAPM_MUX("Mono ADC L2 Mux", SND_SOC_NOPM, 0, 0,1128 &rt5640_mono_adc_l2_mux),1129 SND_SOC_DAPM_MUX("Mono ADC L1 Mux", SND_SOC_NOPM, 0, 0,1130 &rt5640_mono_adc_l1_mux),1131 SND_SOC_DAPM_MUX("Mono ADC R1 Mux", SND_SOC_NOPM, 0, 0,1132 &rt5640_mono_adc_r1_mux),1133 SND_SOC_DAPM_MUX("Mono ADC R2 Mux", SND_SOC_NOPM, 0, 0,1134 &rt5640_mono_adc_r2_mux),1135 /* ADC Mixer */1136 SND_SOC_DAPM_SUPPLY("Stereo Filter", RT5640_PWR_DIG2,1137 RT5640_PWR_ADC_SF_BIT, 0, NULL, 0),1138 SND_SOC_DAPM_MIXER("Stereo ADC MIXL", SND_SOC_NOPM, 0, 0,1139 rt5640_sto_adc_l_mix, ARRAY_SIZE(rt5640_sto_adc_l_mix)),1140 SND_SOC_DAPM_MIXER("Stereo ADC MIXR", SND_SOC_NOPM, 0, 0,1141 rt5640_sto_adc_r_mix, ARRAY_SIZE(rt5640_sto_adc_r_mix)),1142 SND_SOC_DAPM_SUPPLY("Mono Left Filter", RT5640_PWR_DIG2,1143 RT5640_PWR_ADC_MF_L_BIT, 0, NULL, 0),1144 SND_SOC_DAPM_MIXER("Mono ADC MIXL", SND_SOC_NOPM, 0, 0,1145 rt5640_mono_adc_l_mix, ARRAY_SIZE(rt5640_mono_adc_l_mix)),1146 SND_SOC_DAPM_SUPPLY("Mono Right Filter", RT5640_PWR_DIG2,1147 RT5640_PWR_ADC_MF_R_BIT, 0, NULL, 0),1148 SND_SOC_DAPM_MIXER("Mono ADC MIXR", SND_SOC_NOPM, 0, 0,1149 rt5640_mono_adc_r_mix, ARRAY_SIZE(rt5640_mono_adc_r_mix)),1150 1151 /* Digital Interface */1152 SND_SOC_DAPM_SUPPLY("I2S1", RT5640_PWR_DIG1,1153 RT5640_PWR_I2S1_BIT, 0, NULL, 0),1154 SND_SOC_DAPM_PGA("IF1 DAC", SND_SOC_NOPM, 0, 0, NULL, 0),1155 SND_SOC_DAPM_PGA("IF1 DAC L", SND_SOC_NOPM, 0, 0, NULL, 0),1156 SND_SOC_DAPM_PGA("IF1 DAC R", SND_SOC_NOPM, 0, 0, NULL, 0),1157 SND_SOC_DAPM_PGA("IF1 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),1158 SND_SOC_DAPM_PGA("IF1 ADC L", SND_SOC_NOPM, 0, 0, NULL, 0),1159 SND_SOC_DAPM_PGA("IF1 ADC R", SND_SOC_NOPM, 0, 0, NULL, 0),1160 SND_SOC_DAPM_SUPPLY("I2S2", RT5640_PWR_DIG1,1161 RT5640_PWR_I2S2_BIT, 0, NULL, 0),1162 SND_SOC_DAPM_PGA("IF2 DAC", SND_SOC_NOPM, 0, 0, NULL, 0),1163 SND_SOC_DAPM_PGA("IF2 DAC L", SND_SOC_NOPM, 0, 0, NULL, 0),1164 SND_SOC_DAPM_PGA("IF2 DAC R", SND_SOC_NOPM, 0, 0, NULL, 0),1165 SND_SOC_DAPM_PGA("IF2 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),1166 SND_SOC_DAPM_PGA("IF2 ADC L", SND_SOC_NOPM, 0, 0, NULL, 0),1167 SND_SOC_DAPM_PGA("IF2 ADC R", SND_SOC_NOPM, 0, 0, NULL, 0),1168 /* Digital Interface Select */1169 SND_SOC_DAPM_MUX("DAI1 RX Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),1170 SND_SOC_DAPM_MUX("DAI1 TX Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),1171 SND_SOC_DAPM_MUX("DAI1 IF1 Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),1172 SND_SOC_DAPM_MUX("DAI1 IF2 Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),1173 SND_SOC_DAPM_MUX("SDI1 TX Mux", SND_SOC_NOPM, 0, 0, &rt5640_sdi_mux),1174 SND_SOC_DAPM_MUX("DAI2 RX Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),1175 SND_SOC_DAPM_MUX("DAI2 TX Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),1176 SND_SOC_DAPM_MUX("DAI2 IF1 Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),1177 SND_SOC_DAPM_MUX("DAI2 IF2 Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),1178 SND_SOC_DAPM_MUX("SDI2 TX Mux", SND_SOC_NOPM, 0, 0, &rt5640_sdi_mux),1179 /* Audio Interface */1180 SND_SOC_DAPM_AIF_IN("AIF1RX", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0),1181 SND_SOC_DAPM_AIF_OUT("AIF1TX", "AIF1 Capture", 0, SND_SOC_NOPM, 0, 0),1182 SND_SOC_DAPM_AIF_IN("AIF2RX", "AIF2 Playback", 0, SND_SOC_NOPM, 0, 0),1183 SND_SOC_DAPM_AIF_OUT("AIF2TX", "AIF2 Capture", 0, SND_SOC_NOPM, 0, 0),1184 1185 /* Output Side */1186 /* DAC mixer before sound effect */1187 SND_SOC_DAPM_MIXER("DAC MIXL", SND_SOC_NOPM, 0, 0,1188 rt5640_dac_l_mix, ARRAY_SIZE(rt5640_dac_l_mix)),1189 SND_SOC_DAPM_MIXER("DAC MIXR", SND_SOC_NOPM, 0, 0,1190 rt5640_dac_r_mix, ARRAY_SIZE(rt5640_dac_r_mix)),1191 1192 /* DAC Mixer */1193 SND_SOC_DAPM_MIXER("Mono DAC MIXL", SND_SOC_NOPM, 0, 0,1194 rt5640_mono_dac_l_mix, ARRAY_SIZE(rt5640_mono_dac_l_mix)),1195 SND_SOC_DAPM_MIXER("Mono DAC MIXR", SND_SOC_NOPM, 0, 0,1196 rt5640_mono_dac_r_mix, ARRAY_SIZE(rt5640_mono_dac_r_mix)),1197 SND_SOC_DAPM_MIXER("DIG MIXL", SND_SOC_NOPM, 0, 0,1198 rt5640_dig_l_mix, ARRAY_SIZE(rt5640_dig_l_mix)),1199 SND_SOC_DAPM_MIXER("DIG MIXR", SND_SOC_NOPM, 0, 0,1200 rt5640_dig_r_mix, ARRAY_SIZE(rt5640_dig_r_mix)),1201 /* DACs */1202 SND_SOC_DAPM_DAC("DAC L1", NULL, SND_SOC_NOPM,1203 0, 0),1204 SND_SOC_DAPM_DAC("DAC R1", NULL, SND_SOC_NOPM,1205 0, 0),1206 SND_SOC_DAPM_SUPPLY("DAC L1 Power", RT5640_PWR_DIG1,1207 RT5640_PWR_DAC_L1_BIT, 0, NULL, 0),1208 SND_SOC_DAPM_SUPPLY("DAC R1 Power", RT5640_PWR_DIG1,1209 RT5640_PWR_DAC_R1_BIT, 0, NULL, 0),1210 SND_SOC_DAPM_SUPPLY("DAC L2 Power", RT5640_PWR_DIG1,1211 RT5640_PWR_DAC_L2_BIT, 0, NULL, 0),1212 SND_SOC_DAPM_SUPPLY("DAC R2 Power", RT5640_PWR_DIG1,1213 RT5640_PWR_DAC_R2_BIT, 0, NULL, 0),1214 /* SPK/OUT Mixer */1215 SND_SOC_DAPM_MIXER("SPK MIXL", RT5640_PWR_MIXER, RT5640_PWR_SM_L_BIT,1216 0, rt5640_spk_l_mix, ARRAY_SIZE(rt5640_spk_l_mix)),1217 SND_SOC_DAPM_MIXER("SPK MIXR", RT5640_PWR_MIXER, RT5640_PWR_SM_R_BIT,1218 0, rt5640_spk_r_mix, ARRAY_SIZE(rt5640_spk_r_mix)),1219 /* Ouput Volume */1220 SND_SOC_DAPM_PGA("SPKVOL L", RT5640_PWR_VOL,1221 RT5640_PWR_SV_L_BIT, 0, NULL, 0),1222 SND_SOC_DAPM_PGA("SPKVOL R", RT5640_PWR_VOL,1223 RT5640_PWR_SV_R_BIT, 0, NULL, 0),1224 SND_SOC_DAPM_PGA("OUTVOL L", RT5640_PWR_VOL,1225 RT5640_PWR_OV_L_BIT, 0, NULL, 0),1226 SND_SOC_DAPM_PGA("OUTVOL R", RT5640_PWR_VOL,1227 RT5640_PWR_OV_R_BIT, 0, NULL, 0),1228 SND_SOC_DAPM_PGA("HPOVOL L", RT5640_PWR_VOL,1229 RT5640_PWR_HV_L_BIT, 0, NULL, 0),1230 SND_SOC_DAPM_PGA("HPOVOL R", RT5640_PWR_VOL,1231 RT5640_PWR_HV_R_BIT, 0, NULL, 0),1232 /* SPO/HPO/LOUT/Mono Mixer */1233 SND_SOC_DAPM_MIXER("SPOL MIX", SND_SOC_NOPM, 0,1234 0, rt5640_spo_l_mix, ARRAY_SIZE(rt5640_spo_l_mix)),1235 SND_SOC_DAPM_MIXER("SPOR MIX", SND_SOC_NOPM, 0,1236 0, rt5640_spo_r_mix, ARRAY_SIZE(rt5640_spo_r_mix)),1237 SND_SOC_DAPM_MIXER("LOUT MIX", SND_SOC_NOPM, 0, 0,1238 rt5640_lout_mix, ARRAY_SIZE(rt5640_lout_mix)),1239 SND_SOC_DAPM_SUPPLY_S("Improve HP Amp Drv", 1, SND_SOC_NOPM,1240 0, 0, rt5640_hp_power_event, SND_SOC_DAPM_POST_PMU),1241 SND_SOC_DAPM_PGA_S("HP Amp", 1, SND_SOC_NOPM, 0, 0,1242 rt5640_hp_event,1243 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),1244 SND_SOC_DAPM_PGA_S("LOUT amp", 1, SND_SOC_NOPM, 0, 0,1245 rt5640_lout_event,1246 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),1247 SND_SOC_DAPM_SUPPLY("HP L Amp", RT5640_PWR_ANLG1,1248 RT5640_PWR_HP_L_BIT, 0, NULL, 0),1249 SND_SOC_DAPM_SUPPLY("HP R Amp", RT5640_PWR_ANLG1,1250 RT5640_PWR_HP_R_BIT, 0, NULL, 0),1251 SND_SOC_DAPM_SUPPLY("Improve SPK Amp Drv", RT5640_PWR_DIG1,1252 RT5640_PWR_CLS_D_BIT, 0, NULL, 0),1253 1254 /* Output Switch */1255 SND_SOC_DAPM_SWITCH("Speaker L Playback", SND_SOC_NOPM, 0, 0,1256 &spk_l_enable_control),1257 SND_SOC_DAPM_SWITCH("Speaker R Playback", SND_SOC_NOPM, 0, 0,1258 &spk_r_enable_control),1259 SND_SOC_DAPM_SWITCH("HP L Playback", SND_SOC_NOPM, 0, 0,1260 &hp_l_enable_control),1261 SND_SOC_DAPM_SWITCH("HP R Playback", SND_SOC_NOPM, 0, 0,1262 &hp_r_enable_control),1263 SND_SOC_DAPM_POST("HP Post", rt5640_hp_post_event),1264 /* Output Lines */1265 SND_SOC_DAPM_OUTPUT("SPOLP"),1266 SND_SOC_DAPM_OUTPUT("SPOLN"),1267 SND_SOC_DAPM_OUTPUT("SPORP"),1268 SND_SOC_DAPM_OUTPUT("SPORN"),1269 SND_SOC_DAPM_OUTPUT("HPOL"),1270 SND_SOC_DAPM_OUTPUT("HPOR"),1271 SND_SOC_DAPM_OUTPUT("LOUTL"),1272 SND_SOC_DAPM_OUTPUT("LOUTR"),1273};1274 1275static const struct snd_soc_dapm_widget rt5640_specific_dapm_widgets[] = {1276 /* Audio DSP */1277 SND_SOC_DAPM_PGA("Audio DSP", SND_SOC_NOPM, 0, 0, NULL, 0),1278 /* ANC */1279 SND_SOC_DAPM_PGA("ANC", SND_SOC_NOPM, 0, 0, NULL, 0),1280 1281 /* DAC2 channel Mux */1282 SND_SOC_DAPM_MUX("DAC L2 Mux", SND_SOC_NOPM, 0, 0, &rt5640_dac_l2_mux),1283 SND_SOC_DAPM_MUX("DAC R2 Mux", SND_SOC_NOPM, 0, 0, &rt5640_dac_r2_mux),1284 1285 SND_SOC_DAPM_MIXER("Stereo DAC MIXL", SND_SOC_NOPM, 0, 0,1286 rt5640_sto_dac_l_mix, ARRAY_SIZE(rt5640_sto_dac_l_mix)),1287 SND_SOC_DAPM_MIXER("Stereo DAC MIXR", SND_SOC_NOPM, 0, 0,1288 rt5640_sto_dac_r_mix, ARRAY_SIZE(rt5640_sto_dac_r_mix)),1289 1290 SND_SOC_DAPM_DAC("DAC R2", NULL, SND_SOC_NOPM, 0,1291 0),1292 SND_SOC_DAPM_DAC("DAC L2", NULL, SND_SOC_NOPM, 0,1293 0),1294 1295 SND_SOC_DAPM_MIXER("OUT MIXL", RT5640_PWR_MIXER, RT5640_PWR_OM_L_BIT,1296 0, rt5640_out_l_mix, ARRAY_SIZE(rt5640_out_l_mix)),1297 SND_SOC_DAPM_MIXER("OUT MIXR", RT5640_PWR_MIXER, RT5640_PWR_OM_R_BIT,1298 0, rt5640_out_r_mix, ARRAY_SIZE(rt5640_out_r_mix)),1299 1300 SND_SOC_DAPM_MIXER("HPO MIX L", SND_SOC_NOPM, 0, 0,1301 rt5640_hpo_mix, ARRAY_SIZE(rt5640_hpo_mix)),1302 SND_SOC_DAPM_MIXER("HPO MIX R", SND_SOC_NOPM, 0, 0,1303 rt5640_hpo_mix, ARRAY_SIZE(rt5640_hpo_mix)),1304 1305 SND_SOC_DAPM_MIXER("Mono MIX", RT5640_PWR_ANLG1, RT5640_PWR_MM_BIT, 0,1306 rt5640_mono_mix, ARRAY_SIZE(rt5640_mono_mix)),1307 SND_SOC_DAPM_SUPPLY("Improve MONO Amp Drv", RT5640_PWR_ANLG1,1308 RT5640_PWR_MA_BIT, 0, NULL, 0),1309 1310 SND_SOC_DAPM_OUTPUT("MONOP"),1311 SND_SOC_DAPM_OUTPUT("MONON"),1312};1313 1314static const struct snd_soc_dapm_widget rt5639_specific_dapm_widgets[] = {1315 SND_SOC_DAPM_MIXER("Stereo DAC MIXL", SND_SOC_NOPM, 0, 0,1316 rt5639_sto_dac_l_mix, ARRAY_SIZE(rt5639_sto_dac_l_mix)),1317 SND_SOC_DAPM_MIXER("Stereo DAC MIXR", SND_SOC_NOPM, 0, 0,1318 rt5639_sto_dac_r_mix, ARRAY_SIZE(rt5639_sto_dac_r_mix)),1319 1320 SND_SOC_DAPM_MIXER("OUT MIXL", RT5640_PWR_MIXER, RT5640_PWR_OM_L_BIT,1321 0, rt5639_out_l_mix, ARRAY_SIZE(rt5639_out_l_mix)),1322 SND_SOC_DAPM_MIXER("OUT MIXR", RT5640_PWR_MIXER, RT5640_PWR_OM_R_BIT,1323 0, rt5639_out_r_mix, ARRAY_SIZE(rt5639_out_r_mix)),1324 1325 SND_SOC_DAPM_MIXER("HPO MIX L", SND_SOC_NOPM, 0, 0,1326 rt5639_hpo_mix, ARRAY_SIZE(rt5639_hpo_mix)),1327 SND_SOC_DAPM_MIXER("HPO MIX R", SND_SOC_NOPM, 0, 0,1328 rt5639_hpo_mix, ARRAY_SIZE(rt5639_hpo_mix)),1329};1330 1331static const struct snd_soc_dapm_route rt5640_dapm_routes[] = {1332 { "I2S1", NULL, "Stereo Filter ASRC", is_using_asrc },1333 { "I2S2", NULL, "I2S2 ASRC", is_using_asrc },1334 { "I2S2", NULL, "I2S2 Filter ASRC", is_using_asrc },1335 { "DMIC1", NULL, "DMIC1 ASRC", is_using_asrc },1336 { "DMIC2", NULL, "DMIC2 ASRC", is_using_asrc },1337 1338 {"IN1P", NULL, "LDO2"},1339 {"IN2P", NULL, "LDO2"},1340 {"IN3P", NULL, "LDO2"},1341 1342 {"DMIC L1", NULL, "DMIC1"},1343 {"DMIC R1", NULL, "DMIC1"},1344 {"DMIC L2", NULL, "DMIC2"},1345 {"DMIC R2", NULL, "DMIC2"},1346 1347 {"BST1", NULL, "IN1P"},1348 {"BST1", NULL, "IN1N"},1349 {"BST2", NULL, "IN2P"},1350 {"BST2", NULL, "IN2N"},1351 {"BST3", NULL, "IN3P"},1352 {"BST3", NULL, "IN3N"},1353 1354 {"INL VOL", NULL, "IN2P"},1355 {"INR VOL", NULL, "IN2N"},1356 1357 {"RECMIXL", "HPOL Switch", "HPOL"},1358 {"RECMIXL", "INL Switch", "INL VOL"},1359 {"RECMIXL", "BST3 Switch", "BST3"},1360 {"RECMIXL", "BST2 Switch", "BST2"},1361 {"RECMIXL", "BST1 Switch", "BST1"},1362 {"RECMIXL", "OUT MIXL Switch", "OUT MIXL"},1363 1364 {"RECMIXR", "HPOR Switch", "HPOR"},1365 {"RECMIXR", "INR Switch", "INR VOL"},1366 {"RECMIXR", "BST3 Switch", "BST3"},1367 {"RECMIXR", "BST2 Switch", "BST2"},1368 {"RECMIXR", "BST1 Switch", "BST1"},1369 {"RECMIXR", "OUT MIXR Switch", "OUT MIXR"},1370 1371 {"ADC L", NULL, "RECMIXL"},1372 {"ADC R", NULL, "RECMIXR"},1373 1374 {"DMIC L1", NULL, "DMIC CLK"},1375 {"DMIC L1", NULL, "DMIC1 Power"},1376 {"DMIC R1", NULL, "DMIC CLK"},1377 {"DMIC R1", NULL, "DMIC1 Power"},1378 {"DMIC L2", NULL, "DMIC CLK"},1379 {"DMIC L2", NULL, "DMIC2 Power"},1380 {"DMIC R2", NULL, "DMIC CLK"},1381 {"DMIC R2", NULL, "DMIC2 Power"},1382 1383 {"Stereo ADC L2 Mux", "DMIC1", "DMIC L1"},1384 {"Stereo ADC L2 Mux", "DMIC2", "DMIC L2"},1385 {"Stereo ADC L2 Mux", "DIG MIX", "DIG MIXL"},1386 {"Stereo ADC L1 Mux", "ADC", "ADC L"},1387 {"Stereo ADC L1 Mux", "DIG MIX", "DIG MIXL"},1388 1389 {"Stereo ADC R1 Mux", "ADC", "ADC R"},1390 {"Stereo ADC R1 Mux", "DIG MIX", "DIG MIXR"},1391 {"Stereo ADC R2 Mux", "DMIC1", "DMIC R1"},1392 {"Stereo ADC R2 Mux", "DMIC2", "DMIC R2"},1393 {"Stereo ADC R2 Mux", "DIG MIX", "DIG MIXR"},1394 1395 {"Mono ADC L2 Mux", "DMIC L1", "DMIC L1"},1396 {"Mono ADC L2 Mux", "DMIC L2", "DMIC L2"},1397 {"Mono ADC L2 Mux", "Mono DAC MIXL", "Mono DAC MIXL"},1398 {"Mono ADC L1 Mux", "Mono DAC MIXL", "Mono DAC MIXL"},1399 {"Mono ADC L1 Mux", "ADCL", "ADC L"},1400 1401 {"Mono ADC R1 Mux", "Mono DAC MIXR", "Mono DAC MIXR"},1402 {"Mono ADC R1 Mux", "ADCR", "ADC R"},1403 {"Mono ADC R2 Mux", "DMIC R1", "DMIC R1"},1404 {"Mono ADC R2 Mux", "DMIC R2", "DMIC R2"},1405 {"Mono ADC R2 Mux", "Mono DAC MIXR", "Mono DAC MIXR"},1406 1407 {"Stereo ADC MIXL", "ADC1 Switch", "Stereo ADC L1 Mux"},1408 {"Stereo ADC MIXL", "ADC2 Switch", "Stereo ADC L2 Mux"},1409 {"Stereo ADC MIXL", NULL, "Stereo Filter"},1410 1411 {"Stereo ADC MIXR", "ADC1 Switch", "Stereo ADC R1 Mux"},1412 {"Stereo ADC MIXR", "ADC2 Switch", "Stereo ADC R2 Mux"},1413 {"Stereo ADC MIXR", NULL, "Stereo Filter"},1414 1415 {"Mono ADC MIXL", "ADC1 Switch", "Mono ADC L1 Mux"},1416 {"Mono ADC MIXL", "ADC2 Switch", "Mono ADC L2 Mux"},1417 {"Mono ADC MIXL", NULL, "Mono Left Filter"},1418 1419 {"Mono ADC MIXR", "ADC1 Switch", "Mono ADC R1 Mux"},1420 {"Mono ADC MIXR", "ADC2 Switch", "Mono ADC R2 Mux"},1421 {"Mono ADC MIXR", NULL, "Mono Right Filter"},1422 1423 {"IF2 ADC L", NULL, "Mono ADC MIXL"},1424 {"IF2 ADC R", NULL, "Mono ADC MIXR"},1425 {"IF1 ADC L", NULL, "Stereo ADC MIXL"},1426 {"IF1 ADC R", NULL, "Stereo ADC MIXR"},1427 1428 {"IF1 ADC", NULL, "I2S1"},1429 {"IF1 ADC", NULL, "IF1 ADC L"},1430 {"IF1 ADC", NULL, "IF1 ADC R"},1431 {"IF2 ADC", NULL, "I2S2"},1432 {"IF2 ADC", NULL, "IF2 ADC L"},1433 {"IF2 ADC", NULL, "IF2 ADC R"},1434 1435 {"DAI1 TX Mux", "1:1|2:2", "IF1 ADC"},1436 {"DAI1 TX Mux", "1:2|2:1", "IF2 ADC"},1437 {"DAI1 IF1 Mux", "1:1|2:1", "IF1 ADC"},1438 {"DAI1 IF2 Mux", "1:1|2:1", "IF2 ADC"},1439 {"SDI1 TX Mux", "IF1", "DAI1 IF1 Mux"},1440 {"SDI1 TX Mux", "IF2", "DAI1 IF2 Mux"},1441 1442 {"DAI2 TX Mux", "1:2|2:1", "IF1 ADC"},1443 {"DAI2 TX Mux", "1:1|2:2", "IF2 ADC"},1444 {"DAI2 IF1 Mux", "1:2|2:2", "IF1 ADC"},1445 {"DAI2 IF2 Mux", "1:2|2:2", "IF2 ADC"},1446 {"SDI2 TX Mux", "IF1", "DAI2 IF1 Mux"},1447 {"SDI2 TX Mux", "IF2", "DAI2 IF2 Mux"},1448 1449 {"AIF1TX", NULL, "DAI1 TX Mux"},1450 {"AIF1TX", NULL, "SDI1 TX Mux"},1451 {"AIF2TX", NULL, "DAI2 TX Mux"},1452 {"AIF2TX", NULL, "SDI2 TX Mux"},1453 1454 {"DAI1 RX Mux", "1:1|2:2", "AIF1RX"},1455 {"DAI1 RX Mux", "1:1|2:1", "AIF1RX"},1456 {"DAI1 RX Mux", "1:2|2:1", "AIF2RX"},1457 {"DAI1 RX Mux", "1:2|2:2", "AIF2RX"},1458 1459 {"DAI2 RX Mux", "1:2|2:1", "AIF1RX"},1460 {"DAI2 RX Mux", "1:1|2:1", "AIF1RX"},1461 {"DAI2 RX Mux", "1:1|2:2", "AIF2RX"},1462 {"DAI2 RX Mux", "1:2|2:2", "AIF2RX"},1463 1464 {"IF1 DAC", NULL, "I2S1"},1465 {"IF1 DAC", NULL, "DAI1 RX Mux"},1466 {"IF2 DAC", NULL, "I2S2"},1467 {"IF2 DAC", NULL, "DAI2 RX Mux"},1468 1469 {"IF1 DAC L", NULL, "IF1 DAC"},1470 {"IF1 DAC R", NULL, "IF1 DAC"},1471 {"IF2 DAC L", NULL, "IF2 DAC"},1472 {"IF2 DAC R", NULL, "IF2 DAC"},1473 1474 {"DAC MIXL", "Stereo ADC Switch", "Stereo ADC MIXL"},1475 {"DAC MIXL", "INF1 Switch", "IF1 DAC L"},1476 {"DAC MIXL", NULL, "DAC L1 Power"},1477 {"DAC MIXR", "Stereo ADC Switch", "Stereo ADC MIXR"},1478 {"DAC MIXR", "INF1 Switch", "IF1 DAC R"},1479 {"DAC MIXR", NULL, "DAC R1 Power"},1480 1481 {"Stereo DAC MIXL", "DAC L1 Switch", "DAC MIXL"},1482 {"Stereo DAC MIXR", "DAC R1 Switch", "DAC MIXR"},1483 1484 {"Mono DAC MIXL", "DAC L1 Switch", "DAC MIXL"},1485 {"Mono DAC MIXR", "DAC R1 Switch", "DAC MIXR"},1486 1487 {"DIG MIXL", "DAC L1 Switch", "DAC MIXL"},1488 {"DIG MIXR", "DAC R1 Switch", "DAC MIXR"},1489 1490 {"DAC L1", NULL, "Stereo DAC MIXL"},1491 {"DAC L1", NULL, "DAC L1 Power"},1492 {"DAC R1", NULL, "Stereo DAC MIXR"},1493 {"DAC R1", NULL, "DAC R1 Power"},1494 1495 {"SPK MIXL", "REC MIXL Switch", "RECMIXL"},1496 {"SPK MIXL", "INL Switch", "INL VOL"},1497 {"SPK MIXL", "DAC L1 Switch", "DAC L1"},1498 {"SPK MIXL", "OUT MIXL Switch", "OUT MIXL"},1499 {"SPK MIXR", "REC MIXR Switch", "RECMIXR"},1500 {"SPK MIXR", "INR Switch", "INR VOL"},1501 {"SPK MIXR", "DAC R1 Switch", "DAC R1"},1502 {"SPK MIXR", "OUT MIXR Switch", "OUT MIXR"},1503 1504 {"OUT MIXL", "BST1 Switch", "BST1"},1505 {"OUT MIXL", "INL Switch", "INL VOL"},1506 {"OUT MIXL", "REC MIXL Switch", "RECMIXL"},1507 {"OUT MIXL", "DAC L1 Switch", "DAC L1"},1508 1509 {"OUT MIXR", "BST2 Switch", "BST2"},1510 {"OUT MIXR", "BST1 Switch", "BST1"},1511 {"OUT MIXR", "INR Switch", "INR VOL"},1512 {"OUT MIXR", "REC MIXR Switch", "RECMIXR"},1513 {"OUT MIXR", "DAC R1 Switch", "DAC R1"},1514 1515 {"SPKVOL L", NULL, "SPK MIXL"},1516 {"SPKVOL R", NULL, "SPK MIXR"},1517 {"HPOVOL L", NULL, "OUT MIXL"},1518 {"HPOVOL R", NULL, "OUT MIXR"},1519 {"OUTVOL L", NULL, "OUT MIXL"},1520 {"OUTVOL R", NULL, "OUT MIXR"},1521 1522 {"SPOL MIX", "DAC R1 Switch", "DAC R1"},1523 {"SPOL MIX", "DAC L1 Switch", "DAC L1"},1524 {"SPOL MIX", "SPKVOL R Switch", "SPKVOL R"},1525 {"SPOL MIX", "SPKVOL L Switch", "SPKVOL L"},1526 {"SPOL MIX", "BST1 Switch", "BST1"},1527 {"SPOR MIX", "DAC R1 Switch", "DAC R1"},1528 {"SPOR MIX", "SPKVOL R Switch", "SPKVOL R"},1529 {"SPOR MIX", "BST1 Switch", "BST1"},1530 1531 {"HPO MIX L", "HPO MIX DAC1 Switch", "DAC L1"},1532 {"HPO MIX L", "HPO MIX HPVOL Switch", "HPOVOL L"},1533 {"HPO MIX L", NULL, "HP L Amp"},1534 {"HPO MIX R", "HPO MIX DAC1 Switch", "DAC R1"},1535 {"HPO MIX R", "HPO MIX HPVOL Switch", "HPOVOL R"},1536 {"HPO MIX R", NULL, "HP R Amp"},1537 1538 {"LOUT MIX", "DAC L1 Switch", "DAC L1"},1539 {"LOUT MIX", "DAC R1 Switch", "DAC R1"},1540 {"LOUT MIX", "OUTVOL L Switch", "OUTVOL L"},1541 {"LOUT MIX", "OUTVOL R Switch", "OUTVOL R"},1542 1543 {"HP Amp", NULL, "HPO MIX L"},1544 {"HP Amp", NULL, "HPO MIX R"},1545 1546 {"Speaker L Playback", "Switch", "SPOL MIX"},1547 {"Speaker R Playback", "Switch", "SPOR MIX"},1548 {"SPOLP", NULL, "Speaker L Playback"},1549 {"SPOLN", NULL, "Speaker L Playback"},1550 {"SPORP", NULL, "Speaker R Playback"},1551 {"SPORN", NULL, "Speaker R Playback"},1552 1553 {"SPOLP", NULL, "Improve SPK Amp Drv"},1554 {"SPOLN", NULL, "Improve SPK Amp Drv"},1555 {"SPORP", NULL, "Improve SPK Amp Drv"},1556 {"SPORN", NULL, "Improve SPK Amp Drv"},1557 1558 {"HPOL", NULL, "Improve HP Amp Drv"},1559 {"HPOR", NULL, "Improve HP Amp Drv"},1560 1561 {"HP L Playback", "Switch", "HP Amp"},1562 {"HP R Playback", "Switch", "HP Amp"},1563 {"HPOL", NULL, "HP L Playback"},1564 {"HPOR", NULL, "HP R Playback"},1565 1566 {"LOUT amp", NULL, "LOUT MIX"},1567 {"LOUTL", NULL, "LOUT amp"},1568 {"LOUTR", NULL, "LOUT amp"},1569};1570 1571static const struct snd_soc_dapm_route rt5640_specific_dapm_routes[] = {1572 {"ANC", NULL, "Stereo ADC MIXL"},1573 {"ANC", NULL, "Stereo ADC MIXR"},1574 1575 {"Audio DSP", NULL, "DAC MIXL"},1576 {"Audio DSP", NULL, "DAC MIXR"},1577 1578 {"DAC L2 Mux", "IF2", "IF2 DAC L"},1579 {"DAC L2 Mux", "Base L/R", "Audio DSP"},1580 {"DAC L2 Mux", NULL, "DAC L2 Power"},1581 {"DAC R2 Mux", "IF2", "IF2 DAC R"},1582 {"DAC R2 Mux", NULL, "DAC R2 Power"},1583 1584 {"Stereo DAC MIXL", "DAC L2 Switch", "DAC L2 Mux"},1585 {"Stereo DAC MIXL", "ANC Switch", "ANC"},1586 {"Stereo DAC MIXR", "DAC R2 Switch", "DAC R2 Mux"},1587 {"Stereo DAC MIXR", "ANC Switch", "ANC"},1588 1589 {"Mono DAC MIXL", "DAC L2 Switch", "DAC L2 Mux"},1590 {"Mono DAC MIXL", "DAC R2 Switch", "DAC R2 Mux"},1591 1592 {"Mono DAC MIXR", "DAC R2 Switch", "DAC R2 Mux"},1593 {"Mono DAC MIXR", "DAC L2 Switch", "DAC L2 Mux"},1594 1595 {"DIG MIXR", "DAC R2 Switch", "DAC R2 Mux"},1596 {"DIG MIXL", "DAC L2 Switch", "DAC L2 Mux"},1597 1598 {"DAC L2", NULL, "Mono DAC MIXL"},1599 {"DAC L2", NULL, "DAC L2 Power"},1600 {"DAC R2", NULL, "Mono DAC MIXR"},1601 {"DAC R2", NULL, "DAC R2 Power"},1602 1603 {"SPK MIXL", "DAC L2 Switch", "DAC L2"},1604 {"SPK MIXR", "DAC R2 Switch", "DAC R2"},1605 1606 {"OUT MIXL", "SPK MIXL Switch", "SPK MIXL"},1607 {"OUT MIXR", "SPK MIXR Switch", "SPK MIXR"},1608 1609 {"OUT MIXL", "DAC R2 Switch", "DAC R2"},1610 {"OUT MIXL", "DAC L2 Switch", "DAC L2"},1611 1612 {"OUT MIXR", "DAC L2 Switch", "DAC L2"},1613 {"OUT MIXR", "DAC R2 Switch", "DAC R2"},1614 1615 {"HPO MIX L", "HPO MIX DAC2 Switch", "DAC L2"},1616 {"HPO MIX R", "HPO MIX DAC2 Switch", "DAC R2"},1617 1618 {"Mono MIX", "DAC R2 Switch", "DAC R2"},1619 {"Mono MIX", "DAC L2 Switch", "DAC L2"},1620 {"Mono MIX", "OUTVOL R Switch", "OUTVOL R"},1621 {"Mono MIX", "OUTVOL L Switch", "OUTVOL L"},1622 {"Mono MIX", "BST1 Switch", "BST1"},1623 1624 {"MONOP", NULL, "Mono MIX"},1625 {"MONON", NULL, "Mono MIX"},1626 {"MONOP", NULL, "Improve MONO Amp Drv"},1627};1628 1629static const struct snd_soc_dapm_route rt5639_specific_dapm_routes[] = {1630 {"Stereo DAC MIXL", "DAC L2 Switch", "IF2 DAC L"},1631 {"Stereo DAC MIXR", "DAC R2 Switch", "IF2 DAC R"},1632 1633 {"Mono DAC MIXL", "DAC L2 Switch", "IF2 DAC L"},1634 {"Mono DAC MIXL", "DAC R2 Switch", "IF2 DAC R"},1635 1636 {"Mono DAC MIXR", "DAC R2 Switch", "IF2 DAC R"},1637 {"Mono DAC MIXR", "DAC L2 Switch", "IF2 DAC L"},1638 1639 {"DIG MIXL", "DAC L2 Switch", "IF2 DAC L"},1640 {"DIG MIXR", "DAC R2 Switch", "IF2 DAC R"},1641 1642 {"IF2 DAC L", NULL, "DAC L2 Power"},1643 {"IF2 DAC R", NULL, "DAC R2 Power"},1644};1645 1646static int get_sdp_info(struct snd_soc_component *component, int dai_id)1647{1648 int ret = 0, val;1649 1650 if (component == NULL)1651 return -EINVAL;1652 1653 val = snd_soc_component_read(component, RT5640_I2S1_SDP);1654 val = (val & RT5640_I2S_IF_MASK) >> RT5640_I2S_IF_SFT;1655 switch (dai_id) {1656 case RT5640_AIF1:1657 switch (val) {1658 case RT5640_IF_123:1659 case RT5640_IF_132:1660 ret |= RT5640_U_IF1;1661 break;1662 case RT5640_IF_113:1663 ret |= RT5640_U_IF1;1664 fallthrough;1665 case RT5640_IF_312:1666 case RT5640_IF_213:1667 ret |= RT5640_U_IF2;1668 break;1669 }1670 break;1671 1672 case RT5640_AIF2:1673 switch (val) {1674 case RT5640_IF_231:1675 case RT5640_IF_213:1676 ret |= RT5640_U_IF1;1677 break;1678 case RT5640_IF_223:1679 ret |= RT5640_U_IF1;1680 fallthrough;1681 case RT5640_IF_123:1682 case RT5640_IF_321:1683 ret |= RT5640_U_IF2;1684 break;1685 }1686 break;1687 1688 default:1689 ret = -EINVAL;1690 break;1691 }1692 1693 return ret;1694}1695 1696static int rt5640_hw_params(struct snd_pcm_substream *substream,1697 struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)1698{1699 struct snd_soc_component *component = dai->component;1700 struct rt5640_priv *rt5640 = snd_soc_component_get_drvdata(component);1701 unsigned int val_len = 0, val_clk, mask_clk;1702 int dai_sel, pre_div, bclk_ms, frame_size;1703 1704 rt5640->lrck[dai->id] = params_rate(params);1705 pre_div = rl6231_get_clk_info(rt5640->sysclk, rt5640->lrck[dai->id]);1706 if (pre_div < 0) {1707 dev_err(component->dev, "Unsupported clock setting %d for DAI %d\n",1708 rt5640->lrck[dai->id], dai->id);1709 return -EINVAL;1710 }1711 frame_size = snd_soc_params_to_frame_size(params);1712 if (frame_size < 0) {1713 dev_err(component->dev, "Unsupported frame size: %d\n", frame_size);1714 return frame_size;1715 }1716 if (frame_size > 32)1717 bclk_ms = 1;1718 else1719 bclk_ms = 0;1720 rt5640->bclk[dai->id] = rt5640->lrck[dai->id] * (32 << bclk_ms);1721 1722 dev_dbg(dai->dev, "bclk is %dHz and lrck is %dHz\n",1723 rt5640->bclk[dai->id], rt5640->lrck[dai->id]);1724 dev_dbg(dai->dev, "bclk_ms is %d and pre_div is %d for iis %d\n",1725 bclk_ms, pre_div, dai->id);1726 1727 switch (params_width(params)) {1728 case 16:1729 break;1730 case 20:1731 val_len |= RT5640_I2S_DL_20;1732 break;1733 case 24:1734 val_len |= RT5640_I2S_DL_24;1735 break;1736 case 8:1737 val_len |= RT5640_I2S_DL_8;1738 break;1739 default:1740 return -EINVAL;1741 }1742 1743 dai_sel = get_sdp_info(component, dai->id);1744 if (dai_sel < 0) {1745 dev_err(component->dev, "Failed to get sdp info: %d\n", dai_sel);1746 return -EINVAL;1747 }1748 if (dai_sel & RT5640_U_IF1) {1749 mask_clk = RT5640_I2S_BCLK_MS1_MASK | RT5640_I2S_PD1_MASK;1750 val_clk = bclk_ms << RT5640_I2S_BCLK_MS1_SFT |1751 pre_div << RT5640_I2S_PD1_SFT;1752 snd_soc_component_update_bits(component, RT5640_I2S1_SDP,1753 RT5640_I2S_DL_MASK, val_len);1754 snd_soc_component_update_bits(component, RT5640_ADDA_CLK1, mask_clk, val_clk);1755 }1756 if (dai_sel & RT5640_U_IF2) {1757 mask_clk = RT5640_I2S_BCLK_MS2_MASK | RT5640_I2S_PD2_MASK;1758 val_clk = bclk_ms << RT5640_I2S_BCLK_MS2_SFT |1759 pre_div << RT5640_I2S_PD2_SFT;1760 snd_soc_component_update_bits(component, RT5640_I2S2_SDP,1761 RT5640_I2S_DL_MASK, val_len);1762 snd_soc_component_update_bits(component, RT5640_ADDA_CLK1, mask_clk, val_clk);1763 }1764 1765 return 0;1766}1767 1768static int rt5640_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)1769{1770 struct snd_soc_component *component = dai->component;1771 struct rt5640_priv *rt5640 = snd_soc_component_get_drvdata(component);1772 unsigned int reg_val = 0;1773 int dai_sel;1774 1775 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {1776 case SND_SOC_DAIFMT_CBM_CFM:1777 rt5640->master[dai->id] = 1;1778 break;1779 case SND_SOC_DAIFMT_CBS_CFS:1780 reg_val |= RT5640_I2S_MS_S;1781 rt5640->master[dai->id] = 0;1782 break;1783 default:1784 return -EINVAL;1785 }1786 1787 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {1788 case SND_SOC_DAIFMT_NB_NF:1789 break;1790 case SND_SOC_DAIFMT_IB_NF:1791 reg_val |= RT5640_I2S_BP_INV;1792 break;1793 default:1794 return -EINVAL;1795 }1796 1797 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {1798 case SND_SOC_DAIFMT_I2S:1799 break;1800 case SND_SOC_DAIFMT_LEFT_J:1801 reg_val |= RT5640_I2S_DF_LEFT;1802 break;1803 case SND_SOC_DAIFMT_DSP_A:1804 reg_val |= RT5640_I2S_DF_PCM_A;1805 break;1806 case SND_SOC_DAIFMT_DSP_B:1807 reg_val |= RT5640_I2S_DF_PCM_B;1808 break;1809 default:1810 return -EINVAL;1811 }1812 1813 dai_sel = get_sdp_info(component, dai->id);1814 if (dai_sel < 0) {1815 dev_err(component->dev, "Failed to get sdp info: %d\n", dai_sel);1816 return -EINVAL;1817 }1818 if (dai_sel & RT5640_U_IF1) {1819 snd_soc_component_update_bits(component, RT5640_I2S1_SDP,1820 RT5640_I2S_MS_MASK | RT5640_I2S_BP_MASK |1821 RT5640_I2S_DF_MASK, reg_val);1822 }1823 if (dai_sel & RT5640_U_IF2) {1824 snd_soc_component_update_bits(component, RT5640_I2S2_SDP,1825 RT5640_I2S_MS_MASK | RT5640_I2S_BP_MASK |1826 RT5640_I2S_DF_MASK, reg_val);1827 }1828 1829 return 0;1830}1831 1832static int rt5640_set_dai_sysclk(struct snd_soc_dai *dai,1833 int clk_id, unsigned int freq, int dir)1834{1835 struct snd_soc_component *component = dai->component;1836 struct rt5640_priv *rt5640 = snd_soc_component_get_drvdata(component);1837 unsigned int reg_val = 0;1838 unsigned int pll_bit = 0;1839 int ret;1840 1841 switch (clk_id) {1842 case RT5640_SCLK_S_MCLK:1843 ret = clk_set_rate(rt5640->mclk, freq);1844 if (ret)1845 return ret;1846 1847 reg_val |= RT5640_SCLK_SRC_MCLK;1848 break;1849 case RT5640_SCLK_S_PLL1:1850 reg_val |= RT5640_SCLK_SRC_PLL1;1851 pll_bit |= RT5640_PWR_PLL;1852 break;1853 case RT5640_SCLK_S_RCCLK:1854 reg_val |= RT5640_SCLK_SRC_RCCLK;1855 break;1856 default:1857 dev_err(component->dev, "Invalid clock id (%d)\n", clk_id);1858 return -EINVAL;1859 }1860 snd_soc_component_update_bits(component, RT5640_PWR_ANLG2,1861 RT5640_PWR_PLL, pll_bit);1862 snd_soc_component_update_bits(component, RT5640_GLB_CLK,1863 RT5640_SCLK_SRC_MASK, reg_val);1864 rt5640->sysclk = freq;1865 rt5640->sysclk_src = clk_id;1866 1867 dev_dbg(dai->dev, "Sysclk is %dHz and clock id is %d\n", freq, clk_id);1868 return 0;1869}1870 1871static int rt5640_set_dai_pll(struct snd_soc_dai *dai, int pll_id, int source,1872 unsigned int freq_in, unsigned int freq_out)1873{1874 struct snd_soc_component *component = dai->component;1875 struct rt5640_priv *rt5640 = snd_soc_component_get_drvdata(component);1876 struct rl6231_pll_code pll_code;1877 int ret;1878 1879 if (source == rt5640->pll_src && freq_in == rt5640->pll_in &&1880 freq_out == rt5640->pll_out)1881 return 0;1882 1883 if (!freq_in || !freq_out) {1884 dev_dbg(component->dev, "PLL disabled\n");1885 1886 rt5640->pll_in = 0;1887 rt5640->pll_out = 0;1888 snd_soc_component_update_bits(component, RT5640_GLB_CLK,1889 RT5640_SCLK_SRC_MASK, RT5640_SCLK_SRC_MCLK);1890 return 0;1891 }1892 1893 switch (source) {1894 case RT5640_PLL1_S_MCLK:1895 snd_soc_component_update_bits(component, RT5640_GLB_CLK,1896 RT5640_PLL1_SRC_MASK, RT5640_PLL1_SRC_MCLK);1897 break;1898 case RT5640_PLL1_S_BCLK1:1899 snd_soc_component_update_bits(component, RT5640_GLB_CLK,1900 RT5640_PLL1_SRC_MASK, RT5640_PLL1_SRC_BCLK1);1901 break;1902 case RT5640_PLL1_S_BCLK2:1903 snd_soc_component_update_bits(component, RT5640_GLB_CLK,1904 RT5640_PLL1_SRC_MASK, RT5640_PLL1_SRC_BCLK2);1905 break;1906 default:1907 dev_err(component->dev, "Unknown PLL source %d\n", source);1908 return -EINVAL;1909 }1910 1911 ret = rl6231_pll_calc(freq_in, freq_out, &pll_code);1912 if (ret < 0) {1913 dev_err(component->dev, "Unsupported input clock %d\n", freq_in);1914 return ret;1915 }1916 1917 dev_dbg(component->dev, "bypass=%d m=%d n=%d k=%d\n",1918 pll_code.m_bp, (pll_code.m_bp ? 0 : pll_code.m_code),1919 pll_code.n_code, pll_code.k_code);1920 1921 snd_soc_component_write(component, RT5640_PLL_CTRL1,1922 (pll_code.n_code << RT5640_PLL_N_SFT) | pll_code.k_code);1923 snd_soc_component_write(component, RT5640_PLL_CTRL2,1924 ((pll_code.m_bp ? 0 : pll_code.m_code) << RT5640_PLL_M_SFT) |1925 (pll_code.m_bp << RT5640_PLL_M_BP_SFT));1926 1927 rt5640->pll_in = freq_in;1928 rt5640->pll_out = freq_out;1929 rt5640->pll_src = source;1930 1931 return 0;1932}1933 1934static int rt5640_set_bias_level(struct snd_soc_component *component,1935 enum snd_soc_bias_level level)1936{1937 struct rt5640_priv *rt5640 = snd_soc_component_get_drvdata(component);1938 int ret;1939 1940 switch (level) {1941 case SND_SOC_BIAS_ON:1942 break;1943 1944 case SND_SOC_BIAS_PREPARE:1945 /*1946 * SND_SOC_BIAS_PREPARE is called while preparing for a1947 * transition to ON or away from ON. If current bias_level1948 * is SND_SOC_BIAS_ON, then it is preparing for a transition1949 * away from ON. Disable the clock in that case, otherwise1950 * enable it.1951 */1952 if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_ON) {1953 clk_disable_unprepare(rt5640->mclk);1954 } else {1955 ret = clk_prepare_enable(rt5640->mclk);1956 if (ret)1957 return ret;1958 }1959 break;1960 1961 case SND_SOC_BIAS_STANDBY:1962 if (SND_SOC_BIAS_OFF == snd_soc_component_get_bias_level(component)) {1963 snd_soc_component_update_bits(component, RT5640_PWR_ANLG1,1964 RT5640_PWR_VREF1 | RT5640_PWR_MB |1965 RT5640_PWR_BG | RT5640_PWR_VREF2,1966 RT5640_PWR_VREF1 | RT5640_PWR_MB |1967 RT5640_PWR_BG | RT5640_PWR_VREF2);1968 usleep_range(10000, 15000);1969 snd_soc_component_update_bits(component, RT5640_PWR_ANLG1,1970 RT5640_PWR_FV1 | RT5640_PWR_FV2,1971 RT5640_PWR_FV1 | RT5640_PWR_FV2);1972 snd_soc_component_update_bits(component, RT5640_DUMMY1,1973 0x1, 0x1);1974 snd_soc_component_update_bits(component, RT5640_MICBIAS,1975 0x0030, 0x0030);1976 }1977 break;1978 1979 case SND_SOC_BIAS_OFF:1980 snd_soc_component_write(component, RT5640_DEPOP_M1, 0x0004);1981 snd_soc_component_write(component, RT5640_DEPOP_M2, 0x1100);1982 snd_soc_component_update_bits(component, RT5640_DUMMY1, 0x1, 0);1983 snd_soc_component_write(component, RT5640_PWR_DIG1, 0x0000);1984 snd_soc_component_write(component, RT5640_PWR_DIG2, 0x0000);1985 snd_soc_component_write(component, RT5640_PWR_VOL, 0x0000);1986 snd_soc_component_write(component, RT5640_PWR_MIXER, 0x0000);1987 if (rt5640->jd_src == RT5640_JD_SRC_HDA_HEADER)1988 snd_soc_component_write(component, RT5640_PWR_ANLG1,1989 0x2818);1990 else1991 snd_soc_component_write(component, RT5640_PWR_ANLG1,1992 0x0000);1993 snd_soc_component_write(component, RT5640_PWR_ANLG2, 0x0000);1994 break;1995 1996 default:1997 break;1998 }1999 2000 return 0;2001}2002 2003int rt5640_dmic_enable(struct snd_soc_component *component,2004 bool dmic1_data_pin, bool dmic2_data_pin)2005{2006 struct rt5640_priv *rt5640 = snd_soc_component_get_drvdata(component);2007 2008 regmap_update_bits(rt5640->regmap, RT5640_GPIO_CTRL1,2009 RT5640_GP2_PIN_MASK, RT5640_GP2_PIN_DMIC1_SCL);2010 2011 if (dmic1_data_pin) {2012 regmap_update_bits(rt5640->regmap, RT5640_DMIC,2013 RT5640_DMIC_1_DP_MASK, RT5640_DMIC_1_DP_GPIO3);2014 regmap_update_bits(rt5640->regmap, RT5640_GPIO_CTRL1,2015 RT5640_GP3_PIN_MASK, RT5640_GP3_PIN_DMIC1_SDA);2016 }2017 2018 if (dmic2_data_pin) {2019 regmap_update_bits(rt5640->regmap, RT5640_DMIC,2020 RT5640_DMIC_2_DP_MASK, RT5640_DMIC_2_DP_GPIO4);2021 regmap_update_bits(rt5640->regmap, RT5640_GPIO_CTRL1,2022 RT5640_GP4_PIN_MASK, RT5640_GP4_PIN_DMIC2_SDA);2023 }2024 2025 return 0;2026}2027EXPORT_SYMBOL_GPL(rt5640_dmic_enable);2028 2029int rt5640_sel_asrc_clk_src(struct snd_soc_component *component,2030 unsigned int filter_mask, unsigned int clk_src)2031{2032 struct rt5640_priv *rt5640 = snd_soc_component_get_drvdata(component);2033 unsigned int asrc2_mask = 0;2034 unsigned int asrc2_value = 0;2035 2036 switch (clk_src) {2037 case RT5640_CLK_SEL_SYS:2038 case RT5640_CLK_SEL_ASRC:2039 break;2040 2041 default:2042 return -EINVAL;2043 }2044 2045 if (!filter_mask)2046 return -EINVAL;2047 2048 if (filter_mask & RT5640_DA_STEREO_FILTER) {2049 asrc2_mask |= RT5640_STO_DAC_M_MASK;2050 asrc2_value = (asrc2_value & ~RT5640_STO_DAC_M_MASK)2051 | (clk_src << RT5640_STO_DAC_M_SFT);2052 }2053 2054 if (filter_mask & RT5640_DA_MONO_L_FILTER) {2055 asrc2_mask |= RT5640_MDA_L_M_MASK;2056 asrc2_value = (asrc2_value & ~RT5640_MDA_L_M_MASK)2057 | (clk_src << RT5640_MDA_L_M_SFT);2058 }2059 2060 if (filter_mask & RT5640_DA_MONO_R_FILTER) {2061 asrc2_mask |= RT5640_MDA_R_M_MASK;2062 asrc2_value = (asrc2_value & ~RT5640_MDA_R_M_MASK)2063 | (clk_src << RT5640_MDA_R_M_SFT);2064 }2065 2066 if (filter_mask & RT5640_AD_STEREO_FILTER) {2067 asrc2_mask |= RT5640_ADC_M_MASK;2068 asrc2_value = (asrc2_value & ~RT5640_ADC_M_MASK)2069 | (clk_src << RT5640_ADC_M_SFT);2070 }2071 2072 if (filter_mask & RT5640_AD_MONO_L_FILTER) {2073 asrc2_mask |= RT5640_MAD_L_M_MASK;2074 asrc2_value = (asrc2_value & ~RT5640_MAD_L_M_MASK)2075 | (clk_src << RT5640_MAD_L_M_SFT);2076 }2077 2078 if (filter_mask & RT5640_AD_MONO_R_FILTER) {2079 asrc2_mask |= RT5640_MAD_R_M_MASK;2080 asrc2_value = (asrc2_value & ~RT5640_MAD_R_M_MASK)2081 | (clk_src << RT5640_MAD_R_M_SFT);2082 }2083 2084 snd_soc_component_update_bits(component, RT5640_ASRC_2,2085 asrc2_mask, asrc2_value);2086 2087 if (snd_soc_component_read(component, RT5640_ASRC_2)) {2088 rt5640->asrc_en = true;2089 snd_soc_component_update_bits(component, RT5640_JD_CTRL, 0x3, 0x3);2090 } else {2091 rt5640->asrc_en = false;2092 snd_soc_component_update_bits(component, RT5640_JD_CTRL, 0x3, 0x0);2093 }2094 2095 return 0;2096}2097EXPORT_SYMBOL_GPL(rt5640_sel_asrc_clk_src);2098 2099void rt5640_enable_micbias1_for_ovcd(struct snd_soc_component *component)2100{2101 struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);2102 struct rt5640_priv *rt5640 = snd_soc_component_get_drvdata(component);2103 2104 snd_soc_dapm_mutex_lock(dapm);2105 snd_soc_dapm_force_enable_pin_unlocked(dapm, "LDO2");2106 snd_soc_dapm_force_enable_pin_unlocked(dapm, "MICBIAS1");2107 /* OVCD is unreliable when used with RCCLK as sysclk-source */2108 if (rt5640->use_platform_clock)2109 snd_soc_dapm_force_enable_pin_unlocked(dapm, "Platform Clock");2110 snd_soc_dapm_sync_unlocked(dapm);2111 snd_soc_dapm_mutex_unlock(dapm);2112}2113EXPORT_SYMBOL_GPL(rt5640_enable_micbias1_for_ovcd);2114 2115void rt5640_disable_micbias1_for_ovcd(struct snd_soc_component *component)2116{2117 struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);2118 struct rt5640_priv *rt5640 = snd_soc_component_get_drvdata(component);2119 2120 snd_soc_dapm_mutex_lock(dapm);2121 if (rt5640->use_platform_clock)2122 snd_soc_dapm_disable_pin_unlocked(dapm, "Platform Clock");2123 snd_soc_dapm_disable_pin_unlocked(dapm, "MICBIAS1");2124 snd_soc_dapm_disable_pin_unlocked(dapm, "LDO2");2125 snd_soc_dapm_sync_unlocked(dapm);2126 snd_soc_dapm_mutex_unlock(dapm);2127}2128EXPORT_SYMBOL_GPL(rt5640_disable_micbias1_for_ovcd);2129 2130static void rt5640_enable_micbias1_ovcd_irq(struct snd_soc_component *component)2131{2132 struct rt5640_priv *rt5640 = snd_soc_component_get_drvdata(component);2133 2134 snd_soc_component_update_bits(component, RT5640_IRQ_CTRL2,2135 RT5640_IRQ_MB1_OC_MASK, RT5640_IRQ_MB1_OC_NOR);2136 rt5640->ovcd_irq_enabled = true;2137}2138 2139static void rt5640_disable_micbias1_ovcd_irq(struct snd_soc_component *component)2140{2141 struct rt5640_priv *rt5640 = snd_soc_component_get_drvdata(component);2142 2143 snd_soc_component_update_bits(component, RT5640_IRQ_CTRL2,2144 RT5640_IRQ_MB1_OC_MASK, RT5640_IRQ_MB1_OC_BP);2145 rt5640->ovcd_irq_enabled = false;2146}2147 2148static void rt5640_clear_micbias1_ovcd(struct snd_soc_component *component)2149{2150 snd_soc_component_update_bits(component, RT5640_IRQ_CTRL2,2151 RT5640_MB1_OC_STATUS, 0);2152}2153 2154static bool rt5640_micbias1_ovcd(struct snd_soc_component *component)2155{2156 int val;2157 2158 val = snd_soc_component_read(component, RT5640_IRQ_CTRL2);2159 dev_dbg(component->dev, "irq ctrl2 %#04x\n", val);2160 2161 return (val & RT5640_MB1_OC_STATUS);2162}2163 2164static bool rt5640_jack_inserted(struct snd_soc_component *component)2165{2166 struct rt5640_priv *rt5640 = snd_soc_component_get_drvdata(component);2167 int val;2168 2169 if (rt5640->jd_gpio)2170 val = gpiod_get_value(rt5640->jd_gpio) ? RT5640_JD_STATUS : 0;2171 else2172 val = snd_soc_component_read(component, RT5640_INT_IRQ_ST);2173 2174 dev_dbg(component->dev, "irq status %#04x\n", val);2175 2176 if (rt5640->jd_inverted)2177 return !(val & RT5640_JD_STATUS);2178 else2179 return (val & RT5640_JD_STATUS);2180}2181 2182/* Jack detect and button-press timings */2183#define JACK_SETTLE_TIME 100 /* milli seconds */2184#define JACK_DETECT_COUNT 52185#define JACK_DETECT_MAXCOUNT 20 /* Aprox. 2 seconds worth of tries */2186#define JACK_UNPLUG_TIME 80 /* milli seconds */2187#define BP_POLL_TIME 10 /* milli seconds */2188#define BP_POLL_MAXCOUNT 200 /* assume something is wrong after this */2189#define BP_THRESHOLD 32190 2191static void rt5640_start_button_press_work(struct snd_soc_component *component)2192{2193 struct rt5640_priv *rt5640 = snd_soc_component_get_drvdata(component);2194 2195 rt5640->poll_count = 0;2196 rt5640->press_count = 0;2197 rt5640->release_count = 0;2198 rt5640->pressed = false;2199 rt5640->press_reported = false;2200 rt5640_clear_micbias1_ovcd(component);2201 schedule_delayed_work(&rt5640->bp_work, msecs_to_jiffies(BP_POLL_TIME));2202}2203 2204static void rt5640_button_press_work(struct work_struct *work)2205{2206 struct rt5640_priv *rt5640 =2207 container_of(work, struct rt5640_priv, bp_work.work);2208 struct snd_soc_component *component = rt5640->component;2209 2210 /* Check the jack was not removed underneath us */2211 if (!rt5640_jack_inserted(component))2212 return;2213 2214 if (rt5640_micbias1_ovcd(component)) {2215 rt5640->release_count = 0;2216 rt5640->press_count++;2217 /* Remember till after JACK_UNPLUG_TIME wait */2218 if (rt5640->press_count >= BP_THRESHOLD)2219 rt5640->pressed = true;2220 rt5640_clear_micbias1_ovcd(component);2221 } else {2222 rt5640->press_count = 0;2223 rt5640->release_count++;2224 }2225 2226 /*2227 * The pins get temporarily shorted on jack unplug, so we poll for2228 * at least JACK_UNPLUG_TIME milli-seconds before reporting a press.2229 */2230 rt5640->poll_count++;2231 if (rt5640->poll_count < (JACK_UNPLUG_TIME / BP_POLL_TIME)) {2232 schedule_delayed_work(&rt5640->bp_work,2233 msecs_to_jiffies(BP_POLL_TIME));2234 return;2235 }2236 2237 if (rt5640->pressed && !rt5640->press_reported) {2238 dev_dbg(component->dev, "headset button press\n");2239 snd_soc_jack_report(rt5640->jack, SND_JACK_BTN_0,2240 SND_JACK_BTN_0);2241 rt5640->press_reported = true;2242 }2243 2244 if (rt5640->release_count >= BP_THRESHOLD) {2245 if (rt5640->press_reported) {2246 dev_dbg(component->dev, "headset button release\n");2247 snd_soc_jack_report(rt5640->jack, 0, SND_JACK_BTN_0);2248 }2249 /* Re-enable OVCD IRQ to detect next press */2250 rt5640_enable_micbias1_ovcd_irq(component);2251 return; /* Stop polling */2252 }2253 2254 schedule_delayed_work(&rt5640->bp_work, msecs_to_jiffies(BP_POLL_TIME));2255}2256 2257int rt5640_detect_headset(struct snd_soc_component *component, struct gpio_desc *hp_det_gpio)2258{2259 int i, headset_count = 0, headphone_count = 0;2260 2261 /*2262 * We get the insertion event before the jack is fully inserted at which2263 * point the second ring on a TRRS connector may short the 2nd ring and2264 * sleeve contacts, also the overcurrent detection is not entirely2265 * reliable. So we try several times with a wait in between until we2266 * detect the same type JACK_DETECT_COUNT times in a row.2267 */2268 for (i = 0; i < JACK_DETECT_MAXCOUNT; i++) {2269 /* Clear any previous over-current status flag */2270 rt5640_clear_micbias1_ovcd(component);2271 2272 msleep(JACK_SETTLE_TIME);2273 2274 /* Check the jack is still connected before checking ovcd */2275 if (hp_det_gpio) {2276 if (gpiod_get_value_cansleep(hp_det_gpio))2277 return 0;2278 } else {2279 if (!rt5640_jack_inserted(component))2280 return 0;2281 }2282 2283 if (rt5640_micbias1_ovcd(component)) {2284 /*2285 * Over current detected, there is a short between the2286 * 2nd ring contact and the ground, so a TRS connector2287 * without a mic contact and thus plain headphones.2288 */2289 dev_dbg(component->dev, "jack mic-gnd shorted\n");2290 headset_count = 0;2291 headphone_count++;2292 if (headphone_count == JACK_DETECT_COUNT)2293 return SND_JACK_HEADPHONE;2294 } else {2295 dev_dbg(component->dev, "jack mic-gnd open\n");2296 headphone_count = 0;2297 headset_count++;2298 if (headset_count == JACK_DETECT_COUNT)2299 return SND_JACK_HEADSET;2300 }2301 }2302 2303 dev_err(component->dev, "Error detecting headset vs headphones, bad contact?, assuming headphones\n");2304 return SND_JACK_HEADPHONE;2305}2306EXPORT_SYMBOL_GPL(rt5640_detect_headset);2307 2308static void rt5640_jack_work(struct work_struct *work)2309{2310 struct rt5640_priv *rt5640 =2311 container_of(work, struct rt5640_priv, jack_work.work);2312 struct snd_soc_component *component = rt5640->component;2313 int status;2314 2315 if (rt5640->jd_src == RT5640_JD_SRC_HDA_HEADER) {2316 int val, jack_type = 0, hda_mic_plugged, hda_hp_plugged;2317 2318 /* mic jack */2319 val = snd_soc_component_read(component, RT5640_INT_IRQ_ST);2320 hda_mic_plugged = !(val & RT5640_JD_STATUS);2321 dev_dbg(component->dev, "mic jack status %d\n",2322 hda_mic_plugged);2323 2324 snd_soc_component_update_bits(component, RT5640_IRQ_CTRL1,2325 RT5640_JD_P_MASK, !hda_mic_plugged << RT5640_JD_P_SFT);2326 2327 if (hda_mic_plugged)2328 jack_type |= SND_JACK_MICROPHONE;2329 2330 /* headphone jack */2331 val = snd_soc_component_read(component, RT5640_DUMMY2);2332 hda_hp_plugged = !(val & (0x1 << 11));2333 dev_dbg(component->dev, "headphone jack status %d\n",2334 hda_hp_plugged);2335 2336 snd_soc_component_update_bits(component, RT5640_DUMMY2,2337 (0x1 << 10), !hda_hp_plugged << 10);2338 2339 if (hda_hp_plugged)2340 jack_type |= SND_JACK_HEADPHONE;2341 2342 snd_soc_jack_report(rt5640->jack, jack_type, SND_JACK_HEADSET);2343 2344 return;2345 }2346 2347 if (!rt5640_jack_inserted(component)) {2348 /* Jack removed, or spurious IRQ? */2349 if (rt5640->jack->status & SND_JACK_HEADPHONE) {2350 if (rt5640->jack->status & SND_JACK_MICROPHONE) {2351 cancel_delayed_work_sync(&rt5640->bp_work);2352 rt5640_disable_micbias1_ovcd_irq(component);2353 rt5640_disable_micbias1_for_ovcd(component);2354 }2355 snd_soc_jack_report(rt5640->jack, 0,2356 SND_JACK_HEADSET | SND_JACK_BTN_0);2357 dev_dbg(component->dev, "jack unplugged\n");2358 }2359 } else if (!(rt5640->jack->status & SND_JACK_HEADPHONE)) {2360 /* Jack inserted */2361 WARN_ON(rt5640->ovcd_irq_enabled);2362 rt5640_enable_micbias1_for_ovcd(component);2363 status = rt5640_detect_headset(component, NULL);2364 if (status == SND_JACK_HEADSET) {2365 /* Enable ovcd IRQ for button press detect. */2366 rt5640_enable_micbias1_ovcd_irq(component);2367 } else {2368 /* No more need for overcurrent detect. */2369 rt5640_disable_micbias1_for_ovcd(component);2370 }2371 dev_dbg(component->dev, "detect status %#02x\n", status);2372 snd_soc_jack_report(rt5640->jack, status, SND_JACK_HEADSET);2373 } else if (rt5640->ovcd_irq_enabled && rt5640_micbias1_ovcd(component)) {2374 dev_dbg(component->dev, "OVCD IRQ\n");2375 2376 /*2377 * The ovcd IRQ keeps firing while the button is pressed, so2378 * we disable it and start polling the button until released.2379 *2380 * The disable will make the IRQ pin 0 again and since we get2381 * IRQs on both edges (so as to detect both jack plugin and2382 * unplug) this means we will immediately get another IRQ.2383 * The ovcd_irq_enabled check above makes the 2ND IRQ a NOP.2384 */2385 rt5640_disable_micbias1_ovcd_irq(component);2386 rt5640_start_button_press_work(component);2387 2388 /*2389 * If the jack-detect IRQ flag goes high (unplug) after our2390 * above rt5640_jack_inserted() check and before we have2391 * disabled the OVCD IRQ, the IRQ pin will stay high and as2392 * we react to edges, we miss the unplug event -> recheck.2393 */2394 queue_delayed_work(system_long_wq, &rt5640->jack_work, 0);2395 }2396}2397 2398static irqreturn_t rt5640_irq(int irq, void *data)2399{2400 struct rt5640_priv *rt5640 = data;2401 int delay = 0;2402 2403 if (rt5640->jd_src == RT5640_JD_SRC_HDA_HEADER)2404 delay = 100;2405 2406 if (rt5640->jack)2407 mod_delayed_work(system_long_wq, &rt5640->jack_work, delay);2408 2409 return IRQ_HANDLED;2410}2411 2412static irqreturn_t rt5640_jd_gpio_irq(int irq, void *data)2413{2414 struct rt5640_priv *rt5640 = data;2415 2416 queue_delayed_work(system_long_wq, &rt5640->jack_work,2417 msecs_to_jiffies(JACK_SETTLE_TIME));2418 2419 return IRQ_HANDLED;2420}2421 2422static void rt5640_disable_irq_and_cancel_work(void *data)2423{2424 struct rt5640_priv *rt5640 = data;2425 2426 if (rt5640->jd_gpio_irq_requested) {2427 free_irq(rt5640->jd_gpio_irq, rt5640);2428 rt5640->jd_gpio_irq_requested = false;2429 }2430 2431 if (rt5640->irq_requested) {2432 free_irq(rt5640->irq, rt5640);2433 rt5640->irq_requested = false;2434 }2435 2436 cancel_delayed_work_sync(&rt5640->jack_work);2437 cancel_delayed_work_sync(&rt5640->bp_work);2438}2439 2440void rt5640_set_ovcd_params(struct snd_soc_component *component)2441{2442 struct rt5640_priv *rt5640 = snd_soc_component_get_drvdata(component);2443 2444 snd_soc_component_write(component, RT5640_PR_BASE + RT5640_BIAS_CUR4,2445 0xa800 | rt5640->ovcd_sf);2446 2447 snd_soc_component_update_bits(component, RT5640_MICBIAS,2448 RT5640_MIC1_OVTH_MASK | RT5640_MIC1_OVCD_MASK,2449 rt5640->ovcd_th | RT5640_MIC1_OVCD_EN);2450 2451 /*2452 * The over-current-detect is only reliable in detecting the absence2453 * of over-current, when the mic-contact in the jack is short-circuited,2454 * the hardware periodically retries if it can apply the bias-current2455 * leading to the ovcd status flip-flopping 1-0-1 with it being 0 about2456 * 10% of the time, as we poll the ovcd status bit we might hit that2457 * 10%, so we enable sticky mode and when checking OVCD we clear the2458 * status, msleep() a bit and then check to get a reliable reading.2459 */2460 snd_soc_component_update_bits(component, RT5640_IRQ_CTRL2,2461 RT5640_MB1_OC_STKY_MASK, RT5640_MB1_OC_STKY_EN);2462}2463EXPORT_SYMBOL_GPL(rt5640_set_ovcd_params);2464 2465static void rt5640_disable_jack_detect(struct snd_soc_component *component)2466{2467 struct rt5640_priv *rt5640 = snd_soc_component_get_drvdata(component);2468 2469 /*2470 * soc_remove_component() force-disables jack and thus rt5640->jack2471 * could be NULL at the time of driver's module unloading.2472 */2473 if (!rt5640->jack)2474 return;2475 2476 rt5640_disable_irq_and_cancel_work(rt5640);2477 2478 if (rt5640->jack->status & SND_JACK_MICROPHONE) {2479 rt5640_disable_micbias1_ovcd_irq(component);2480 rt5640_disable_micbias1_for_ovcd(component);2481 snd_soc_jack_report(rt5640->jack, 0, SND_JACK_BTN_0);2482 }2483 2484 rt5640->jd_gpio = NULL;2485 rt5640->jack = NULL;2486}2487 2488static void rt5640_enable_jack_detect(struct snd_soc_component *component,2489 struct snd_soc_jack *jack,2490 struct rt5640_set_jack_data *jack_data)2491{2492 struct rt5640_priv *rt5640 = snd_soc_component_get_drvdata(component);2493 int ret;2494 2495 /* Select JD-source */2496 snd_soc_component_update_bits(component, RT5640_JD_CTRL,2497 RT5640_JD_MASK, rt5640->jd_src << RT5640_JD_SFT);2498 2499 /* Selecting GPIO01 as an interrupt */2500 snd_soc_component_update_bits(component, RT5640_GPIO_CTRL1,2501 RT5640_GP1_PIN_MASK, RT5640_GP1_PIN_IRQ);2502 2503 /* Set GPIO1 output */2504 snd_soc_component_update_bits(component, RT5640_GPIO_CTRL3,2505 RT5640_GP1_PF_MASK, RT5640_GP1_PF_OUT);2506 2507 snd_soc_component_write(component, RT5640_DUMMY1, 0x3f41);2508 2509 rt5640_set_ovcd_params(component);2510 2511 /*2512 * All IRQs get or-ed together, so we need the jack IRQ to report 02513 * when a jack is inserted so that the OVCD IRQ then toggles the IRQ2514 * pin 0/1 instead of it being stuck to 1. So we invert the JD polarity2515 * on systems where the hardware does not already do this.2516 */2517 if (rt5640->jd_inverted) {2518 if (rt5640->jd_src == RT5640_JD_SRC_JD1_IN4P)2519 snd_soc_component_write(component, RT5640_IRQ_CTRL1,2520 RT5640_IRQ_JD_NOR);2521 else if (rt5640->jd_src == RT5640_JD_SRC_JD2_IN4N)2522 snd_soc_component_update_bits(component, RT5640_DUMMY2,2523 RT5640_IRQ_JD2_MASK | RT5640_JD2_MASK,2524 RT5640_IRQ_JD2_NOR | RT5640_JD2_EN);2525 } else {2526 if (rt5640->jd_src == RT5640_JD_SRC_JD1_IN4P)2527 snd_soc_component_write(component, RT5640_IRQ_CTRL1,2528 RT5640_IRQ_JD_NOR | RT5640_JD_P_INV);2529 else if (rt5640->jd_src == RT5640_JD_SRC_JD2_IN4N)2530 snd_soc_component_update_bits(component, RT5640_DUMMY2,2531 RT5640_IRQ_JD2_MASK | RT5640_JD2_P_MASK |2532 RT5640_JD2_MASK,2533 RT5640_IRQ_JD2_NOR | RT5640_JD2_P_INV |2534 RT5640_JD2_EN);2535 }2536 2537 rt5640->jack = jack;2538 if (rt5640->jack->status & SND_JACK_MICROPHONE) {2539 rt5640_enable_micbias1_for_ovcd(component);2540 rt5640_enable_micbias1_ovcd_irq(component);2541 }2542 2543 if (jack_data && jack_data->codec_irq_override)2544 rt5640->irq = jack_data->codec_irq_override;2545 2546 if (jack_data && jack_data->jd_gpio) {2547 rt5640->jd_gpio = jack_data->jd_gpio;2548 rt5640->jd_gpio_irq = gpiod_to_irq(rt5640->jd_gpio);2549 2550 ret = request_irq(rt5640->jd_gpio_irq, rt5640_jd_gpio_irq,2551 IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,2552 "rt5640-jd-gpio", rt5640);2553 if (ret) {2554 dev_warn(component->dev, "Failed to request jd GPIO IRQ %d: %d\n",2555 rt5640->jd_gpio_irq, ret);2556 rt5640_disable_jack_detect(component);2557 return;2558 }2559 rt5640->jd_gpio_irq_requested = true;2560 }2561 2562 if (jack_data && jack_data->use_platform_clock)2563 rt5640->use_platform_clock = jack_data->use_platform_clock;2564 2565 ret = request_irq(rt5640->irq, rt5640_irq,2566 IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING | IRQF_ONESHOT,2567 "rt5640", rt5640);2568 if (ret) {2569 dev_warn(component->dev, "Failed to request IRQ %d: %d\n", rt5640->irq, ret);2570 rt5640_disable_jack_detect(component);2571 return;2572 }2573 rt5640->irq_requested = true;2574 2575 /* sync initial jack state */2576 queue_delayed_work(system_long_wq, &rt5640->jack_work, 0);2577}2578 2579static const struct snd_soc_dapm_route rt5640_hda_jack_dapm_routes[] = {2580 {"IN1P", NULL, "MICBIAS1"},2581 {"IN2P", NULL, "MICBIAS1"},2582 {"IN3P", NULL, "MICBIAS1"},2583};2584 2585static void rt5640_enable_hda_jack_detect(2586 struct snd_soc_component *component, struct snd_soc_jack *jack)2587{2588 struct rt5640_priv *rt5640 = snd_soc_component_get_drvdata(component);2589 struct snd_soc_dapm_context *dapm =2590 snd_soc_component_get_dapm(component);2591 int ret;2592 2593 /* Select JD1 for Mic */2594 snd_soc_component_update_bits(component, RT5640_JD_CTRL,2595 RT5640_JD_MASK, RT5640_JD_JD1_IN4P);2596 snd_soc_component_write(component, RT5640_IRQ_CTRL1, RT5640_IRQ_JD_NOR);2597 2598 /* Select JD2 for Headphone */2599 snd_soc_component_update_bits(component, RT5640_DUMMY2, 0x1100, 0x1100);2600 2601 /* Selecting GPIO01 as an interrupt */2602 snd_soc_component_update_bits(component, RT5640_GPIO_CTRL1,2603 RT5640_GP1_PIN_MASK, RT5640_GP1_PIN_IRQ);2604 2605 /* Set GPIO1 output */2606 snd_soc_component_update_bits(component, RT5640_GPIO_CTRL3,2607 RT5640_GP1_PF_MASK, RT5640_GP1_PF_OUT);2608 2609 snd_soc_component_update_bits(component, RT5640_DUMMY1, 0x400, 0x0);2610 2611 snd_soc_component_update_bits(component, RT5640_PWR_ANLG1,2612 RT5640_PWR_VREF2 | RT5640_PWR_MB | RT5640_PWR_BG,2613 RT5640_PWR_VREF2 | RT5640_PWR_MB | RT5640_PWR_BG);2614 usleep_range(10000, 15000);2615 snd_soc_component_update_bits(component, RT5640_PWR_ANLG1,2616 RT5640_PWR_FV2, RT5640_PWR_FV2);2617 2618 rt5640->jack = jack;2619 2620 ret = request_irq(rt5640->irq, rt5640_irq,2621 IRQF_TRIGGER_RISING | IRQF_ONESHOT, "rt5640", rt5640);2622 if (ret) {2623 dev_warn(component->dev, "Failed to request IRQ %d: %d\n", rt5640->irq, ret);2624 rt5640->jack = NULL;2625 return;2626 }2627 rt5640->irq_requested = true;2628 2629 /* sync initial jack state */2630 queue_delayed_work(system_long_wq, &rt5640->jack_work, 0);2631 2632 snd_soc_dapm_add_routes(dapm, rt5640_hda_jack_dapm_routes,2633 ARRAY_SIZE(rt5640_hda_jack_dapm_routes));2634}2635 2636static int rt5640_set_jack(struct snd_soc_component *component,2637 struct snd_soc_jack *jack, void *data)2638{2639 struct rt5640_priv *rt5640 = snd_soc_component_get_drvdata(component);2640 2641 if (jack) {2642 if (rt5640->jd_src == RT5640_JD_SRC_HDA_HEADER)2643 rt5640_enable_hda_jack_detect(component, jack);2644 else2645 rt5640_enable_jack_detect(component, jack, data);2646 } else {2647 rt5640_disable_jack_detect(component);2648 }2649 2650 return 0;2651}2652 2653static int rt5640_probe(struct snd_soc_component *component)2654{2655 struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);2656 struct rt5640_priv *rt5640 = snd_soc_component_get_drvdata(component);2657 u32 dmic1_data_pin = 0;2658 u32 dmic2_data_pin = 0;2659 bool dmic_en = false;2660 u32 val;2661 2662 /* Check if MCLK provided */2663 rt5640->mclk = devm_clk_get_optional(component->dev, "mclk");2664 if (IS_ERR(rt5640->mclk))2665 return PTR_ERR(rt5640->mclk);2666 2667 rt5640->component = component;2668 2669 snd_soc_component_force_bias_level(component, SND_SOC_BIAS_OFF);2670 2671 snd_soc_component_update_bits(component, RT5640_DUMMY1, 0x0301, 0x0301);2672 snd_soc_component_update_bits(component, RT5640_MICBIAS, 0x0030, 0x0030);2673 snd_soc_component_update_bits(component, RT5640_DSP_PATH2, 0xfc00, 0x0c00);2674 2675 switch (snd_soc_component_read(component, RT5640_RESET) & RT5640_ID_MASK) {2676 case RT5640_ID_5640:2677 case RT5640_ID_5642:2678 snd_soc_add_component_controls(component,2679 rt5640_specific_snd_controls,2680 ARRAY_SIZE(rt5640_specific_snd_controls));2681 snd_soc_dapm_new_controls(dapm,2682 rt5640_specific_dapm_widgets,2683 ARRAY_SIZE(rt5640_specific_dapm_widgets));2684 snd_soc_dapm_add_routes(dapm,2685 rt5640_specific_dapm_routes,2686 ARRAY_SIZE(rt5640_specific_dapm_routes));2687 break;2688 case RT5640_ID_5639:2689 snd_soc_dapm_new_controls(dapm,2690 rt5639_specific_dapm_widgets,2691 ARRAY_SIZE(rt5639_specific_dapm_widgets));2692 snd_soc_dapm_add_routes(dapm,2693 rt5639_specific_dapm_routes,2694 ARRAY_SIZE(rt5639_specific_dapm_routes));2695 break;2696 default:2697 dev_err(component->dev,2698 "The driver is for RT5639 RT5640 or RT5642 only\n");2699 return -ENODEV;2700 }2701 2702 /*2703 * Note on some platforms the platform code may need to add device-props2704 * rather then relying only on properties set by the firmware.2705 * Therefor the property parsing MUST be done here, rather then from2706 * rt5640_i2c_probe(), so that the platform-code can attach extra2707 * properties before calling snd_soc_register_card().2708 */2709 if (device_property_read_bool(component->dev, "realtek,in1-differential"))2710 snd_soc_component_update_bits(component, RT5640_IN1_IN2,2711 RT5640_IN_DF1, RT5640_IN_DF1);2712 2713 if (device_property_read_bool(component->dev, "realtek,in2-differential"))2714 snd_soc_component_update_bits(component, RT5640_IN3_IN4,2715 RT5640_IN_DF2, RT5640_IN_DF2);2716 2717 if (device_property_read_bool(component->dev, "realtek,in3-differential"))2718 snd_soc_component_update_bits(component, RT5640_IN1_IN2,2719 RT5640_IN_DF2, RT5640_IN_DF2);2720 2721 if (device_property_read_bool(component->dev, "realtek,lout-differential"))2722 snd_soc_component_update_bits(component, RT5640_DUMMY1,2723 RT5640_EN_LOUT_DF, RT5640_EN_LOUT_DF);2724 2725 if (device_property_read_u32(component->dev, "realtek,dmic1-data-pin",2726 &val) == 0 && val) {2727 dmic1_data_pin = val - 1;2728 dmic_en = true;2729 }2730 2731 if (device_property_read_u32(component->dev, "realtek,dmic2-data-pin",2732 &val) == 0 && val) {2733 dmic2_data_pin = val - 1;2734 dmic_en = true;2735 }2736 2737 if (dmic_en)2738 rt5640_dmic_enable(component, dmic1_data_pin, dmic2_data_pin);2739 2740 if (device_property_read_u32(component->dev,2741 "realtek,jack-detect-source", &val) == 0) {2742 if (val <= RT5640_JD_SRC_HDA_HEADER)2743 rt5640->jd_src = val;2744 else2745 dev_warn(component->dev, "Warning: Invalid jack-detect-source value: %d, leaving jack-detect disabled\n",2746 val);2747 }2748 2749 if (!device_property_read_bool(component->dev, "realtek,jack-detect-not-inverted"))2750 rt5640->jd_inverted = true;2751 2752 /*2753 * Testing on various boards has shown that good defaults for the OVCD2754 * threshold and scale-factor are 2000µA and 0.75. For an effective2755 * limit of 1500µA, this seems to be more reliable then 1500µA and 1.0.2756 */2757 rt5640->ovcd_th = RT5640_MIC1_OVTH_2000UA;2758 rt5640->ovcd_sf = RT5640_MIC_OVCD_SF_0P75;2759 2760 if (device_property_read_u32(component->dev,2761 "realtek,over-current-threshold-microamp", &val) == 0) {2762 switch (val) {2763 case 600:2764 rt5640->ovcd_th = RT5640_MIC1_OVTH_600UA;2765 break;2766 case 1500:2767 rt5640->ovcd_th = RT5640_MIC1_OVTH_1500UA;2768 break;2769 case 2000:2770 rt5640->ovcd_th = RT5640_MIC1_OVTH_2000UA;2771 break;2772 default:2773 dev_warn(component->dev, "Warning: Invalid over-current-threshold-microamp value: %d, defaulting to 2000uA\n",2774 val);2775 }2776 }2777 2778 if (device_property_read_u32(component->dev,2779 "realtek,over-current-scale-factor", &val) == 0) {2780 if (val <= RT5640_OVCD_SF_1P5)2781 rt5640->ovcd_sf = val << RT5640_MIC_OVCD_SF_SFT;2782 else2783 dev_warn(component->dev, "Warning: Invalid over-current-scale-factor value: %d, defaulting to 0.75\n",2784 val);2785 }2786 2787 return 0;2788}2789 2790static void rt5640_remove(struct snd_soc_component *component)2791{2792 rt5640_reset(component);2793}2794 2795#ifdef CONFIG_PM2796static int rt5640_suspend(struct snd_soc_component *component)2797{2798 struct rt5640_priv *rt5640 = snd_soc_component_get_drvdata(component);2799 2800 if (rt5640->jack) {2801 /* disable jack interrupts during system suspend */2802 disable_irq(rt5640->irq);2803 cancel_delayed_work_sync(&rt5640->jack_work);2804 cancel_delayed_work_sync(&rt5640->bp_work);2805 }2806 2807 snd_soc_component_force_bias_level(component, SND_SOC_BIAS_OFF);2808 rt5640_reset(component);2809 regcache_cache_only(rt5640->regmap, true);2810 regcache_mark_dirty(rt5640->regmap);2811 if (rt5640->ldo1_en)2812 gpiod_set_value_cansleep(rt5640->ldo1_en, 0);2813 2814 return 0;2815}2816 2817static int rt5640_resume(struct snd_soc_component *component)2818{2819 struct rt5640_priv *rt5640 = snd_soc_component_get_drvdata(component);2820 2821 if (rt5640->ldo1_en) {2822 gpiod_set_value_cansleep(rt5640->ldo1_en, 1);2823 msleep(400);2824 }2825 2826 regcache_cache_only(rt5640->regmap, false);2827 regcache_sync(rt5640->regmap);2828 2829 if (rt5640->jack) {2830 if (rt5640->jd_src == RT5640_JD_SRC_HDA_HEADER) {2831 snd_soc_component_update_bits(component,2832 RT5640_DUMMY2, 0x1100, 0x1100);2833 } else {2834 if (rt5640->jd_inverted) {2835 if (rt5640->jd_src == RT5640_JD_SRC_JD2_IN4N)2836 snd_soc_component_update_bits(2837 component, RT5640_DUMMY2,2838 RT5640_IRQ_JD2_MASK |2839 RT5640_JD2_MASK,2840 RT5640_IRQ_JD2_NOR |2841 RT5640_JD2_EN);2842 2843 } else {2844 if (rt5640->jd_src == RT5640_JD_SRC_JD2_IN4N)2845 snd_soc_component_update_bits(2846 component, RT5640_DUMMY2,2847 RT5640_IRQ_JD2_MASK |2848 RT5640_JD2_P_MASK |2849 RT5640_JD2_MASK,2850 RT5640_IRQ_JD2_NOR |2851 RT5640_JD2_P_INV |2852 RT5640_JD2_EN);2853 }2854 }2855 2856 enable_irq(rt5640->irq);2857 queue_delayed_work(system_long_wq, &rt5640->jack_work, 0);2858 }2859 2860 return 0;2861}2862#else2863#define rt5640_suspend NULL2864#define rt5640_resume NULL2865#endif2866 2867#define RT5640_STEREO_RATES SNDRV_PCM_RATE_8000_960002868#define RT5640_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \2869 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S8)2870 2871static const struct snd_soc_dai_ops rt5640_aif_dai_ops = {2872 .hw_params = rt5640_hw_params,2873 .set_fmt = rt5640_set_dai_fmt,2874 .set_sysclk = rt5640_set_dai_sysclk,2875 .set_pll = rt5640_set_dai_pll,2876};2877 2878static struct snd_soc_dai_driver rt5640_dai[] = {2879 {2880 .name = "rt5640-aif1",2881 .id = RT5640_AIF1,2882 .playback = {2883 .stream_name = "AIF1 Playback",2884 .channels_min = 1,2885 .channels_max = 2,2886 .rates = RT5640_STEREO_RATES,2887 .formats = RT5640_FORMATS,2888 },2889 .capture = {2890 .stream_name = "AIF1 Capture",2891 .channels_min = 1,2892 .channels_max = 2,2893 .rates = RT5640_STEREO_RATES,2894 .formats = RT5640_FORMATS,2895 },2896 .ops = &rt5640_aif_dai_ops,2897 },2898 {2899 .name = "rt5640-aif2",2900 .id = RT5640_AIF2,2901 .playback = {2902 .stream_name = "AIF2 Playback",2903 .channels_min = 1,2904 .channels_max = 2,2905 .rates = RT5640_STEREO_RATES,2906 .formats = RT5640_FORMATS,2907 },2908 .capture = {2909 .stream_name = "AIF2 Capture",2910 .channels_min = 1,2911 .channels_max = 2,2912 .rates = RT5640_STEREO_RATES,2913 .formats = RT5640_FORMATS,2914 },2915 .ops = &rt5640_aif_dai_ops,2916 },2917};2918 2919static const struct snd_soc_component_driver soc_component_dev_rt5640 = {2920 .probe = rt5640_probe,2921 .remove = rt5640_remove,2922 .suspend = rt5640_suspend,2923 .resume = rt5640_resume,2924 .set_bias_level = rt5640_set_bias_level,2925 .set_jack = rt5640_set_jack,2926 .controls = rt5640_snd_controls,2927 .num_controls = ARRAY_SIZE(rt5640_snd_controls),2928 .dapm_widgets = rt5640_dapm_widgets,2929 .num_dapm_widgets = ARRAY_SIZE(rt5640_dapm_widgets),2930 .dapm_routes = rt5640_dapm_routes,2931 .num_dapm_routes = ARRAY_SIZE(rt5640_dapm_routes),2932 .use_pmdown_time = 1,2933 .endianness = 1,2934};2935 2936static const struct regmap_config rt5640_regmap = {2937 .reg_bits = 8,2938 .val_bits = 16,2939 .use_single_read = true,2940 .use_single_write = true,2941 2942 .max_register = RT5640_VENDOR_ID2 + 1 + (ARRAY_SIZE(rt5640_ranges) *2943 RT5640_PR_SPACING),2944 .volatile_reg = rt5640_volatile_register,2945 .readable_reg = rt5640_readable_register,2946 2947 .cache_type = REGCACHE_MAPLE,2948 .reg_defaults = rt5640_reg,2949 .num_reg_defaults = ARRAY_SIZE(rt5640_reg),2950 .ranges = rt5640_ranges,2951 .num_ranges = ARRAY_SIZE(rt5640_ranges),2952};2953 2954static const struct i2c_device_id rt5640_i2c_id[] = {2955 { "rt5640" },2956 { "rt5639" },2957 { "rt5642" },2958 { }2959};2960MODULE_DEVICE_TABLE(i2c, rt5640_i2c_id);2961 2962#if defined(CONFIG_OF)2963static const struct of_device_id rt5640_of_match[] = {2964 { .compatible = "realtek,rt5639", },2965 { .compatible = "realtek,rt5640", },2966 {},2967};2968MODULE_DEVICE_TABLE(of, rt5640_of_match);2969#endif2970 2971#ifdef CONFIG_ACPI2972static const struct acpi_device_id rt5640_acpi_match[] = {2973 { "INT33CA", 0 },2974 { "10EC3276", 0 },2975 { "10EC5640", 0 },2976 { "10EC5642", 0 },2977 { "INTCCFFD", 0 },2978 { },2979};2980MODULE_DEVICE_TABLE(acpi, rt5640_acpi_match);2981#endif2982 2983static int rt5640_i2c_probe(struct i2c_client *i2c)2984{2985 struct rt5640_priv *rt5640;2986 int ret;2987 unsigned int val;2988 2989 rt5640 = devm_kzalloc(&i2c->dev,2990 sizeof(struct rt5640_priv),2991 GFP_KERNEL);2992 if (NULL == rt5640)2993 return -ENOMEM;2994 i2c_set_clientdata(i2c, rt5640);2995 2996 rt5640->ldo1_en = devm_gpiod_get_optional(&i2c->dev,2997 "realtek,ldo1-en",2998 GPIOD_OUT_HIGH);2999 if (IS_ERR(rt5640->ldo1_en))3000 return PTR_ERR(rt5640->ldo1_en);3001 3002 if (rt5640->ldo1_en) {3003 gpiod_set_consumer_name(rt5640->ldo1_en, "RT5640 LDO1_EN");3004 msleep(400);3005 }3006 3007 rt5640->regmap = devm_regmap_init_i2c(i2c, &rt5640_regmap);3008 if (IS_ERR(rt5640->regmap)) {3009 ret = PTR_ERR(rt5640->regmap);3010 dev_err(&i2c->dev, "Failed to allocate register map: %d\n",3011 ret);3012 return ret;3013 }3014 3015 regmap_read(rt5640->regmap, RT5640_VENDOR_ID2, &val);3016 if (val != RT5640_DEVICE_ID) {3017 dev_err(&i2c->dev,3018 "Device with ID register %#x is not rt5640/39\n", val);3019 return -ENODEV;3020 }3021 3022 regmap_write(rt5640->regmap, RT5640_RESET, 0);3023 3024 ret = regmap_register_patch(rt5640->regmap, init_list,3025 ARRAY_SIZE(init_list));3026 if (ret != 0)3027 dev_warn(&i2c->dev, "Failed to apply regmap patch: %d\n", ret);3028 3029 regmap_update_bits(rt5640->regmap, RT5640_DUMMY1,3030 RT5640_MCLK_DET, RT5640_MCLK_DET);3031 3032 rt5640->hp_mute = true;3033 rt5640->irq = i2c->irq;3034 INIT_DELAYED_WORK(&rt5640->bp_work, rt5640_button_press_work);3035 INIT_DELAYED_WORK(&rt5640->jack_work, rt5640_jack_work);3036 3037 /* Make sure work is stopped on probe-error / remove */3038 ret = devm_add_action_or_reset(&i2c->dev, rt5640_disable_irq_and_cancel_work, rt5640);3039 if (ret)3040 return ret;3041 3042 return devm_snd_soc_register_component(&i2c->dev,3043 &soc_component_dev_rt5640,3044 rt5640_dai, ARRAY_SIZE(rt5640_dai));3045}3046 3047static struct i2c_driver rt5640_i2c_driver = {3048 .driver = {3049 .name = "rt5640",3050 .acpi_match_table = ACPI_PTR(rt5640_acpi_match),3051 .of_match_table = of_match_ptr(rt5640_of_match),3052 },3053 .probe = rt5640_i2c_probe,3054 .id_table = rt5640_i2c_id,3055};3056module_i2c_driver(rt5640_i2c_driver);3057 3058MODULE_DESCRIPTION("ASoC RT5640/RT5639 driver");3059MODULE_AUTHOR("Johnny Hsu <johnnyhsu@realtek.com>");3060MODULE_LICENSE("GPL v2");3061