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1/* SPDX-License-Identifier: GPL-2.0-only */2/*3 * rt712-sdca-dmic.h -- RT712 SDCA DMIC ALSA SoC audio driver header4 *5 * Copyright(c) 2023 Realtek Semiconductor Corp.6 */7 8#ifndef __RT712_SDW_DMIC_H__9#define __RT712_SDW_DMIC_H__10 11#include <linux/regmap.h>12#include <linux/soundwire/sdw_registers.h>13 14struct rt712_sdca_dmic_priv {15 struct regmap *regmap;16 struct regmap *mbq_regmap;17 struct snd_soc_component *component;18 struct sdw_slave *slave;19 struct sdw_bus_params params;20 bool hw_init;21 bool first_hw_init;22 bool fu1e_dapm_mute;23 bool fu1e_mixer_mute[4];24};25 26struct rt712_sdca_dmic_kctrl_priv {27 unsigned int reg_base;28 unsigned int count;29 unsigned int max;30 unsigned int invert;31};32 33/* SDCA (Channel) */34#define CH_01 0x0135#define CH_02 0x0236#define CH_03 0x0337#define CH_04 0x0438 39static const struct reg_default rt712_sdca_dmic_reg_defaults[] = {40 { 0x201a, 0x00 },41 { 0x201b, 0x00 },42 { 0x201c, 0x00 },43 { 0x201d, 0x00 },44 { 0x201e, 0x00 },45 { 0x201f, 0x00 },46 { 0x2029, 0x00 },47 { 0x202a, 0x00 },48 { 0x202d, 0x00 },49 { 0x202e, 0x00 },50 { 0x202f, 0x00 },51 { 0x2030, 0x00 },52 { 0x2031, 0x00 },53 { 0x2032, 0x00 },54 { 0x2033, 0x00 },55 { 0x2034, 0x00 },56 { 0x2230, 0x00 },57 { 0x2231, 0x2f },58 { 0x2232, 0x80 },59 { 0x2f01, 0x00 },60 { 0x2f02, 0x09 },61 { 0x2f03, 0x00 },62 { 0x2f04, 0x00 },63 { 0x2f05, 0x0b },64 { 0x2f06, 0x01 },65 { 0x2f08, 0x00 },66 { 0x2f09, 0x00 },67 { 0x2f0a, 0x01 },68 { 0x2f35, 0x02 },69 { 0x2f36, 0xcf },70 { 0x2f52, 0x08 },71 { 0x2f58, 0x07 },72 { 0x2f59, 0x07 },73 { 0x3201, 0x01 },74 { 0x320c, 0x00 },75 { SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_IT26, RT712_SDCA_CTL_VENDOR_DEF, 0), 0x00 },76 { SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_USER_FU1E, RT712_SDCA_CTL_FU_MUTE, CH_01), 0x01 },77 { SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_USER_FU1E, RT712_SDCA_CTL_FU_MUTE, CH_02), 0x01 },78 { SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_USER_FU1E, RT712_SDCA_CTL_FU_MUTE, CH_03), 0x01 },79 { SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_USER_FU1E, RT712_SDCA_CTL_FU_MUTE, CH_04), 0x01 },80 { SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_CS1F, RT712_SDCA_CTL_SAMPLE_FREQ_INDEX, 0), 0x09 },81 { SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_CS1C, RT712_SDCA_CTL_SAMPLE_FREQ_INDEX, 0), 0x09 },82};83 84static const struct reg_default rt712_sdca_dmic_mbq_defaults[] = {85 { 0x0590001e, 0x0020 },86 { 0x06100000, 0x0010 },87 { 0x06100006, 0x0055 },88 { 0x06100010, 0x2630 },89 { 0x06100011, 0x152f },90 { 0x06100013, 0x0102 },91 { 0x06100015, 0x2219 },92 { 0x06100018, 0x0102 },93 { 0x06100026, 0x2c29 },94 { 0x06100027, 0x2d2b },95 { 0x0610002b, 0x2a32 },96 { 0x0610002f, 0x3355 },97 { SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_PLATFORM_FU15, RT712_SDCA_CTL_FU_CH_GAIN, CH_01), 0x0000 },98 { SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_PLATFORM_FU15, RT712_SDCA_CTL_FU_CH_GAIN, CH_02), 0x0000 },99 { SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_PLATFORM_FU15, RT712_SDCA_CTL_FU_CH_GAIN, CH_03), 0x0000 },100 { SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_PLATFORM_FU15, RT712_SDCA_CTL_FU_CH_GAIN, CH_04), 0x0000 },101 { SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_USER_FU1E, RT712_SDCA_CTL_FU_VOLUME, CH_01), 0x0000 },102 { SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_USER_FU1E, RT712_SDCA_CTL_FU_VOLUME, CH_02), 0x0000 },103 { SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_USER_FU1E, RT712_SDCA_CTL_FU_VOLUME, CH_03), 0x0000 },104 { SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_USER_FU1E, RT712_SDCA_CTL_FU_VOLUME, CH_04), 0x0000 },105};106 107#endif /* __RT712_SDW_DMIC_H__ */108