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1/* SPDX-License-Identifier: GPL-2.0-only */2/*3 * rt715-sdca-sdw.h -- RT715 ALSA SoC audio driver header4 *5 * Copyright(c) 2020 Realtek Semiconductor Corp.6 */7 8#ifndef __RT715_SDW_SDCA_H__9#define __RT715_SDW_SDCA_H__10 11#include <linux/soundwire/sdw_registers.h>12 13static const struct reg_default rt715_reg_defaults_sdca[] = {14 { 0x201a, 0x00 },15 { 0x201e, 0x00 },16 { 0x2020, 0x00 },17 { 0x2021, 0x00 },18 { 0x2022, 0x00 },19 { 0x2023, 0x00 },20 { 0x2024, 0x00 },21 { 0x2025, 0x01 },22 { 0x2026, 0x00 },23 { 0x2027, 0x00 },24 { 0x2029, 0x00 },25 { 0x202a, 0x00 },26 { 0x202d, 0x00 },27 { 0x202e, 0x00 },28 { 0x202f, 0x00 },29 { 0x2030, 0x00 },30 { 0x2031, 0x00 },31 { 0x2032, 0x00 },32 { 0x2033, 0x00 },33 { 0x2034, 0x00 },34 { 0x2230, 0x00 },35 { 0x2231, 0x2f },36 { 0x2232, 0x80 },37 { 0x2233, 0x00 },38 { 0x2234, 0x00 },39 { 0x2235, 0x00 },40 { 0x2236, 0x00 },41 { 0x2237, 0x00 },42 { 0x2238, 0x00 },43 { 0x2239, 0x00 },44 { 0x2f01, 0x00 },45 { 0x2f02, 0x09 },46 { 0x2f03, 0x0b },47 { 0x2f04, 0x00 },48 { 0x2f05, 0x0e },49 { 0x2f06, 0x01 },50 { 0x2f08, 0x00 },51 { 0x2f09, 0x00 },52 { 0x2f0a, 0x00 },53 { 0x2f0b, 0x00 },54 { 0x2f0c, 0x00 },55 { 0x2f0d, 0x00 },56 { 0x2f0e, 0x12 },57 { 0x2f0f, 0x00 },58 { 0x2f10, 0x00 },59 { 0x2f11, 0x00 },60 { 0x2f12, 0x00 },61 { 0x2f13, 0x00 },62 { 0x2f14, 0x00 },63 { 0x2f15, 0x00 },64 { 0x2f16, 0x00 },65 { 0x2f17, 0x00 },66 { 0x2f18, 0x00 },67 { 0x2f19, 0x03 },68 { 0x2f1a, 0x00 },69 { 0x2f1f, 0x10 },70 { 0x2f20, 0x00 },71 { 0x2f21, 0x00 },72 { 0x2f22, 0x00 },73 { 0x2f23, 0x00 },74 { 0x2f24, 0x00 },75 { 0x2f25, 0x00 },76 { 0x2f52, 0x01 },77 { 0x2f5a, 0x02 },78 { 0x2f5b, 0x05 },79 { SDW_SDCA_CTL(FUN_MIC_ARRAY, RT715_SDCA_CX_CLK_SEL_EN,80 RT715_SDCA_CX_CLK_SEL_CTRL, CH_00), 0x1 },81 { SDW_SDCA_CTL(FUN_MIC_ARRAY, RT715_SDCA_FU_ADC8_9_VOL,82 RT715_SDCA_FU_MUTE_CTRL, CH_01), 0x01 },83 { SDW_SDCA_CTL(FUN_MIC_ARRAY, RT715_SDCA_FU_ADC8_9_VOL,84 RT715_SDCA_FU_MUTE_CTRL, CH_02), 0x01 },85 { SDW_SDCA_CTL(FUN_MIC_ARRAY, RT715_SDCA_FU_ADC8_9_VOL,86 RT715_SDCA_FU_MUTE_CTRL, CH_03), 0x01 },87 { SDW_SDCA_CTL(FUN_MIC_ARRAY, RT715_SDCA_FU_ADC8_9_VOL,88 RT715_SDCA_FU_MUTE_CTRL, CH_04), 0x01 },89 { SDW_SDCA_CTL(FUN_MIC_ARRAY, RT715_SDCA_FU_ADC10_11_VOL,90 RT715_SDCA_FU_MUTE_CTRL, CH_01), 0x01 },91 { SDW_SDCA_CTL(FUN_MIC_ARRAY, RT715_SDCA_FU_ADC10_11_VOL,92 RT715_SDCA_FU_MUTE_CTRL, CH_02), 0x01 },93 { SDW_SDCA_CTL(FUN_MIC_ARRAY, RT715_SDCA_FU_ADC10_11_VOL,94 RT715_SDCA_FU_MUTE_CTRL, CH_03), 0x01 },95 { SDW_SDCA_CTL(FUN_MIC_ARRAY, RT715_SDCA_FU_ADC10_11_VOL,96 RT715_SDCA_FU_MUTE_CTRL, CH_04), 0x01 },97 { SDW_SDCA_CTL(FUN_MIC_ARRAY, RT715_SDCA_FU_ADC7_27_VOL,98 RT715_SDCA_FU_MUTE_CTRL, CH_01), 0x01 },99 { SDW_SDCA_CTL(FUN_MIC_ARRAY, RT715_SDCA_FU_ADC7_27_VOL,100 RT715_SDCA_FU_MUTE_CTRL, CH_02), 0x01 },101 { SDW_SDCA_CTL(FUN_MIC_ARRAY, RT715_SDCA_SMPU_TRIG_ST_EN,102 RT715_SDCA_SMPU_TRIG_EN_CTRL, CH_00), 0x02 },103 { SDW_SDCA_CTL(FUN_MIC_ARRAY, RT715_SDCA_SMPU_TRIG_ST_EN,104 RT715_SDCA_SMPU_TRIG_ST_CTRL, CH_00), 0x00 },105 { SDW_SDCA_CTL(FUN_MIC_ARRAY, RT715_SDCA_FU_ADC7_27_VOL,106 RT715_SDCA_FU_MUTE_CTRL, CH_01), 0x01 },107 { SDW_SDCA_CTL(FUN_MIC_ARRAY, RT715_SDCA_FU_ADC7_27_VOL,108 RT715_SDCA_FU_MUTE_CTRL, CH_02), 0x01 },109};110 111static const struct reg_default rt715_mbq_reg_defaults_sdca[] = {112 { 0x200002b, 0x0420 },113 { 0x2000036, 0x0000 },114 { 0x2000037, 0x0000 },115 { 0x2000039, 0xaa81 },116 { 0x2000044, 0x0202 },117 { 0x6100000, 0x0100 },118 { SDW_SDCA_CTL(FUN_MIC_ARRAY, RT715_SDCA_FU_ADC8_9_VOL,119 RT715_SDCA_FU_VOL_CTRL, CH_01), 0x00 },120 { SDW_SDCA_CTL(FUN_MIC_ARRAY, RT715_SDCA_FU_ADC8_9_VOL,121 RT715_SDCA_FU_VOL_CTRL, CH_02), 0x00 },122 { SDW_SDCA_CTL(FUN_MIC_ARRAY, RT715_SDCA_FU_ADC8_9_VOL,123 RT715_SDCA_FU_VOL_CTRL, CH_03), 0x00 },124 { SDW_SDCA_CTL(FUN_MIC_ARRAY, RT715_SDCA_FU_ADC8_9_VOL,125 RT715_SDCA_FU_VOL_CTRL, CH_04), 0x00 },126 { SDW_SDCA_CTL(FUN_MIC_ARRAY, RT715_SDCA_FU_ADC10_11_VOL,127 RT715_SDCA_FU_VOL_CTRL, CH_01), 0x00 },128 { SDW_SDCA_CTL(FUN_MIC_ARRAY, RT715_SDCA_FU_ADC10_11_VOL,129 RT715_SDCA_FU_VOL_CTRL, CH_02), 0x00 },130 { SDW_SDCA_CTL(FUN_MIC_ARRAY, RT715_SDCA_FU_ADC10_11_VOL,131 RT715_SDCA_FU_VOL_CTRL, CH_03), 0x00 },132 { SDW_SDCA_CTL(FUN_MIC_ARRAY, RT715_SDCA_FU_ADC10_11_VOL,133 RT715_SDCA_FU_VOL_CTRL, CH_04), 0x00 },134 { SDW_SDCA_CTL(FUN_MIC_ARRAY, RT715_SDCA_FU_ADC7_27_VOL,135 RT715_SDCA_FU_VOL_CTRL, CH_01), 0x00 },136 { SDW_SDCA_CTL(FUN_MIC_ARRAY, RT715_SDCA_FU_ADC7_27_VOL,137 RT715_SDCA_FU_VOL_CTRL, CH_02), 0x00 },138 { SDW_SDCA_CTL(FUN_MIC_ARRAY, RT715_SDCA_FU_AMIC_GAIN_EN,139 RT715_SDCA_FU_DMIC_GAIN_CTRL, CH_01), 0x00 },140 { SDW_SDCA_CTL(FUN_MIC_ARRAY, RT715_SDCA_FU_AMIC_GAIN_EN,141 RT715_SDCA_FU_DMIC_GAIN_CTRL, CH_02), 0x00 },142 { SDW_SDCA_CTL(FUN_MIC_ARRAY, RT715_SDCA_FU_AMIC_GAIN_EN,143 RT715_SDCA_FU_DMIC_GAIN_CTRL, CH_03), 0x00 },144 { SDW_SDCA_CTL(FUN_MIC_ARRAY, RT715_SDCA_FU_AMIC_GAIN_EN,145 RT715_SDCA_FU_DMIC_GAIN_CTRL, CH_04), 0x00 },146 { SDW_SDCA_CTL(FUN_MIC_ARRAY, RT715_SDCA_FU_AMIC_GAIN_EN,147 RT715_SDCA_FU_DMIC_GAIN_CTRL, CH_05), 0x00 },148 { SDW_SDCA_CTL(FUN_MIC_ARRAY, RT715_SDCA_FU_AMIC_GAIN_EN,149 RT715_SDCA_FU_DMIC_GAIN_CTRL, CH_06), 0x00 },150 { SDW_SDCA_CTL(FUN_MIC_ARRAY, RT715_SDCA_FU_AMIC_GAIN_EN,151 RT715_SDCA_FU_DMIC_GAIN_CTRL, CH_07), 0x00 },152 { SDW_SDCA_CTL(FUN_MIC_ARRAY, RT715_SDCA_FU_AMIC_GAIN_EN,153 RT715_SDCA_FU_DMIC_GAIN_CTRL, CH_08), 0x00 },154 { SDW_SDCA_CTL(FUN_MIC_ARRAY, RT715_SDCA_FU_DMIC_GAIN_EN,155 RT715_SDCA_FU_DMIC_GAIN_CTRL, CH_01), 0x00 },156 { SDW_SDCA_CTL(FUN_MIC_ARRAY, RT715_SDCA_FU_DMIC_GAIN_EN,157 RT715_SDCA_FU_DMIC_GAIN_CTRL, CH_02), 0x00 },158 { SDW_SDCA_CTL(FUN_MIC_ARRAY, RT715_SDCA_FU_DMIC_GAIN_EN,159 RT715_SDCA_FU_DMIC_GAIN_CTRL, CH_03), 0x00 },160 { SDW_SDCA_CTL(FUN_MIC_ARRAY, RT715_SDCA_FU_DMIC_GAIN_EN,161 RT715_SDCA_FU_DMIC_GAIN_CTRL, CH_04), 0x00 },162 { SDW_SDCA_CTL(FUN_MIC_ARRAY, RT715_SDCA_FU_DMIC_GAIN_EN,163 RT715_SDCA_FU_DMIC_GAIN_CTRL, CH_05), 0x00 },164 { SDW_SDCA_CTL(FUN_MIC_ARRAY, RT715_SDCA_FU_DMIC_GAIN_EN,165 RT715_SDCA_FU_DMIC_GAIN_CTRL, CH_06), 0x00 },166 { SDW_SDCA_CTL(FUN_MIC_ARRAY, RT715_SDCA_FU_DMIC_GAIN_EN,167 RT715_SDCA_FU_DMIC_GAIN_CTRL, CH_07), 0x00 },168 { SDW_SDCA_CTL(FUN_MIC_ARRAY, RT715_SDCA_FU_DMIC_GAIN_EN,169 RT715_SDCA_FU_DMIC_GAIN_CTRL, CH_08), 0x00 },170};171#endif /* __RT715_SDW_SDCA_H__ */172