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1/* SPDX-License-Identifier: GPL-2.0-only */2/*3 * rt715-sdca.h -- RT715 ALSA SoC audio driver header4 *5 * Copyright(c) 2020 Realtek Semiconductor Corp.6 */7 8#ifndef __RT715_SDCA_H__9#define __RT715_SDCA_H__10 11#include <linux/regmap.h>12#include <linux/soundwire/sdw.h>13#include <linux/soundwire/sdw_type.h>14#include <sound/soc.h>15#include <linux/workqueue.h>16#include <linux/device.h>17 18struct rt715_sdca_priv {19 struct regmap *regmap;20 struct regmap *mbq_regmap;21 struct snd_soc_codec *codec;22 struct sdw_slave *slave;23 struct delayed_work adc_mute_work;24 int dbg_nid;25 int dbg_vid;26 int dbg_payload;27 struct sdw_bus_params params;28 bool hw_init;29 bool first_hw_init;30 int l_is_unmute;31 int r_is_unmute;32 int hw_sdw_ver;33 int kctl_switch_orig[4];34 int kctl_2ch_orig[2];35 int kctl_4ch_orig[4];36 int kctl_8ch_orig[8];37};38 39struct rt715_sdca_kcontrol_private {40 unsigned int reg_base;41 unsigned int count;42 unsigned int max;43 unsigned int shift;44 unsigned int invert;45};46 47/* MIPI Register */48#define RT715_INT_CTRL 0x005a49#define RT715_INT_MASK 0x005e50 51/* NID */52#define RT715_AUDIO_FUNCTION_GROUP 0x0153#define RT715_MIC_ADC 0x0754#define RT715_LINE_ADC 0x0855#define RT715_MIX_ADC 0x0956#define RT715_DMIC1 0x1257#define RT715_DMIC2 0x1358#define RT715_MIC1 0x1859#define RT715_MIC2 0x1960#define RT715_LINE1 0x1a61#define RT715_LINE2 0x1b62#define RT715_DMIC3 0x1d63#define RT715_DMIC4 0x2964#define RT715_VENDOR_REG 0x2065#define RT715_MUX_IN1 0x2266#define RT715_MUX_IN2 0x2367#define RT715_MUX_IN3 0x2468#define RT715_MUX_IN4 0x2569#define RT715_MIX_ADC2 0x2770#define RT715_INLINE_CMD 0x5571#define RT715_VENDOR_HDA_CTL 0x6172 73/* Index (NID:20h) */74#define RT715_PRODUCT_NUM 0x075#define RT715_IRQ_CTRL 0x2b76#define RT715_AD_FUNC_EN 0x3677#define RT715_REV_1 0x3778#define RT715_SDW_INPUT_SEL 0x3979#define RT715_DFLL_VAD 0x4480#define RT715_EXT_DMIC_CLK_CTRL2 0x5481 82/* Index (NID:61h) */83#define RT715_HDA_LEGACY_MUX_CTL1 0x0084 85/* SDCA (Function) */86#define FUN_JACK_CODEC 0x0187#define FUN_MIC_ARRAY 0x0288#define FUN_HID 0x0389/* SDCA (Entity) */90#define RT715_SDCA_ST_EN 0x0091#define RT715_SDCA_CS_FREQ_IND_EN 0x0192#define RT715_SDCA_FU_ADC8_9_VOL 0x0293#define RT715_SDCA_SMPU_TRIG_ST_EN 0x0594#define RT715_SDCA_FU_ADC10_11_VOL 0x0695#define RT715_SDCA_FU_ADC7_27_VOL 0x0a96#define RT715_SDCA_FU_AMIC_GAIN_EN 0x0c97#define RT715_SDCA_FU_DMIC_GAIN_EN 0x0e98#define RT715_SDCA_CX_CLK_SEL_EN 0x1099#define RT715_SDCA_CREQ_POW_EN 0x18100/* SDCA (Control) */101#define RT715_SDCA_ST_CTRL 0x00102#define RT715_SDCA_CX_CLK_SEL_CTRL 0x01103#define RT715_SDCA_REQ_POW_CTRL 0x01104#define RT715_SDCA_FU_MUTE_CTRL 0x01105#define RT715_SDCA_FU_VOL_CTRL 0x02106#define RT715_SDCA_FU_DMIC_GAIN_CTRL 0x0b107#define RT715_SDCA_FREQ_IND_CTRL 0x10108#define RT715_SDCA_SMPU_TRIG_EN_CTRL 0x10109#define RT715_SDCA_SMPU_TRIG_ST_CTRL 0x11110/* SDCA (Channel) */111#define CH_00 0x00112#define CH_01 0x01113#define CH_02 0x02114#define CH_03 0x03115#define CH_04 0x04116#define CH_05 0x05117#define CH_06 0x06118#define CH_07 0x07119#define CH_08 0x08120 121#define RT715_SDCA_DB_STEP 375122 123enum {124 RT715_AIF1,125 RT715_AIF2,126};127 128int rt715_sdca_io_init(struct device *dev, struct sdw_slave *slave);129int rt715_sdca_init(struct device *dev, struct regmap *mbq_regmap,130 struct regmap *regmap, struct sdw_slave *slave);131 132#endif /* __RT715_SDCA_H__ */133