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1/* SPDX-License-Identifier: GPL-2.0-only */2/*3 * rt722-sdca.h -- RT722 SDCA ALSA SoC audio driver header4 *5 * Copyright(c) 2023 Realtek Semiconductor Corp.6 */7 8#ifndef __RT722_H__9#define __RT722_H__10 11#include <linux/pm.h>12#include <linux/regmap.h>13#include <linux/soundwire/sdw.h>14#include <linux/soundwire/sdw_type.h>15#include <sound/soc.h>16#include <linux/workqueue.h>17 18struct rt722_sdca_priv {19 struct regmap *regmap;20 struct regmap *mbq_regmap;21 struct snd_soc_component *component;22 struct sdw_slave *slave;23 struct sdw_bus_params params;24 bool hw_init;25 bool first_hw_init;26 struct mutex calibrate_mutex;27 struct mutex disable_irq_lock;28 bool disable_irq;29 /* For Headset jack & Headphone */30 unsigned int scp_sdca_stat1;31 unsigned int scp_sdca_stat2;32 struct snd_soc_jack *hs_jack;33 struct delayed_work jack_detect_work;34 struct delayed_work jack_btn_check_work;35 int jack_type;36 int jd_src;37 bool fu0f_dapm_mute;38 bool fu0f_mixer_l_mute;39 bool fu0f_mixer_r_mute;40 /* For DMIC */41 bool fu1e_dapm_mute;42 bool fu1e_mixer_mute[4];43};44 45struct rt722_sdca_dmic_kctrl_priv {46 unsigned int reg_base;47 unsigned int count;48 unsigned int max;49 unsigned int invert;50};51 52/* NID */53#define RT722_VENDOR_REG 0x2054#define RT722_VENDOR_CALI 0x5855#define RT722_VENDOR_SPK_EFUSE 0x5c56#define RT722_VENDOR_IMS_DRE 0x5b57#define RT722_VENDOR_ANALOG_CTL 0x5f58#define RT722_VENDOR_HDA_CTL 0x6159 60/* Index (NID:20h) */61#define RT722_JD_PRODUCT_NUM 0x0062#define RT722_ANALOG_BIAS_CTL3 0x0463#define RT722_JD_CTRL1 0x0964#define RT722_LDO2_3_CTL1 0x0e65#define RT722_LDO1_CTL 0x1a66#define RT722_HP_JD_CTRL 0x2467#define RT722_CLSD_CTRL6 0x3c68#define RT722_COMBO_JACK_AUTO_CTL1 0x4569#define RT722_COMBO_JACK_AUTO_CTL2 0x4670#define RT722_COMBO_JACK_AUTO_CTL3 0x4771#define RT722_DIGITAL_MISC_CTRL4 0x4a72#define RT722_VREFO_GAT 0x6373#define RT722_FSM_CTL 0x6774#define RT722_SDCA_INTR_REC 0x8275#define RT722_SW_CONFIG1 0x8a76#define RT722_SW_CONFIG2 0x8b77 78/* Index (NID:58h) */79#define RT722_DAC_DC_CALI_CTL0 0x0080#define RT722_DAC_DC_CALI_CTL1 0x0181#define RT722_DAC_DC_CALI_CTL2 0x0282#define RT722_DAC_DC_CALI_CTL3 0x0383 84/* Index (NID:59h) */85#define RT722_ULTRA_SOUND_DETECTOR6 0x1e86 87/* Index (NID:5bh) */88#define RT722_IMS_DIGITAL_CTL1 0x0089#define RT722_IMS_DIGITAL_CTL5 0x0590#define RT722_HP_DETECT_RLDET_CTL1 0x2991#define RT722_HP_DETECT_RLDET_CTL2 0x2a92 93/* Index (NID:5fh) */94#define RT722_MISC_POWER_CTL0 0x0095#define RT722_MISC_POWER_CTL7 0x0896 97/* Index (NID:61h) */98#define RT722_HDA_LEGACY_MUX_CTL0 0x0099#define RT722_HDA_LEGACY_UNSOL_CTL 0x03100#define RT722_HDA_LEGACY_CONFIG_CTL0 0x06101#define RT722_HDA_LEGACY_RESET_CTL 0x08102#define RT722_HDA_LEGACY_GPIO_WAKE_EN_CTL 0x0e103#define RT722_DMIC_ENT_FLOAT_CTL 0x10104#define RT722_DMIC_GAIN_ENT_FLOAT_CTL0 0x11105#define RT722_DMIC_GAIN_ENT_FLOAT_CTL2 0x13106#define RT722_ADC_ENT_FLOAT_CTL 0x15107#define RT722_ADC_VOL_CH_FLOAT_CTL 0x17108#define RT722_ADC_SAMPLE_RATE_FLOAT 0x18109#define RT722_DAC03_HP_PDE_FLOAT_CTL 0x22110#define RT722_MIC2_LINE2_PDE_FLOAT_CTL 0x23111#define RT722_ET41_LINE2_PDE_FLOAT_CTL 0x24112#define RT722_ADC0A_08_PDE_FLOAT_CTL 0x25113#define RT722_ADC10_PDE_FLOAT_CTL 0x26114#define RT722_DMIC1_2_PDE_FLOAT_CTL 0x28115#define RT722_AMP_PDE_FLOAT_CTL 0x29116#define RT722_I2S_IN_OUT_PDE_FLOAT_CTL 0x2f117#define RT722_GE_RELATED_CTL1 0x45118#define RT722_GE_RELATED_CTL2 0x46119#define RT722_MIXER_CTL0 0x52120#define RT722_MIXER_CTL1 0x53121#define RT722_EAPD_CTL 0x55122#define RT722_UMP_HID_CTL0 0x60123#define RT722_UMP_HID_CTL1 0x61124#define RT722_UMP_HID_CTL2 0x62125#define RT722_UMP_HID_CTL3 0x63126#define RT722_UMP_HID_CTL4 0x64127#define RT722_UMP_HID_CTL5 0x65128#define RT722_UMP_HID_CTL6 0x66129#define RT722_UMP_HID_CTL7 0x67130#define RT722_UMP_HID_CTL8 0x68131#define RT722_FLOAT_CTRL_1 0x70132#define RT722_ENT_FLOAT_CTRL_1 0x76133 134/* Parameter & Verb control 01 (0x1a)(NID:20h) */135#define RT722_HIDDEN_REG_SW_RESET (0x1 << 14)136 137/* combo jack auto switch control 2 (0x46)(NID:20h) */138#define RT722_COMBOJACK_AUTO_DET_STATUS (0x1 << 11)139#define RT722_COMBOJACK_AUTO_DET_TRS (0x1 << 10)140#define RT722_COMBOJACK_AUTO_DET_CTIA (0x1 << 9)141#define RT722_COMBOJACK_AUTO_DET_OMTP (0x1 << 8)142 143/* DAC calibration control (0x00)(NID:58h) */144#define RT722_DC_CALIB_CTRL (0x1 << 16)145/* DAC DC offset calibration control-1 (0x01)(NID:58h) */146#define RT722_PDM_DC_CALIB_STATUS (0x1 << 15)147 148#define RT722_EAPD_HIGH 0x2149#define RT722_EAPD_LOW 0x0150 151/* Buffer address for HID */152#define RT722_BUF_ADDR_HID1 0x44030000153#define RT722_BUF_ADDR_HID2 0x44030020154 155/* RT722 SDCA Control - function number */156#define FUNC_NUM_JACK_CODEC 0x01157#define FUNC_NUM_MIC_ARRAY 0x02158#define FUNC_NUM_HID 0x03159#define FUNC_NUM_AMP 0x04160 161/* RT722 SDCA entity */162#define RT722_SDCA_ENT_HID01 0x01163#define RT722_SDCA_ENT_GE49 0x49164#define RT722_SDCA_ENT_USER_FU05 0x05165#define RT722_SDCA_ENT_USER_FU06 0x06166#define RT722_SDCA_ENT_USER_FU0F 0x0f167#define RT722_SDCA_ENT_USER_FU10 0x19168#define RT722_SDCA_ENT_USER_FU1E 0x1e169#define RT722_SDCA_ENT_FU15 0x15170#define RT722_SDCA_ENT_PDE23 0x23171#define RT722_SDCA_ENT_PDE40 0x40172#define RT722_SDCA_ENT_PDE11 0x11173#define RT722_SDCA_ENT_PDE12 0x12174#define RT722_SDCA_ENT_PDE2A 0x2a175#define RT722_SDCA_ENT_CS01 0x01176#define RT722_SDCA_ENT_CS11 0x11177#define RT722_SDCA_ENT_CS1F 0x1f178#define RT722_SDCA_ENT_CS1C 0x1c179#define RT722_SDCA_ENT_CS31 0x31180#define RT722_SDCA_ENT_OT23 0x42181#define RT722_SDCA_ENT_IT26 0x26182#define RT722_SDCA_ENT_IT09 0x09183#define RT722_SDCA_ENT_PLATFORM_FU15 0x15184#define RT722_SDCA_ENT_PLATFORM_FU44 0x44185#define RT722_SDCA_ENT_XU03 0x03186#define RT722_SDCA_ENT_XU0D 0x0d187 188/* RT722 SDCA control */189#define RT722_SDCA_CTL_SAMPLE_FREQ_INDEX 0x10190#define RT722_SDCA_CTL_FU_MUTE 0x01191#define RT722_SDCA_CTL_FU_VOLUME 0x02192#define RT722_SDCA_CTL_HIDTX_CURRENT_OWNER 0x10193#define RT722_SDCA_CTL_HIDTX_SET_OWNER_TO_DEVICE 0x11194#define RT722_SDCA_CTL_HIDTX_MESSAGE_OFFSET 0x12195#define RT722_SDCA_CTL_HIDTX_MESSAGE_LENGTH 0x13196#define RT722_SDCA_CTL_SELECTED_MODE 0x01197#define RT722_SDCA_CTL_DETECTED_MODE 0x02198#define RT722_SDCA_CTL_REQ_POWER_STATE 0x01199#define RT722_SDCA_CTL_VENDOR_DEF 0x30200#define RT722_SDCA_CTL_FU_CH_GAIN 0x0b201 202/* RT722 SDCA channel */203#define CH_L 0x01204#define CH_R 0x02205#define CH_01 0x01206#define CH_02 0x02207#define CH_03 0x03208#define CH_04 0x04209#define CH_08 0x08210 211/* sample frequency index */212#define RT722_SDCA_RATE_16000HZ 0x04213#define RT722_SDCA_RATE_32000HZ 0x07214#define RT722_SDCA_RATE_44100HZ 0x08215#define RT722_SDCA_RATE_48000HZ 0x09216#define RT722_SDCA_RATE_96000HZ 0x0b217#define RT722_SDCA_RATE_192000HZ 0x0d218 219enum {220 RT722_AIF1, /* For headset mic and headphone */221 RT722_AIF2, /* For speaker */222 RT722_AIF3, /* For dmic */223 RT722_AIFS,224};225 226enum rt722_sdca_jd_src {227 RT722_JD_NULL,228 RT722_JD1,229};230 231int rt722_sdca_io_init(struct device *dev, struct sdw_slave *slave);232int rt722_sdca_init(struct device *dev, struct regmap *regmap,233 struct regmap *mbq_regmap, struct sdw_slave *slave);234int rt722_sdca_index_write(struct rt722_sdca_priv *rt722,235 unsigned int nid, unsigned int reg, unsigned int value);236int rt722_sdca_index_read(struct rt722_sdca_priv *rt722,237 unsigned int nid, unsigned int reg, unsigned int *value);238 239int rt722_sdca_jack_detect(struct rt722_sdca_priv *rt722, bool *hp, bool *mic);240#endif /* __RT722_H__ */241