198 lines · c
1/* SPDX-License-Identifier: GPL-2.0+ */2/*3 * tfa9879.h -- driver for NXP Semiconductors TFA98794 *5 * Copyright (C) 2014 Axentia Technologies AB6 * Author: Peter Rosin <peda@axentia.se>7 */8 9#ifndef _TFA9879_H10#define _TFA9879_H11 12#define TFA9879_DEVICE_CONTROL 0x0013#define TFA9879_SERIAL_INTERFACE_1 0x0114#define TFA9879_PCM_IOM2_FORMAT_1 0x0215#define TFA9879_SERIAL_INTERFACE_2 0x0316#define TFA9879_PCM_IOM2_FORMAT_2 0x0417#define TFA9879_EQUALIZER_A1 0x0518#define TFA9879_EQUALIZER_A2 0x0619#define TFA9879_EQUALIZER_B1 0x0720#define TFA9879_EQUALIZER_B2 0x0821#define TFA9879_EQUALIZER_C1 0x0922#define TFA9879_EQUALIZER_C2 0x0a23#define TFA9879_EQUALIZER_D1 0x0b24#define TFA9879_EQUALIZER_D2 0x0c25#define TFA9879_EQUALIZER_E1 0x0d26#define TFA9879_EQUALIZER_E2 0x0e27#define TFA9879_BYPASS_CONTROL 0x0f28#define TFA9879_DYNAMIC_RANGE_COMPR 0x1029#define TFA9879_BASS_TREBLE 0x1130#define TFA9879_HIGH_PASS_FILTER 0x1231#define TFA9879_VOLUME_CONTROL 0x1332#define TFA9879_MISC_CONTROL 0x1433#define TFA9879_MISC_STATUS 0x1534 35/* TFA9879_DEVICE_CONTROL */36#define TFA9879_INPUT_SEL_MASK 0x001037#define TFA9879_INPUT_SEL_SHIFT 438#define TFA9879_OPMODE_MASK 0x000839#define TFA9879_OPMODE_SHIFT 340#define TFA9879_RESET_MASK 0x000241#define TFA9879_RESET_SHIFT 142#define TFA9879_POWERUP_MASK 0x000143#define TFA9879_POWERUP_SHIFT 044 45/* TFA9879_SERIAL_INTERFACE */46#define TFA9879_MONO_SEL_MASK 0x0c0047#define TFA9879_MONO_SEL_SHIFT 1048#define TFA9879_MONO_SEL_LEFT 049#define TFA9879_MONO_SEL_RIGHT 150#define TFA9879_MONO_SEL_BOTH 251#define TFA9879_I2S_FS_MASK 0x03c052#define TFA9879_I2S_FS_SHIFT 653#define TFA9879_I2S_FS_8000 054#define TFA9879_I2S_FS_11025 155#define TFA9879_I2S_FS_12000 256#define TFA9879_I2S_FS_16000 357#define TFA9879_I2S_FS_22050 458#define TFA9879_I2S_FS_24000 559#define TFA9879_I2S_FS_32000 660#define TFA9879_I2S_FS_44100 761#define TFA9879_I2S_FS_48000 862#define TFA9879_I2S_FS_64000 963#define TFA9879_I2S_FS_88200 1064#define TFA9879_I2S_FS_96000 1165#define TFA9879_I2S_SET_MASK 0x003866#define TFA9879_I2S_SET_SHIFT 367#define TFA9879_I2S_SET_MSB_J_24 268#define TFA9879_I2S_SET_I2S_24 369#define TFA9879_I2S_SET_LSB_J_16 470#define TFA9879_I2S_SET_LSB_J_18 571#define TFA9879_I2S_SET_LSB_J_20 672#define TFA9879_I2S_SET_LSB_J_24 773#define TFA9879_SCK_POL_MASK 0x000474#define TFA9879_SCK_POL_SHIFT 275#define TFA9879_SCK_POL_NORMAL 076#define TFA9879_SCK_POL_INVERSE 177#define TFA9879_I_MODE_MASK 0x000378#define TFA9879_I_MODE_SHIFT 079#define TFA9879_I_MODE_I2S 080#define TFA9879_I_MODE_PCM_IOM2_SHORT 181#define TFA9879_I_MODE_PCM_IOM2_LONG 282 83/* TFA9879_PCM_IOM2_FORMAT */84#define TFA9879_PCM_FS_MASK 0x080085#define TFA9879_PCM_FS_SHIFT 1186#define TFA9879_A_LAW_MASK 0x040087#define TFA9879_A_LAW_SHIFT 1088#define TFA9879_PCM_COMP_MASK 0x020089#define TFA9879_PCM_COMP_SHIFT 990#define TFA9879_PCM_DL_MASK 0x010091#define TFA9879_PCM_DL_SHIFT 892#define TFA9879_D1_SLOT_MASK 0x00f093#define TFA9879_D1_SLOT_SHIFT 494#define TFA9879_D2_SLOT_MASK 0x000f95#define TFA9879_D2_SLOT_SHIFT 096 97/* TFA9879_EQUALIZER_X1 */98#define TFA9879_T1_MASK 0x800099#define TFA9879_T1_SHIFT 15100#define TFA9879_K1M_MASK 0x7ff0101#define TFA9879_K1M_SHIFT 4102#define TFA9879_K1E_MASK 0x000f103#define TFA9879_K1E_SHIFT 0104 105/* TFA9879_EQUALIZER_X2 */106#define TFA9879_T2_MASK 0x8000107#define TFA9879_T2_SHIFT 15108#define TFA9879_K2M_MASK 0x7800109#define TFA9879_K2M_SHIFT 11110#define TFA9879_K2E_MASK 0x0700111#define TFA9879_K2E_SHIFT 8112#define TFA9879_K0_MASK 0x00fe113#define TFA9879_K0_SHIFT 1114#define TFA9879_S_MASK 0x0001115#define TFA9879_S_SHIFT 0116 117/* TFA9879_BYPASS_CONTROL */118#define TFA9879_L_OCP_MASK 0x00c0119#define TFA9879_L_OCP_SHIFT 6120#define TFA9879_L_OTP_MASK 0x0030121#define TFA9879_L_OTP_SHIFT 4122#define TFA9879_CLIPCTRL_MASK 0x0008123#define TFA9879_CLIPCTRL_SHIFT 3124#define TFA9879_HPF_BP_MASK 0x0004125#define TFA9879_HPF_BP_SHIFT 2126#define TFA9879_DRC_BP_MASK 0x0002127#define TFA9879_DRC_BP_SHIFT 1128#define TFA9879_EQ_BP_MASK 0x0001129#define TFA9879_EQ_BP_SHIFT 0130 131/* TFA9879_DYNAMIC_RANGE_COMPR */132#define TFA9879_AT_LVL_MASK 0xf000133#define TFA9879_AT_LVL_SHIFT 12134#define TFA9879_AT_RATE_MASK 0x0f00135#define TFA9879_AT_RATE_SHIFT 8136#define TFA9879_RL_LVL_MASK 0x00f0137#define TFA9879_RL_LVL_SHIFT 4138#define TFA9879_RL_RATE_MASK 0x000f139#define TFA9879_RL_RATE_SHIFT 0140 141/* TFA9879_BASS_TREBLE */142#define TFA9879_G_TRBLE_MASK 0x3e00143#define TFA9879_G_TRBLE_SHIFT 9144#define TFA9879_F_TRBLE_MASK 0x0180145#define TFA9879_F_TRBLE_SHIFT 7146#define TFA9879_G_BASS_MASK 0x007c147#define TFA9879_G_BASS_SHIFT 2148#define TFA9879_F_BASS_MASK 0x0003149#define TFA9879_F_BASS_SHIFT 0150 151/* TFA9879_HIGH_PASS_FILTER */152#define TFA9879_HP_CTRL_MASK 0x00ff153#define TFA9879_HP_CTRL_SHIFT 0154 155/* TFA9879_VOLUME_CONTROL */156#define TFA9879_ZR_CRSS_MASK 0x1000157#define TFA9879_ZR_CRSS_SHIFT 12158#define TFA9879_VOL_MASK 0x00ff159#define TFA9879_VOL_SHIFT 0160 161/* TFA9879_MISC_CONTROL */162#define TFA9879_DE_PHAS_MASK 0x0c00163#define TFA9879_DE_PHAS_SHIFT 10164#define TFA9879_H_MUTE_MASK 0x0200165#define TFA9879_H_MUTE_SHIFT 9166#define TFA9879_S_MUTE_MASK 0x0100167#define TFA9879_S_MUTE_SHIFT 8168#define TFA9879_P_LIM_MASK 0x00ff169#define TFA9879_P_LIM_SHIFT 0170 171/* TFA9879_MISC_STATUS */172#define TFA9879_PS_MASK 0x4000173#define TFA9879_PS_SHIFT 14174#define TFA9879_PORA_MASK 0x2000175#define TFA9879_PORA_SHIFT 13176#define TFA9879_AMP_MASK 0x0600177#define TFA9879_AMP_SHIFT 9178#define TFA9879_IBP_2_MASK 0x0100179#define TFA9879_IBP_2_SHIFT 8180#define TFA9879_OFP_2_MASK 0x0080181#define TFA9879_OFP_2_SHIFT 7182#define TFA9879_UFP_2_MASK 0x0040183#define TFA9879_UFP_2_SHIFT 6184#define TFA9879_IBP_1_MASK 0x0020185#define TFA9879_IBP_1_SHIFT 5186#define TFA9879_OFP_1_MASK 0x0010187#define TFA9879_OFP_1_SHIFT 4188#define TFA9879_UFP_1_MASK 0x0008189#define TFA9879_UFP_1_SHIFT 3190#define TFA9879_OCPOKA_MASK 0x0004191#define TFA9879_OCPOKA_SHIFT 2192#define TFA9879_OCPOKB_MASK 0x0002193#define TFA9879_OCPOKB_SHIFT 1194#define TFA9879_OTPOK_MASK 0x0001195#define TFA9879_OTPOK_SHIFT 0196 197#endif198