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1/* SPDX-License-Identifier: GPL-2.0-only */2/*3 * Copyright(c) 2021-2022 Intel Corporation4 *5 * Authors: Cezary Rojewski <cezary.rojewski@intel.com>6 * Amadeusz Slawinski <amadeuszx.slawinski@linux.intel.com>7 */8 9#ifndef __SOUND_SOC_INTEL_AVS_H10#define __SOUND_SOC_INTEL_AVS_H11 12#include <linux/debugfs.h>13#include <linux/device.h>14#include <linux/firmware.h>15#include <linux/kfifo.h>16#include <sound/hda_codec.h>17#include <sound/hda_register.h>18#include <sound/soc-component.h>19#include "messages.h"20#include "registers.h"21 22struct avs_dev;23struct avs_tplg;24struct avs_tplg_library;25struct avs_soc_component;26struct avs_ipc_msg;27 28#ifdef CONFIG_ACPI29#define AVS_S0IX_SUPPORTED \30 (acpi_gbl_FADT.flags & ACPI_FADT_LOW_POWER_S0)31#else32#define AVS_S0IX_SUPPORTED false33#endif34 35/*36 * struct avs_dsp_ops - Platform-specific DSP operations37 *38 * @power: Power on or off DSP cores39 * @reset: Enter or exit reset state on DSP cores40 * @stall: Stall or run DSP cores41 * @irq_handler: Top half of IPC servicing42 * @irq_thread: Bottom half of IPC servicing43 * @int_control: Enable or disable IPC interrupts44 */45struct avs_dsp_ops {46 int (* const power)(struct avs_dev *, u32, bool);47 int (* const reset)(struct avs_dev *, u32, bool);48 int (* const stall)(struct avs_dev *, u32, bool);49 irqreturn_t (* const dsp_interrupt)(struct avs_dev *);50 void (* const int_control)(struct avs_dev *, bool);51 int (* const load_basefw)(struct avs_dev *, struct firmware *);52 int (* const load_lib)(struct avs_dev *, struct firmware *, u32);53 int (* const transfer_mods)(struct avs_dev *, bool, struct avs_module_entry *, u32);54 int (* const enable_logs)(struct avs_dev *, enum avs_log_enable, u32, u32, unsigned long,55 u32 *);56 int (* const log_buffer_offset)(struct avs_dev *, u32);57 int (* const log_buffer_status)(struct avs_dev *, union avs_notify_msg *);58 int (* const coredump)(struct avs_dev *, union avs_notify_msg *);59 bool (* const d0ix_toggle)(struct avs_dev *, struct avs_ipc_msg *, bool);60 int (* const set_d0ix)(struct avs_dev *, bool);61};62 63#define avs_dsp_op(adev, op, ...) \64 ((adev)->spec->dsp_ops->op(adev, ## __VA_ARGS__))65 66extern const struct avs_dsp_ops avs_skl_dsp_ops;67extern const struct avs_dsp_ops avs_apl_dsp_ops;68extern const struct avs_dsp_ops avs_cnl_dsp_ops;69extern const struct avs_dsp_ops avs_icl_dsp_ops;70extern const struct avs_dsp_ops avs_tgl_dsp_ops;71 72#define AVS_PLATATTR_CLDMA BIT_ULL(0)73#define AVS_PLATATTR_IMR BIT_ULL(1)74 75#define avs_platattr_test(adev, attr) \76 ((adev)->spec->attributes & AVS_PLATATTR_##attr)77 78struct avs_sram_spec {79 const u32 base_offset;80 const u32 window_size;81 const u32 rom_status_offset;82};83 84struct avs_hipc_spec {85 const u32 req_offset;86 const u32 req_ext_offset;87 const u32 req_busy_mask;88 const u32 ack_offset;89 const u32 ack_done_mask;90 const u32 rsp_offset;91 const u32 rsp_busy_mask;92 const u32 ctl_offset;93};94 95/* Platform specific descriptor */96struct avs_spec {97 const char *name;98 99 const struct avs_dsp_ops *const dsp_ops;100 struct avs_fw_version min_fw_version; /* anything below is rejected */101 102 const u32 core_init_mask; /* used during DSP boot */103 const u64 attributes; /* bitmask of AVS_PLATATTR_* */104 const struct avs_sram_spec *sram;105 const struct avs_hipc_spec *hipc;106};107 108struct avs_fw_entry {109 const char *name;110 const struct firmware *fw;111 112 struct list_head node;113};114 115/*116 * struct avs_dev - Intel HD-Audio driver data117 *118 * @dev: PCI device119 * @dsp_ba: DSP bar address120 * @spec: platform-specific descriptor121 * @fw_cfg: Firmware configuration, obtained through FW_CONFIG message122 * @hw_cfg: Hardware configuration, obtained through HW_CONFIG message123 * @mods_info: Available module-types, obtained through MODULES_INFO message124 * @mod_idas: Module instance ID pool, one per module-type125 * @modres_mutex: For synchronizing any @mods_info updates126 * @ppl_ida: Pipeline instance ID pool127 * @fw_list: List of libraries loaded, including base firmware128 */129struct avs_dev {130 struct hda_bus base;131 struct device *dev;132 133 void __iomem *dsp_ba;134 const struct avs_spec *spec;135 struct avs_ipc *ipc;136 137 struct avs_fw_cfg fw_cfg;138 struct avs_hw_cfg hw_cfg;139 struct avs_mods_info *mods_info;140 struct ida **mod_idas;141 struct mutex modres_mutex;142 void *modcfg_buf; /* module configuration buffer */143 struct ida ppl_ida;144 struct list_head fw_list;145 int *core_refs; /* reference count per core */146 char **lib_names;147 int num_lp_paths;148 atomic_t l1sen_counter; /* controls whether L1SEN should be disabled */149 150 struct completion fw_ready;151 struct work_struct probe_work;152 153 struct list_head comp_list;154 struct mutex comp_list_mutex;155 struct list_head path_list;156 spinlock_t path_list_lock;157 struct mutex path_mutex;158 159 spinlock_t trace_lock; /* serialize debug window I/O between each LOG_BUFFER_STATUS */160#ifdef CONFIG_DEBUG_FS161 struct kfifo trace_fifo;162 wait_queue_head_t trace_waitq;163 u32 aging_timer_period;164 u32 fifo_full_timer_period;165 u32 logged_resources; /* context dependent: core or library */166 struct dentry *debugfs_root;167 /* probes */168 struct hdac_ext_stream *extractor;169 unsigned int num_probe_streams;170#endif171};172 173/* from hda_bus to avs_dev */174#define hda_to_avs(hda) container_of(hda, struct avs_dev, base)175/* from hdac_bus to avs_dev */176#define hdac_to_avs(hdac) hda_to_avs(to_hda_bus(hdac))177/* from device to avs_dev */178#define to_avs_dev(dev) \179({ \180 struct hdac_bus *__bus = dev_get_drvdata(dev); \181 hdac_to_avs(__bus); \182})183 184int avs_dsp_core_power(struct avs_dev *adev, u32 core_mask, bool power);185int avs_dsp_core_reset(struct avs_dev *adev, u32 core_mask, bool reset);186int avs_dsp_core_stall(struct avs_dev *adev, u32 core_mask, bool stall);187int avs_dsp_core_enable(struct avs_dev *adev, u32 core_mask);188int avs_dsp_core_disable(struct avs_dev *adev, u32 core_mask);189 190/* Inter Process Communication */191 192struct avs_ipc_msg {193 union {194 u64 header;195 union avs_global_msg glb;196 union avs_reply_msg rsp;197 };198 void *data;199 size_t size;200};201 202/*203 * struct avs_ipc - DSP IPC context204 *205 * @dev: PCI device206 * @rx: Reply message cache207 * @default_timeout_ms: default message timeout in MS208 * @ready: whether firmware is ready and communication is open209 * @rx_completed: whether RX for previously sent TX has been received210 * @rx_lock: for serializing manipulation of rx_* fields211 * @msg_lock: for synchronizing request handling212 * @done_completion: DONE-part of IPC i.e. ROM and ACKs from FW213 * @busy_completion: BUSY-part of IPC i.e. receiving responses from FW214 */215struct avs_ipc {216 struct device *dev;217 218 struct avs_ipc_msg rx;219 u32 default_timeout_ms;220 bool ready;221 atomic_t recovering;222 223 bool rx_completed;224 spinlock_t rx_lock;225 struct mutex msg_mutex;226 struct completion done_completion;227 struct completion busy_completion;228 229 struct work_struct recovery_work;230 struct delayed_work d0ix_work;231 atomic_t d0ix_disable_depth;232 bool in_d0ix;233};234 235#define AVS_EIPC EREMOTEIO236/*237 * IPC handlers may return positive value (firmware error code) what denotes238 * successful HOST <-> DSP communication yet failure to process specific request.239 *240 * Below macro converts returned value to linux kernel error code.241 * All IPC callers MUST use it as soon as firmware error code is consumed.242 */243#define AVS_IPC_RET(ret) \244 (((ret) <= 0) ? (ret) : -AVS_EIPC)245 246void avs_dsp_process_response(struct avs_dev *adev, u64 header);247int avs_dsp_send_msg_timeout(struct avs_dev *adev, struct avs_ipc_msg *request,248 struct avs_ipc_msg *reply, int timeout, const char *name);249int avs_dsp_send_msg(struct avs_dev *adev, struct avs_ipc_msg *request,250 struct avs_ipc_msg *reply, const char *name);251/* Two variants below are for messages that control DSP power states. */252int avs_dsp_send_pm_msg_timeout(struct avs_dev *adev, struct avs_ipc_msg *request,253 struct avs_ipc_msg *reply, int timeout, bool wake_d0i0,254 const char *name);255int avs_dsp_send_pm_msg(struct avs_dev *adev, struct avs_ipc_msg *request,256 struct avs_ipc_msg *reply, bool wake_d0i0, const char *name);257int avs_dsp_send_rom_msg_timeout(struct avs_dev *adev, struct avs_ipc_msg *request, int timeout,258 const char *name);259int avs_dsp_send_rom_msg(struct avs_dev *adev, struct avs_ipc_msg *request, const char *name);260void avs_dsp_interrupt_control(struct avs_dev *adev, bool enable);261int avs_ipc_init(struct avs_ipc *ipc, struct device *dev);262void avs_ipc_block(struct avs_ipc *ipc);263 264int avs_dsp_disable_d0ix(struct avs_dev *adev);265int avs_dsp_enable_d0ix(struct avs_dev *adev);266 267void avs_skl_ipc_interrupt(struct avs_dev *adev);268irqreturn_t avs_cnl_dsp_interrupt(struct avs_dev *adev);269int avs_apl_enable_logs(struct avs_dev *adev, enum avs_log_enable enable, u32 aging_period,270 u32 fifo_full_period, unsigned long resource_mask, u32 *priorities);271int avs_icl_enable_logs(struct avs_dev *adev, enum avs_log_enable enable, u32 aging_period,272 u32 fifo_full_period, unsigned long resource_mask, u32 *priorities);273int avs_skl_log_buffer_offset(struct avs_dev *adev, u32 core);274int avs_icl_log_buffer_offset(struct avs_dev *adev, u32 core);275int avs_apl_log_buffer_status(struct avs_dev *adev, union avs_notify_msg *msg);276int avs_apl_coredump(struct avs_dev *adev, union avs_notify_msg *msg);277bool avs_apl_d0ix_toggle(struct avs_dev *adev, struct avs_ipc_msg *tx, bool wake);278bool avs_icl_d0ix_toggle(struct avs_dev *adev, struct avs_ipc_msg *tx, bool wake);279int avs_apl_set_d0ix(struct avs_dev *adev, bool enable);280int avs_icl_set_d0ix(struct avs_dev *adev, bool enable);281 282/* Firmware resources management */283 284int avs_get_module_entry(struct avs_dev *adev, const guid_t *uuid, struct avs_module_entry *entry);285int avs_get_module_id_entry(struct avs_dev *adev, u32 module_id, struct avs_module_entry *entry);286int avs_get_module_id(struct avs_dev *adev, const guid_t *uuid);287bool avs_is_module_ida_empty(struct avs_dev *adev, u32 module_id);288 289int avs_module_info_init(struct avs_dev *adev, bool purge);290void avs_module_info_free(struct avs_dev *adev);291int avs_module_id_alloc(struct avs_dev *adev, u16 module_id);292void avs_module_id_free(struct avs_dev *adev, u16 module_id, u8 instance_id);293int avs_request_firmware(struct avs_dev *adev, const struct firmware **fw_p, const char *name);294void avs_release_last_firmware(struct avs_dev *adev);295void avs_release_firmwares(struct avs_dev *adev);296 297int avs_dsp_init_module(struct avs_dev *adev, u16 module_id, u8 ppl_instance_id,298 u8 core_id, u8 domain, void *param, u32 param_size,299 u8 *instance_id);300void avs_dsp_delete_module(struct avs_dev *adev, u16 module_id, u8 instance_id,301 u8 ppl_instance_id, u8 core_id);302int avs_dsp_create_pipeline(struct avs_dev *adev, u16 req_size, u8 priority,303 bool lp, u16 attributes, u8 *instance_id);304int avs_dsp_delete_pipeline(struct avs_dev *adev, u8 instance_id);305 306/* Firmware loading */307 308void avs_hda_clock_gating_enable(struct avs_dev *adev, bool enable);309void avs_hda_power_gating_enable(struct avs_dev *adev, bool enable);310void avs_hda_l1sen_enable(struct avs_dev *adev, bool enable);311 312int avs_dsp_load_libraries(struct avs_dev *adev, struct avs_tplg_library *libs, u32 num_libs);313int avs_dsp_boot_firmware(struct avs_dev *adev, bool purge);314int avs_dsp_first_boot_firmware(struct avs_dev *adev);315 316int avs_cldma_load_basefw(struct avs_dev *adev, struct firmware *fw);317int avs_cldma_load_library(struct avs_dev *adev, struct firmware *lib, u32 id);318int avs_cldma_transfer_modules(struct avs_dev *adev, bool load,319 struct avs_module_entry *mods, u32 num_mods);320int avs_hda_load_basefw(struct avs_dev *adev, struct firmware *fw);321int avs_hda_load_library(struct avs_dev *adev, struct firmware *lib, u32 id);322int avs_hda_transfer_modules(struct avs_dev *adev, bool load,323 struct avs_module_entry *mods, u32 num_mods);324 325int avs_icl_load_basefw(struct avs_dev *adev, struct firmware *fw);326 327/* Soc component members */328 329struct avs_soc_component {330 struct snd_soc_component base;331 struct avs_tplg *tplg;332 333 struct list_head node;334};335 336#define to_avs_soc_component(comp) \337 container_of(comp, struct avs_soc_component, base)338 339extern const struct snd_soc_dai_ops avs_dai_fe_ops;340 341int avs_soc_component_register(struct device *dev, const char *name,342 const struct snd_soc_component_driver *drv,343 struct snd_soc_dai_driver *cpu_dais, int num_cpu_dais);344int avs_dmic_platform_register(struct avs_dev *adev, const char *name);345int avs_i2s_platform_register(struct avs_dev *adev, const char *name, unsigned long port_mask,346 unsigned long *tdms);347int avs_hda_platform_register(struct avs_dev *adev, const char *name);348 349int avs_register_all_boards(struct avs_dev *adev);350void avs_unregister_all_boards(struct avs_dev *adev);351 352/* Firmware tracing helpers */353 354#define avs_log_buffer_size(adev) \355 ((adev)->fw_cfg.trace_log_bytes / (adev)->hw_cfg.dsp_cores)356 357#define avs_log_buffer_addr(adev, core) \358({ \359 s32 __offset = avs_dsp_op(adev, log_buffer_offset, core); \360 (__offset < 0) ? NULL : \361 (avs_sram_addr(adev, AVS_DEBUG_WINDOW) + __offset); \362})363 364static inline int avs_log_buffer_status_locked(struct avs_dev *adev, union avs_notify_msg *msg)365{366 unsigned long flags;367 int ret;368 369 spin_lock_irqsave(&adev->trace_lock, flags);370 ret = avs_dsp_op(adev, log_buffer_status, msg);371 spin_unlock_irqrestore(&adev->trace_lock, flags);372 373 return ret;374}375 376struct avs_apl_log_buffer_layout {377 u32 read_ptr;378 u32 write_ptr;379 u8 buffer[];380} __packed;381static_assert(sizeof(struct avs_apl_log_buffer_layout) == 8);382 383#define avs_apl_log_payload_size(adev) \384 (avs_log_buffer_size(adev) - sizeof(struct avs_apl_log_buffer_layout))385 386#define avs_apl_log_payload_addr(addr) \387 (addr + sizeof(struct avs_apl_log_buffer_layout))388 389#ifdef CONFIG_DEBUG_FS390#define AVS_SET_ENABLE_LOGS_OP(name) \391 .enable_logs = avs_##name##_enable_logs392 393bool avs_logging_fw(struct avs_dev *adev);394void avs_dump_fw_log(struct avs_dev *adev, const void __iomem *src, unsigned int len);395void avs_dump_fw_log_wakeup(struct avs_dev *adev, const void __iomem *src, unsigned int len);396 397int avs_probe_platform_register(struct avs_dev *adev, const char *name);398 399void avs_debugfs_init(struct avs_dev *adev);400void avs_debugfs_exit(struct avs_dev *adev);401#else402#define AVS_SET_ENABLE_LOGS_OP(name)403 404static inline bool avs_logging_fw(struct avs_dev *adev)405{406 return false;407}408 409static inline void avs_dump_fw_log(struct avs_dev *adev, const void __iomem *src, unsigned int len)410{411}412 413static inline void414avs_dump_fw_log_wakeup(struct avs_dev *adev, const void __iomem *src, unsigned int len)415{416}417 418static inline int avs_probe_platform_register(struct avs_dev *adev, const char *name)419{420 return 0;421}422 423static inline void avs_debugfs_init(struct avs_dev *adev) { }424static inline void avs_debugfs_exit(struct avs_dev *adev) { }425#endif426 427/* Filesystems integration */428 429extern const struct attribute_group *avs_attr_groups[];430 431#endif /* __SOUND_SOC_INTEL_AVS_H */432