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1// SPDX-License-Identifier: GPL-2.02/*3 * mt2701-cs42448.c -- MT2701 CS42448 ALSA SoC machine driver4 *5 * Copyright (c) 2016 MediaTek Inc.6 * Author: Ir Lian <ir.lian@mediatek.com>7 * Garlic Tseng <garlic.tseng@mediatek.com>8 */9 10#include <linux/module.h>11#include <sound/soc.h>12#include <linux/delay.h>13#include <linux/gpio/consumer.h>14#include <linux/pinctrl/consumer.h>15 16#include "mt2701-afe-common.h"17 18struct mt2701_cs42448_private {19 int i2s1_in_mux;20 struct gpio_desc *i2s1_in_mux_sel_1;21 struct gpio_desc *i2s1_in_mux_sel_2;22};23 24static const char * const i2sin_mux_switch_text[] = {25 "ADC_SDOUT2",26 "ADC_SDOUT3",27 "I2S_IN_1",28 "I2S_IN_2",29};30 31static const struct soc_enum i2sin_mux_enum =32 SOC_ENUM_SINGLE_EXT(4, i2sin_mux_switch_text);33 34static int mt2701_cs42448_i2sin1_mux_get(struct snd_kcontrol *kcontrol,35 struct snd_ctl_elem_value *ucontrol)36{37 struct snd_soc_card *card = snd_kcontrol_chip(kcontrol);38 struct mt2701_cs42448_private *priv = snd_soc_card_get_drvdata(card);39 40 ucontrol->value.integer.value[0] = priv->i2s1_in_mux;41 return 0;42}43 44static int mt2701_cs42448_i2sin1_mux_set(struct snd_kcontrol *kcontrol,45 struct snd_ctl_elem_value *ucontrol)46{47 struct snd_soc_card *card = snd_kcontrol_chip(kcontrol);48 struct mt2701_cs42448_private *priv = snd_soc_card_get_drvdata(card);49 50 if (ucontrol->value.integer.value[0] == priv->i2s1_in_mux)51 return 0;52 53 switch (ucontrol->value.integer.value[0]) {54 case 0:55 gpiod_set_value(priv->i2s1_in_mux_sel_1, 0);56 gpiod_set_value(priv->i2s1_in_mux_sel_2, 0);57 break;58 case 1:59 gpiod_set_value(priv->i2s1_in_mux_sel_1, 1);60 gpiod_set_value(priv->i2s1_in_mux_sel_2, 0);61 break;62 case 2:63 gpiod_set_value(priv->i2s1_in_mux_sel_1, 0);64 gpiod_set_value(priv->i2s1_in_mux_sel_2, 1);65 break;66 case 3:67 gpiod_set_value(priv->i2s1_in_mux_sel_1, 1);68 gpiod_set_value(priv->i2s1_in_mux_sel_2, 1);69 break;70 default:71 dev_warn(card->dev, "%s invalid setting\n", __func__);72 }73 74 priv->i2s1_in_mux = ucontrol->value.integer.value[0];75 return 0;76}77 78static const struct snd_soc_dapm_widget79 mt2701_cs42448_asoc_card_dapm_widgets[] = {80 SND_SOC_DAPM_LINE("Line Out Jack", NULL),81 SND_SOC_DAPM_MIC("AMIC", NULL),82 SND_SOC_DAPM_LINE("Tuner In", NULL),83 SND_SOC_DAPM_LINE("Satellite Tuner In", NULL),84 SND_SOC_DAPM_LINE("AUX In", NULL),85};86 87static const struct snd_kcontrol_new mt2701_cs42448_controls[] = {88 SOC_DAPM_PIN_SWITCH("Line Out Jack"),89 SOC_DAPM_PIN_SWITCH("AMIC"),90 SOC_DAPM_PIN_SWITCH("Tuner In"),91 SOC_DAPM_PIN_SWITCH("Satellite Tuner In"),92 SOC_DAPM_PIN_SWITCH("AUX In"),93 SOC_ENUM_EXT("I2SIN1_MUX_Switch", i2sin_mux_enum,94 mt2701_cs42448_i2sin1_mux_get,95 mt2701_cs42448_i2sin1_mux_set),96};97 98static const unsigned int mt2701_cs42448_sampling_rates[] = {48000};99 100static const struct snd_pcm_hw_constraint_list mt2701_cs42448_constraints_rates = {101 .count = ARRAY_SIZE(mt2701_cs42448_sampling_rates),102 .list = mt2701_cs42448_sampling_rates,103 .mask = 0,104};105 106static int mt2701_cs42448_fe_ops_startup(struct snd_pcm_substream *substream)107{108 int err;109 110 err = snd_pcm_hw_constraint_list(substream->runtime, 0,111 SNDRV_PCM_HW_PARAM_RATE,112 &mt2701_cs42448_constraints_rates);113 if (err < 0) {114 dev_err(substream->pcm->card->dev,115 "%s snd_pcm_hw_constraint_list failed: 0x%x\n",116 __func__, err);117 return err;118 }119 return 0;120}121 122static const struct snd_soc_ops mt2701_cs42448_48k_fe_ops = {123 .startup = mt2701_cs42448_fe_ops_startup,124};125 126static int mt2701_cs42448_be_ops_hw_params(struct snd_pcm_substream *substream,127 struct snd_pcm_hw_params *params)128{129 struct snd_soc_pcm_runtime *rtd = snd_soc_substream_to_rtd(substream);130 struct snd_soc_dai *cpu_dai = snd_soc_rtd_to_cpu(rtd, 0);131 struct snd_soc_dai *codec_dai = snd_soc_rtd_to_codec(rtd, 0);132 unsigned int mclk_rate;133 unsigned int rate = params_rate(params);134 unsigned int div_mclk_over_bck = rate > 192000 ? 2 : 4;135 unsigned int div_bck_over_lrck = 64;136 137 mclk_rate = rate * div_bck_over_lrck * div_mclk_over_bck;138 139 /* mt2701 mclk */140 snd_soc_dai_set_sysclk(cpu_dai, 0, mclk_rate, SND_SOC_CLOCK_OUT);141 142 /* codec mclk */143 snd_soc_dai_set_sysclk(codec_dai, 0, mclk_rate, SND_SOC_CLOCK_IN);144 145 return 0;146}147 148static const struct snd_soc_ops mt2701_cs42448_be_ops = {149 .hw_params = mt2701_cs42448_be_ops_hw_params150};151 152enum {153 DAI_LINK_FE_MULTI_CH_OUT,154 DAI_LINK_FE_PCM0_IN,155 DAI_LINK_FE_PCM1_IN,156 DAI_LINK_FE_BT_OUT,157 DAI_LINK_FE_BT_IN,158 DAI_LINK_BE_I2S0,159 DAI_LINK_BE_I2S1,160 DAI_LINK_BE_I2S2,161 DAI_LINK_BE_I2S3,162 DAI_LINK_BE_MRG_BT,163};164 165SND_SOC_DAILINK_DEFS(fe_multi_ch_out,166 DAILINK_COMP_ARRAY(COMP_CPU("PCM_multi")),167 DAILINK_COMP_ARRAY(COMP_DUMMY()),168 DAILINK_COMP_ARRAY(COMP_EMPTY()));169 170SND_SOC_DAILINK_DEFS(fe_pcm0_in,171 DAILINK_COMP_ARRAY(COMP_CPU("PCM0")),172 DAILINK_COMP_ARRAY(COMP_DUMMY()),173 DAILINK_COMP_ARRAY(COMP_EMPTY()));174 175SND_SOC_DAILINK_DEFS(fe_pcm1_in,176 DAILINK_COMP_ARRAY(COMP_CPU("PCM1")),177 DAILINK_COMP_ARRAY(COMP_DUMMY()),178 DAILINK_COMP_ARRAY(COMP_EMPTY()));179 180SND_SOC_DAILINK_DEFS(fe_bt_out,181 DAILINK_COMP_ARRAY(COMP_CPU("PCM_BT_DL")),182 DAILINK_COMP_ARRAY(COMP_DUMMY()),183 DAILINK_COMP_ARRAY(COMP_EMPTY()));184 185SND_SOC_DAILINK_DEFS(fe_bt_in,186 DAILINK_COMP_ARRAY(COMP_CPU("PCM_BT_UL")),187 DAILINK_COMP_ARRAY(COMP_DUMMY()),188 DAILINK_COMP_ARRAY(COMP_EMPTY()));189 190SND_SOC_DAILINK_DEFS(be_i2s0,191 DAILINK_COMP_ARRAY(COMP_CPU("I2S0")),192 DAILINK_COMP_ARRAY(COMP_CODEC(NULL, "cs42448")),193 DAILINK_COMP_ARRAY(COMP_EMPTY()));194 195SND_SOC_DAILINK_DEFS(be_i2s1,196 DAILINK_COMP_ARRAY(COMP_CPU("I2S1")),197 DAILINK_COMP_ARRAY(COMP_CODEC(NULL, "cs42448")),198 DAILINK_COMP_ARRAY(COMP_EMPTY()));199 200SND_SOC_DAILINK_DEFS(be_i2s2,201 DAILINK_COMP_ARRAY(COMP_CPU("I2S2")),202 DAILINK_COMP_ARRAY(COMP_CODEC(NULL, "cs42448")),203 DAILINK_COMP_ARRAY(COMP_EMPTY()));204 205SND_SOC_DAILINK_DEFS(be_i2s3,206 DAILINK_COMP_ARRAY(COMP_CPU("I2S3")),207 DAILINK_COMP_ARRAY(COMP_CODEC(NULL, "cs42448")),208 DAILINK_COMP_ARRAY(COMP_EMPTY()));209 210SND_SOC_DAILINK_DEFS(be_mrg_bt,211 DAILINK_COMP_ARRAY(COMP_CPU("MRG BT")),212 DAILINK_COMP_ARRAY(COMP_CODEC(NULL, "bt-sco-pcm-wb")),213 DAILINK_COMP_ARRAY(COMP_EMPTY()));214 215static struct snd_soc_dai_link mt2701_cs42448_dai_links[] = {216 /* FE */217 [DAI_LINK_FE_MULTI_CH_OUT] = {218 .name = "mt2701-cs42448-multi-ch-out",219 .stream_name = "mt2701-cs42448-multi-ch-out",220 .trigger = {SND_SOC_DPCM_TRIGGER_POST,221 SND_SOC_DPCM_TRIGGER_POST},222 .ops = &mt2701_cs42448_48k_fe_ops,223 .dynamic = 1,224 .dpcm_playback = 1,225 SND_SOC_DAILINK_REG(fe_multi_ch_out),226 },227 [DAI_LINK_FE_PCM0_IN] = {228 .name = "mt2701-cs42448-pcm0",229 .stream_name = "mt2701-cs42448-pcm0-data-UL",230 .trigger = {SND_SOC_DPCM_TRIGGER_POST,231 SND_SOC_DPCM_TRIGGER_POST},232 .ops = &mt2701_cs42448_48k_fe_ops,233 .dynamic = 1,234 .dpcm_capture = 1,235 SND_SOC_DAILINK_REG(fe_pcm0_in),236 },237 [DAI_LINK_FE_PCM1_IN] = {238 .name = "mt2701-cs42448-pcm1-data-UL",239 .stream_name = "mt2701-cs42448-pcm1-data-UL",240 .trigger = {SND_SOC_DPCM_TRIGGER_POST,241 SND_SOC_DPCM_TRIGGER_POST},242 .ops = &mt2701_cs42448_48k_fe_ops,243 .dynamic = 1,244 .dpcm_capture = 1,245 SND_SOC_DAILINK_REG(fe_pcm1_in),246 },247 [DAI_LINK_FE_BT_OUT] = {248 .name = "mt2701-cs42448-pcm-BT-out",249 .stream_name = "mt2701-cs42448-pcm-BT",250 .trigger = {SND_SOC_DPCM_TRIGGER_POST,251 SND_SOC_DPCM_TRIGGER_POST},252 .dynamic = 1,253 .dpcm_playback = 1,254 SND_SOC_DAILINK_REG(fe_bt_out),255 },256 [DAI_LINK_FE_BT_IN] = {257 .name = "mt2701-cs42448-pcm-BT-in",258 .stream_name = "mt2701-cs42448-pcm-BT",259 .trigger = {SND_SOC_DPCM_TRIGGER_POST,260 SND_SOC_DPCM_TRIGGER_POST},261 .dynamic = 1,262 .dpcm_capture = 1,263 SND_SOC_DAILINK_REG(fe_bt_in),264 },265 /* BE */266 [DAI_LINK_BE_I2S0] = {267 .name = "mt2701-cs42448-I2S0",268 .no_pcm = 1,269 .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_CBS_CFS270 | SND_SOC_DAIFMT_GATED,271 .ops = &mt2701_cs42448_be_ops,272 .dpcm_playback = 1,273 .dpcm_capture = 1,274 SND_SOC_DAILINK_REG(be_i2s0),275 },276 [DAI_LINK_BE_I2S1] = {277 .name = "mt2701-cs42448-I2S1",278 .no_pcm = 1,279 .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_CBS_CFS280 | SND_SOC_DAIFMT_GATED,281 .ops = &mt2701_cs42448_be_ops,282 .dpcm_playback = 1,283 .dpcm_capture = 1,284 SND_SOC_DAILINK_REG(be_i2s1),285 },286 [DAI_LINK_BE_I2S2] = {287 .name = "mt2701-cs42448-I2S2",288 .no_pcm = 1,289 .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_CBS_CFS290 | SND_SOC_DAIFMT_GATED,291 .ops = &mt2701_cs42448_be_ops,292 .dpcm_playback = 1,293 .dpcm_capture = 1,294 SND_SOC_DAILINK_REG(be_i2s2),295 },296 [DAI_LINK_BE_I2S3] = {297 .name = "mt2701-cs42448-I2S3",298 .no_pcm = 1,299 .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_CBS_CFS300 | SND_SOC_DAIFMT_GATED,301 .ops = &mt2701_cs42448_be_ops,302 .dpcm_playback = 1,303 .dpcm_capture = 1,304 SND_SOC_DAILINK_REG(be_i2s3),305 },306 [DAI_LINK_BE_MRG_BT] = {307 .name = "mt2701-cs42448-MRG-BT",308 .no_pcm = 1,309 .dpcm_playback = 1,310 .dpcm_capture = 1,311 SND_SOC_DAILINK_REG(be_mrg_bt),312 },313};314 315static struct snd_soc_card mt2701_cs42448_soc_card = {316 .name = "mt2701-cs42448",317 .owner = THIS_MODULE,318 .dai_link = mt2701_cs42448_dai_links,319 .num_links = ARRAY_SIZE(mt2701_cs42448_dai_links),320 .controls = mt2701_cs42448_controls,321 .num_controls = ARRAY_SIZE(mt2701_cs42448_controls),322 .dapm_widgets = mt2701_cs42448_asoc_card_dapm_widgets,323 .num_dapm_widgets = ARRAY_SIZE(mt2701_cs42448_asoc_card_dapm_widgets),324};325 326static int mt2701_cs42448_machine_probe(struct platform_device *pdev)327{328 struct snd_soc_card *card = &mt2701_cs42448_soc_card;329 int ret;330 int i;331 struct device_node *platform_node, *codec_node, *codec_node_bt_mrg;332 struct device *dev = &pdev->dev;333 struct mt2701_cs42448_private *priv =334 devm_kzalloc(dev, sizeof(struct mt2701_cs42448_private),335 GFP_KERNEL);336 struct snd_soc_dai_link *dai_link;337 338 if (!priv)339 return -ENOMEM;340 341 platform_node = of_parse_phandle(pdev->dev.of_node,342 "mediatek,platform", 0);343 if (!platform_node) {344 dev_err(dev, "Property 'platform' missing or invalid\n");345 return -EINVAL;346 }347 for_each_card_prelinks(card, i, dai_link) {348 if (dai_link->platforms->name)349 continue;350 dai_link->platforms->of_node = platform_node;351 }352 353 card->dev = dev;354 355 codec_node = of_parse_phandle(pdev->dev.of_node,356 "mediatek,audio-codec", 0);357 if (!codec_node) {358 dev_err(dev,359 "Property 'audio-codec' missing or invalid\n");360 return -EINVAL;361 }362 for_each_card_prelinks(card, i, dai_link) {363 if (dai_link->codecs->name)364 continue;365 dai_link->codecs->of_node = codec_node;366 }367 368 codec_node_bt_mrg = of_parse_phandle(pdev->dev.of_node,369 "mediatek,audio-codec-bt-mrg", 0);370 if (!codec_node_bt_mrg) {371 dev_err(dev,372 "Property 'audio-codec-bt-mrg' missing or invalid\n");373 return -EINVAL;374 }375 mt2701_cs42448_dai_links[DAI_LINK_BE_MRG_BT].codecs->of_node376 = codec_node_bt_mrg;377 378 ret = snd_soc_of_parse_audio_routing(card, "audio-routing");379 if (ret) {380 dev_err(dev, "failed to parse audio-routing: %d\n", ret);381 return ret;382 }383 384 priv->i2s1_in_mux_sel_1 = devm_gpiod_get_optional(dev, "i2s1-in-sel-gpio1",385 GPIOD_OUT_LOW);386 if (IS_ERR(priv->i2s1_in_mux_sel_1))387 return dev_err_probe(dev, PTR_ERR(priv->i2s1_in_mux_sel_1),388 "error getting mux 1 selector\n");389 390 priv->i2s1_in_mux_sel_2 = devm_gpiod_get_optional(dev, "i2s1-in-sel-gpio2",391 GPIOD_OUT_LOW);392 if (IS_ERR(priv->i2s1_in_mux_sel_2))393 return dev_err_probe(dev, PTR_ERR(priv->i2s1_in_mux_sel_2),394 "error getting mux 2 selector\n");395 396 snd_soc_card_set_drvdata(card, priv);397 398 ret = devm_snd_soc_register_card(dev, card);399 400 if (ret)401 dev_err(dev, "%s snd_soc_register_card fail %d\n",402 __func__, ret);403 return ret;404}405 406#ifdef CONFIG_OF407static const struct of_device_id mt2701_cs42448_machine_dt_match[] = {408 {.compatible = "mediatek,mt2701-cs42448-machine",},409 {}410};411MODULE_DEVICE_TABLE(of, mt2701_cs42448_machine_dt_match);412#endif413 414static struct platform_driver mt2701_cs42448_machine = {415 .driver = {416 .name = "mt2701-cs42448",417 #ifdef CONFIG_OF418 .of_match_table = mt2701_cs42448_machine_dt_match,419 #endif420 },421 .probe = mt2701_cs42448_machine_probe,422};423 424module_platform_driver(mt2701_cs42448_machine);425 426/* Module information */427MODULE_DESCRIPTION("MT2701 CS42448 ALSA SoC machine driver");428MODULE_AUTHOR("Ir Lian <ir.lian@mediatek.com>");429MODULE_LICENSE("GPL v2");430MODULE_ALIAS("mt2701 cs42448 soc card");431