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1/* SPDX-License-Identifier: GPL-2.02 *3 * mt8186-afe-common.h  --  Mediatek 8186 audio driver definitions4 *5 * Copyright (c) 2022 MediaTek Inc.6 * Author: Jiaxin Yu <jiaxin.yu@mediatek.com>7 */8 9#ifndef _MT_8186_AFE_COMMON_H_10#define _MT_8186_AFE_COMMON_H_11#include <sound/soc.h>12#include <linux/list.h>13#include <linux/regmap.h>14#include "mt8186-reg.h"15#include "../common/mtk-base-afe.h"16 17enum {18	MT8186_MEMIF_DL1,19	MT8186_MEMIF_DL12,20	MT8186_MEMIF_DL2,21	MT8186_MEMIF_DL3,22	MT8186_MEMIF_DL4,23	MT8186_MEMIF_DL5,24	MT8186_MEMIF_DL6,25	MT8186_MEMIF_DL7,26	MT8186_MEMIF_DL8,27	MT8186_MEMIF_VUL12,28	MT8186_MEMIF_VUL2,29	MT8186_MEMIF_VUL3,30	MT8186_MEMIF_VUL4,31	MT8186_MEMIF_VUL5,32	MT8186_MEMIF_VUL6,33	MT8186_MEMIF_AWB,34	MT8186_MEMIF_AWB2,35	MT8186_MEMIF_NUM,36	MT8186_DAI_ADDA = MT8186_MEMIF_NUM,37	MT8186_DAI_AP_DMIC,38	MT8186_DAI_CONNSYS_I2S,39	MT8186_DAI_I2S_0,40	MT8186_DAI_I2S_1,41	MT8186_DAI_I2S_2,42	MT8186_DAI_I2S_3,43	MT8186_DAI_HW_GAIN_1,44	MT8186_DAI_HW_GAIN_2,45	MT8186_DAI_SRC_1,46	MT8186_DAI_SRC_2,47	MT8186_DAI_PCM,48	MT8186_DAI_TDM_IN,49	MT8186_DAI_HOSTLESS_LPBK,50	MT8186_DAI_HOSTLESS_FM,51	MT8186_DAI_HOSTLESS_HW_GAIN_AAUDIO,52	MT8186_DAI_HOSTLESS_SRC_AAUDIO,53	MT8186_DAI_HOSTLESS_SRC_1,54	MT8186_DAI_HOSTLESS_SRC_BARGEIN,55	MT8186_DAI_HOSTLESS_UL1,56	MT8186_DAI_HOSTLESS_UL2,57	MT8186_DAI_HOSTLESS_UL3,58	MT8186_DAI_HOSTLESS_UL5,59	MT8186_DAI_HOSTLESS_UL6,60	MT8186_DAI_NUM,61};62 63#define MT8186_RECORD_MEMIF MT8186_MEMIF_VUL1264#define MT8186_ECHO_REF_MEMIF MT8186_MEMIF_AWB65#define MT8186_PRIMARY_MEMIF MT8186_MEMIF_DL166#define MT8186_FAST_MEMIF MT8186_MEMIF_DL267#define MT8186_DEEP_MEMIF MT8186_MEMIF_DL368#define MT8186_VOIP_MEMIF MT8186_MEMIF_DL1269#define MT8186_MMAP_DL_MEMIF MT8186_MEMIF_DL570#define MT8186_MMAP_UL_MEMIF MT8186_MEMIF_VUL571#define MT8186_BARGEIN_MEMIF MT8186_MEMIF_AWB72 73enum {74	MT8186_IRQ_0,75	MT8186_IRQ_1,76	MT8186_IRQ_2,77	MT8186_IRQ_3,78	MT8186_IRQ_4,79	MT8186_IRQ_5,80	MT8186_IRQ_6,81	MT8186_IRQ_7,82	MT8186_IRQ_8,83	MT8186_IRQ_9,84	MT8186_IRQ_10,85	MT8186_IRQ_11,86	MT8186_IRQ_12,87	MT8186_IRQ_13,88	MT8186_IRQ_14,89	MT8186_IRQ_15,90	MT8186_IRQ_16,91	MT8186_IRQ_17,92	MT8186_IRQ_18,93	MT8186_IRQ_19,94	MT8186_IRQ_20,95	MT8186_IRQ_21,96	MT8186_IRQ_22,97	MT8186_IRQ_23,98	MT8186_IRQ_24,99	MT8186_IRQ_25,100	MT8186_IRQ_26,101	MT8186_IRQ_NUM,102};103 104enum {105	MT8186_AFE_IRQ_DIR_MCU = 0,106	MT8186_AFE_IRQ_DIR_DSP,107	MT8186_AFE_IRQ_DIR_BOTH,108};109 110enum {111	MTKAIF_PROTOCOL_1 = 0,112	MTKAIF_PROTOCOL_2,113	MTKAIF_PROTOCOL_2_CLK_P2,114};115 116enum {117	MTK_AFE_ADDA_DL_GAIN_MUTE = 0,118	MTK_AFE_ADDA_DL_GAIN_NORMAL = 0xf74f,119	/* SA suggest apply -0.3db to audio/speech path */120};121 122#define MTK_SPK_I2S_0_STR "MTK_SPK_I2S_0"123#define MTK_SPK_I2S_1_STR "MTK_SPK_I2S_1"124#define MTK_SPK_I2S_2_STR "MTK_SPK_I2S_2"125#define MTK_SPK_I2S_3_STR "MTK_SPK_I2S_3"126 127/* MCLK */128enum {129	MT8186_I2S0_MCK = 0,130	MT8186_I2S1_MCK,131	MT8186_I2S2_MCK,132	MT8186_I2S4_MCK,133	MT8186_TDM_MCK,134	MT8186_MCK_NUM,135};136 137struct snd_pcm_substream;138struct mtk_base_irq_data;139struct clk;140 141struct mt8186_afe_private {142	struct clk **clk;143	struct clk_lookup **lookup;144	struct regmap *topckgen;145	struct regmap *apmixedsys;146	struct regmap *infracfg;147	int irq_cnt[MT8186_MEMIF_NUM];148	int stf_positive_gain_db;149	int pm_runtime_bypass_reg_ctl;150	int sgen_mode;151	int sgen_rate;152	int sgen_amplitude;153 154	/* xrun assert */155	int xrun_assert[MT8186_MEMIF_NUM];156 157	/* dai */158	bool dai_on[MT8186_DAI_NUM];159	void *dai_priv[MT8186_DAI_NUM];160 161	/* adda */162	bool mtkaif_calibration_ok;163	int mtkaif_protocol;164	int mtkaif_chosen_phase[4];165	int mtkaif_phase_cycle[4];166	int mtkaif_calibration_num_phase;167	int mtkaif_dmic;168	int mtkaif_looback0;169	int mtkaif_looback1;170 171	/* mck */172	int mck_rate[MT8186_MCK_NUM];173};174 175int mt8186_dai_adda_register(struct mtk_base_afe *afe);176int mt8186_dai_i2s_register(struct mtk_base_afe *afe);177int mt8186_dai_tdm_register(struct mtk_base_afe *afe);178int mt8186_dai_hw_gain_register(struct mtk_base_afe *afe);179int mt8186_dai_src_register(struct mtk_base_afe *afe);180int mt8186_dai_pcm_register(struct mtk_base_afe *afe);181int mt8186_dai_hostless_register(struct mtk_base_afe *afe);182 183int mt8186_add_misc_control(struct snd_soc_component *component);184 185unsigned int mt8186_general_rate_transform(struct device *dev,186					   unsigned int rate);187unsigned int mt8186_rate_transform(struct device *dev,188				   unsigned int rate, int aud_blk);189unsigned int mt8186_tdm_relatch_rate_transform(struct device *dev,190					       unsigned int rate);191 192int mt8186_dai_i2s_set_share(struct mtk_base_afe *afe, const char *main_i2s_name,193			     const char *secondary_i2s_name);194 195int mt8186_dai_set_priv(struct mtk_base_afe *afe, int id,196			int priv_size, const void *priv_data);197 198#endif199