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1/* SPDX-License-Identifier: (GPL-2.0 OR MIT) */2/*3 * Copyright (c) 2018 BayLibre, SAS.4 * Author: Jerome Brunet <jbrunet@baylibre.com>5 */6 7#ifndef _MESON_AIU_H8#define _MESON_AIU_H9 10struct clk;11struct clk_bulk_data;12struct device;13struct of_phandle_args;14struct snd_soc_dai;15struct snd_soc_dai_ops;16 17enum aiu_clk_ids {18	PCLK = 0,19	AOCLK,20	MCLK,21	MIXER22};23 24struct aiu_interface {25	struct clk_bulk_data *clks;26	unsigned int clk_num;27	int irq;28};29 30struct aiu_platform_data {31	bool has_acodec;32	bool has_clk_ctrl_more_i2s_div;33};34 35struct aiu {36	struct clk *spdif_mclk;37	struct aiu_interface i2s;38	struct aiu_interface spdif;39	const struct aiu_platform_data *platform;40};41 42#define AIU_FORMATS (SNDRV_PCM_FMTBIT_S16_LE |	\43		     SNDRV_PCM_FMTBIT_S20_LE |	\44		     SNDRV_PCM_FMTBIT_S24_LE)45 46int aiu_of_xlate_dai_name(struct snd_soc_component *component,47			  const struct of_phandle_args *args,48			  const char **dai_name,49			  unsigned int component_id);50 51int aiu_hdmi_ctrl_register_component(struct device *dev);52int aiu_acodec_ctrl_register_component(struct device *dev);53 54int aiu_fifo_i2s_dai_probe(struct snd_soc_dai *dai);55int aiu_fifo_spdif_dai_probe(struct snd_soc_dai *dai);56 57extern const struct snd_soc_dai_ops aiu_fifo_i2s_dai_ops;58extern const struct snd_soc_dai_ops aiu_fifo_spdif_dai_ops;59extern const struct snd_soc_dai_ops aiu_encoder_i2s_dai_ops;60extern const struct snd_soc_dai_ops aiu_encoder_spdif_dai_ops;61 62#define AIU_IEC958_BPF			0x00063#define AIU_958_MISC			0x01064#define AIU_IEC958_DCU_FF_CTRL		0x01c65#define AIU_958_CHSTAT_L0		0x02066#define AIU_958_CHSTAT_L1		0x02467#define AIU_958_CTRL			0x02868#define AIU_I2S_SOURCE_DESC		0x03469#define AIU_I2S_DAC_CFG			0x04070#define AIU_I2S_SYNC			0x04471#define AIU_I2S_MISC			0x04872#define AIU_RST_SOFT			0x05473#define AIU_CLK_CTRL			0x05874#define AIU_CLK_CTRL_MORE		0x06475#define AIU_CODEC_DAC_LRCLK_CTRL	0x0a076#define AIU_HDMI_CLK_DATA_CTRL		0x0a877#define AIU_ACODEC_CTRL			0x0b078#define AIU_958_CHSTAT_R0		0x0c079#define AIU_958_CHSTAT_R1		0x0c480#define AIU_MEM_I2S_START		0x18081#define AIU_MEM_I2S_MASKS		0x18c82#define AIU_MEM_I2S_CONTROL		0x19083#define AIU_MEM_IEC958_START		0x19484#define AIU_MEM_IEC958_CONTROL		0x1a485#define AIU_MEM_I2S_BUF_CNTL		0x1d886#define AIU_MEM_IEC958_BUF_CNTL		0x1fc87 88#endif /* _MESON_AIU_H */89