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1/* SPDX-License-Identifier: GPL-2.0-only */2/*3 * tegra210_admaif.h - Tegra ADMAIF registers4 *5 * Copyright (c) 2020 NVIDIA CORPORATION. All rights reserved.6 *7 */8 9#ifndef __TEGRA_ADMAIF_H__10#define __TEGRA_ADMAIF_H__11 12#define TEGRA_ADMAIF_CHANNEL_REG_STRIDE 0x4013/* Tegra210 specific */14#define TEGRA210_ADMAIF_LAST_REG 0x75f15#define TEGRA210_ADMAIF_CHANNEL_COUNT 1016#define TEGRA210_ADMAIF_RX_BASE 0x017#define TEGRA210_ADMAIF_TX_BASE 0x30018#define TEGRA210_ADMAIF_GLOBAL_BASE 0x70019/* Tegra186 specific */20#define TEGRA186_ADMAIF_LAST_REG 0xd5f21#define TEGRA186_ADMAIF_CHANNEL_COUNT 2022#define TEGRA186_ADMAIF_RX_BASE 0x023#define TEGRA186_ADMAIF_TX_BASE 0x50024#define TEGRA186_ADMAIF_GLOBAL_BASE 0xd0025/* Global registers */26#define TEGRA_ADMAIF_GLOBAL_ENABLE 0x027#define TEGRA_ADMAIF_GLOBAL_CG_0 0x828#define TEGRA_ADMAIF_GLOBAL_STATUS 0x1029#define TEGRA_ADMAIF_GLOBAL_RX_ENABLE_STATUS 0x2030#define TEGRA_ADMAIF_GLOBAL_TX_ENABLE_STATUS 0x2431/* RX channel registers */32#define TEGRA_ADMAIF_RX_ENABLE 0x033#define TEGRA_ADMAIF_RX_SOFT_RESET 0x434#define TEGRA_ADMAIF_RX_STATUS 0xc35#define TEGRA_ADMAIF_RX_INT_STATUS 0x1036#define TEGRA_ADMAIF_RX_INT_MASK 0x1437#define TEGRA_ADMAIF_RX_INT_SET 0x1838#define TEGRA_ADMAIF_RX_INT_CLEAR 0x1c39#define TEGRA_ADMAIF_CH_ACIF_RX_CTRL 0x2040#define TEGRA_ADMAIF_RX_FIFO_CTRL 0x2841#define TEGRA_ADMAIF_RX_FIFO_READ 0x2c42/* TX channel registers */43#define TEGRA_ADMAIF_TX_ENABLE 0x044#define TEGRA_ADMAIF_TX_SOFT_RESET 0x445#define TEGRA_ADMAIF_TX_STATUS 0xc46#define TEGRA_ADMAIF_TX_INT_STATUS 0x1047#define TEGRA_ADMAIF_TX_INT_MASK 0x1448#define TEGRA_ADMAIF_TX_INT_SET 0x1849#define TEGRA_ADMAIF_TX_INT_CLEAR 0x1c50#define TEGRA_ADMAIF_CH_ACIF_TX_CTRL 0x2051#define TEGRA_ADMAIF_TX_FIFO_CTRL 0x2852#define TEGRA_ADMAIF_TX_FIFO_WRITE 0x2c53/* Bit fields */54#define PACK8_EN_SHIFT 3155#define PACK8_EN_MASK BIT(PACK8_EN_SHIFT)56#define PACK8_EN BIT(PACK8_EN_SHIFT)57#define PACK16_EN_SHIFT 3058#define PACK16_EN_MASK BIT(PACK16_EN_SHIFT)59#define PACK16_EN BIT(PACK16_EN_SHIFT)60#define TX_ENABLE_SHIFT 061#define TX_ENABLE_MASK BIT(TX_ENABLE_SHIFT)62#define TX_ENABLE BIT(TX_ENABLE_SHIFT)63#define RX_ENABLE_SHIFT 064#define RX_ENABLE_MASK BIT(RX_ENABLE_SHIFT)65#define RX_ENABLE BIT(RX_ENABLE_SHIFT)66#define SW_RESET_MASK 167#define SW_RESET 168/* Default values - Tegra210 */69#define TEGRA210_ADMAIF_RX1_FIFO_CTRL_REG_DEFAULT 0x0000030070#define TEGRA210_ADMAIF_RX2_FIFO_CTRL_REG_DEFAULT 0x0000030471#define TEGRA210_ADMAIF_RX3_FIFO_CTRL_REG_DEFAULT 0x0000020872#define TEGRA210_ADMAIF_RX4_FIFO_CTRL_REG_DEFAULT 0x0000020b73#define TEGRA210_ADMAIF_RX5_FIFO_CTRL_REG_DEFAULT 0x0000020e74#define TEGRA210_ADMAIF_RX6_FIFO_CTRL_REG_DEFAULT 0x0000021175#define TEGRA210_ADMAIF_RX7_FIFO_CTRL_REG_DEFAULT 0x0000021476#define TEGRA210_ADMAIF_RX8_FIFO_CTRL_REG_DEFAULT 0x0000021777#define TEGRA210_ADMAIF_RX9_FIFO_CTRL_REG_DEFAULT 0x0000021a78#define TEGRA210_ADMAIF_RX10_FIFO_CTRL_REG_DEFAULT 0x0000021d79#define TEGRA210_ADMAIF_TX1_FIFO_CTRL_REG_DEFAULT 0x0200030080#define TEGRA210_ADMAIF_TX2_FIFO_CTRL_REG_DEFAULT 0x0200030481#define TEGRA210_ADMAIF_TX3_FIFO_CTRL_REG_DEFAULT 0x0180020882#define TEGRA210_ADMAIF_TX4_FIFO_CTRL_REG_DEFAULT 0x0180020b83#define TEGRA210_ADMAIF_TX5_FIFO_CTRL_REG_DEFAULT 0x0180020e84#define TEGRA210_ADMAIF_TX6_FIFO_CTRL_REG_DEFAULT 0x0180021185#define TEGRA210_ADMAIF_TX7_FIFO_CTRL_REG_DEFAULT 0x0180021486#define TEGRA210_ADMAIF_TX8_FIFO_CTRL_REG_DEFAULT 0x0180021787#define TEGRA210_ADMAIF_TX9_FIFO_CTRL_REG_DEFAULT 0x0180021a88#define TEGRA210_ADMAIF_TX10_FIFO_CTRL_REG_DEFAULT 0x0180021d89/* Default values - Tegra186 */90#define TEGRA186_ADMAIF_RX1_FIFO_CTRL_REG_DEFAULT 0x0000030091#define TEGRA186_ADMAIF_RX2_FIFO_CTRL_REG_DEFAULT 0x0000030492#define TEGRA186_ADMAIF_RX3_FIFO_CTRL_REG_DEFAULT 0x0000030893#define TEGRA186_ADMAIF_RX4_FIFO_CTRL_REG_DEFAULT 0x0000030c94#define TEGRA186_ADMAIF_RX5_FIFO_CTRL_REG_DEFAULT 0x0000021095#define TEGRA186_ADMAIF_RX6_FIFO_CTRL_REG_DEFAULT 0x0000021396#define TEGRA186_ADMAIF_RX7_FIFO_CTRL_REG_DEFAULT 0x0000021697#define TEGRA186_ADMAIF_RX8_FIFO_CTRL_REG_DEFAULT 0x0000021998#define TEGRA186_ADMAIF_RX9_FIFO_CTRL_REG_DEFAULT 0x0000021c99#define TEGRA186_ADMAIF_RX10_FIFO_CTRL_REG_DEFAULT 0x0000021f100#define TEGRA186_ADMAIF_RX11_FIFO_CTRL_REG_DEFAULT 0x00000222101#define TEGRA186_ADMAIF_RX12_FIFO_CTRL_REG_DEFAULT 0x00000225102#define TEGRA186_ADMAIF_RX13_FIFO_CTRL_REG_DEFAULT 0x00000228103#define TEGRA186_ADMAIF_RX14_FIFO_CTRL_REG_DEFAULT 0x0000022b104#define TEGRA186_ADMAIF_RX15_FIFO_CTRL_REG_DEFAULT 0x0000022e105#define TEGRA186_ADMAIF_RX16_FIFO_CTRL_REG_DEFAULT 0x00000231106#define TEGRA186_ADMAIF_RX17_FIFO_CTRL_REG_DEFAULT 0x00000234107#define TEGRA186_ADMAIF_RX18_FIFO_CTRL_REG_DEFAULT 0x00000237108#define TEGRA186_ADMAIF_RX19_FIFO_CTRL_REG_DEFAULT 0x0000023a109#define TEGRA186_ADMAIF_RX20_FIFO_CTRL_REG_DEFAULT 0x0000023d110#define TEGRA186_ADMAIF_TX1_FIFO_CTRL_REG_DEFAULT 0x02000300111#define TEGRA186_ADMAIF_TX2_FIFO_CTRL_REG_DEFAULT 0x02000304112#define TEGRA186_ADMAIF_TX3_FIFO_CTRL_REG_DEFAULT 0x02000308113#define TEGRA186_ADMAIF_TX4_FIFO_CTRL_REG_DEFAULT 0x0200030c114#define TEGRA186_ADMAIF_TX5_FIFO_CTRL_REG_DEFAULT 0x01800210115#define TEGRA186_ADMAIF_TX6_FIFO_CTRL_REG_DEFAULT 0x01800213116#define TEGRA186_ADMAIF_TX7_FIFO_CTRL_REG_DEFAULT 0x01800216117#define TEGRA186_ADMAIF_TX8_FIFO_CTRL_REG_DEFAULT 0x01800219118#define TEGRA186_ADMAIF_TX9_FIFO_CTRL_REG_DEFAULT 0x0180021c119#define TEGRA186_ADMAIF_TX10_FIFO_CTRL_REG_DEFAULT 0x0180021f120#define TEGRA186_ADMAIF_TX11_FIFO_CTRL_REG_DEFAULT 0x01800222121#define TEGRA186_ADMAIF_TX12_FIFO_CTRL_REG_DEFAULT 0x01800225122#define TEGRA186_ADMAIF_TX13_FIFO_CTRL_REG_DEFAULT 0x01800228123#define TEGRA186_ADMAIF_TX14_FIFO_CTRL_REG_DEFAULT 0x0180022b124#define TEGRA186_ADMAIF_TX15_FIFO_CTRL_REG_DEFAULT 0x0180022e125#define TEGRA186_ADMAIF_TX16_FIFO_CTRL_REG_DEFAULT 0x01800231126#define TEGRA186_ADMAIF_TX17_FIFO_CTRL_REG_DEFAULT 0x01800234127#define TEGRA186_ADMAIF_TX18_FIFO_CTRL_REG_DEFAULT 0x01800237128#define TEGRA186_ADMAIF_TX19_FIFO_CTRL_REG_DEFAULT 0x0180023a129#define TEGRA186_ADMAIF_TX20_FIFO_CTRL_REG_DEFAULT 0x0180023d130 131enum {132 DATA_8BIT,133 DATA_16BIT,134 DATA_32BIT135};136 137enum {138 ADMAIF_RX_PATH,139 ADMAIF_TX_PATH,140 ADMAIF_PATHS,141};142 143struct tegra_admaif_soc_data {144 const struct snd_soc_component_driver *cmpnt;145 const struct regmap_config *regmap_conf;146 struct snd_soc_dai_driver *dais;147 unsigned int global_base;148 unsigned int tx_base;149 unsigned int rx_base;150 unsigned int num_ch;151};152 153struct tegra_admaif {154 struct snd_dmaengine_dai_dma_data *capture_dma_data;155 struct snd_dmaengine_dai_dma_data *playback_dma_data;156 const struct tegra_admaif_soc_data *soc_data;157 unsigned int *mono_to_stereo[ADMAIF_PATHS];158 unsigned int *stereo_to_mono[ADMAIF_PATHS];159 struct regmap *regmap;160};161 162#endif163