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1/* SPDX-License-Identifier: GPL-2.0-only */2/*3 * tegra210_dmic.h - Definitions for Tegra210 DMIC driver4 *5 * Copyright (c) 2020 NVIDIA CORPORATION. All rights reserved.6 *7 */8 9#ifndef __TEGRA210_DMIC_H__10#define __TEGRA210_DMIC_H__11 12/* Register offsets from DMIC BASE */13#define TEGRA210_DMIC_TX_STATUS 0x0c14#define TEGRA210_DMIC_TX_INT_STATUS 0x1015#define TEGRA210_DMIC_TX_INT_MASK 0x1416#define TEGRA210_DMIC_TX_INT_SET 0x1817#define TEGRA210_DMIC_TX_INT_CLEAR 0x1c18#define TEGRA210_DMIC_TX_CIF_CTRL 0x2019#define TEGRA210_DMIC_ENABLE 0x4020#define TEGRA210_DMIC_SOFT_RESET 0x4421#define TEGRA210_DMIC_CG 0x4822#define TEGRA210_DMIC_STATUS 0x4c23#define TEGRA210_DMIC_INT_STATUS 0x5024#define TEGRA210_DMIC_CTRL 0x6425#define TEGRA210_DMIC_DBG_CTRL 0x7026#define TEGRA210_DMIC_DCR_BIQUAD_0_COEF_4 0x8827#define TEGRA210_DMIC_LP_FILTER_GAIN 0x8c28#define TEGRA210_DMIC_LP_BIQUAD_0_COEF_0 0x9029#define TEGRA210_DMIC_LP_BIQUAD_0_COEF_1 0x9430#define TEGRA210_DMIC_LP_BIQUAD_0_COEF_2 0x9831#define TEGRA210_DMIC_LP_BIQUAD_0_COEF_3 0x9c32#define TEGRA210_DMIC_LP_BIQUAD_0_COEF_4 0xa033#define TEGRA210_DMIC_LP_BIQUAD_1_COEF_0 0xa434#define TEGRA210_DMIC_LP_BIQUAD_1_COEF_1 0xa835#define TEGRA210_DMIC_LP_BIQUAD_1_COEF_2 0xac36#define TEGRA210_DMIC_LP_BIQUAD_1_COEF_3 0xb037#define TEGRA210_DMIC_LP_BIQUAD_1_COEF_4 0xb438 39/* Fields in TEGRA210_DMIC_CTRL */40#define CH_SEL_SHIFT 841#define TEGRA210_DMIC_CTRL_CHANNEL_SELECT_MASK (0x3 << CH_SEL_SHIFT)42#define LRSEL_POL_SHIFT 443#define TEGRA210_DMIC_CTRL_LRSEL_POLARITY_MASK (0x1 << LRSEL_POL_SHIFT)44#define OSR_SHIFT 045#define TEGRA210_DMIC_CTRL_OSR_MASK (0x3 << OSR_SHIFT)46 47#define DMIC_OSR_FACTOR 6448 49#define DEFAULT_GAIN_Q23 0x80000050 51/* Max boost gain factor used for mixer control */52#define MAX_BOOST_GAIN 2559953 54enum tegra_dmic_ch_select {55 DMIC_CH_SELECT_LEFT,56 DMIC_CH_SELECT_RIGHT,57 DMIC_CH_SELECT_STEREO,58};59 60enum tegra_dmic_osr {61 DMIC_OSR_64,62 DMIC_OSR_128,63 DMIC_OSR_256,64};65 66enum tegra_dmic_lrsel {67 DMIC_LRSEL_LEFT,68 DMIC_LRSEL_RIGHT,69};70 71struct tegra210_dmic {72 struct clk *clk_dmic;73 struct regmap *regmap;74 unsigned int mono_to_stereo;75 unsigned int stereo_to_mono;76 unsigned int boost_gain;77 unsigned int ch_select;78 unsigned int osr_val;79 unsigned int lrsel;80};81 82#endif83