101 lines · c
1/* SPDX-License-Identifier: GPL-2.0-only */2/*3 * tegra210_mixer.h - Definitions for Tegra210 MIXER driver4 *5 * Copyright (c) 2021, NVIDIA CORPORATION. All rights reserved.6 *7 */8 9#ifndef __TEGRA210_MIXER_H__10#define __TEGRA210_MIXER_H__11 12/* XBAR_RX related MIXER offsets */13#define TEGRA210_MIXER_RX1_SOFT_RESET 0x0414#define TEGRA210_MIXER_RX1_STATUS 0x1015#define TEGRA210_MIXER_RX1_CIF_CTRL 0x2416#define TEGRA210_MIXER_RX1_CTRL 0x2817#define TEGRA210_MIXER_RX1_PEAK_CTRL 0x2c18#define TEGRA210_MIXER_RX1_SAMPLE_COUNT 0x3019 20/* XBAR_TX related MIXER offsets */21#define TEGRA210_MIXER_TX1_ENABLE 0x28022#define TEGRA210_MIXER_TX1_SOFT_RESET 0x28423#define TEGRA210_MIXER_TX1_STATUS 0x29024#define TEGRA210_MIXER_TX1_INT_STATUS 0x29425#define TEGRA210_MIXER_TX1_INT_MASK 0x29826#define TEGRA210_MIXER_TX1_INT_SET 0x29c27#define TEGRA210_MIXER_TX1_INT_CLEAR 0x2a028#define TEGRA210_MIXER_TX1_CIF_CTRL 0x2a429#define TEGRA210_MIXER_TX1_ADDER_CONFIG 0x2a830 31/* MIXER related offsets */32#define TEGRA210_MIXER_ENABLE 0x40033#define TEGRA210_MIXER_SOFT_RESET 0x40434#define TEGRA210_MIXER_CG 0x40835#define TEGRA210_MIXER_STATUS 0x41036#define TEGRA210_MIXER_INT_STATUS 0x41437#define TEGRA210_MIXER_GAIN_CFG_RAM_CTRL 0x42c38#define TEGRA210_MIXER_GAIN_CFG_RAM_DATA 0x43039#define TEGRA210_MIXER_PEAKM_RAM_CTRL 0x43440#define TEGRA210_MIXER_PEAKM_RAM_DATA 0x43841#define TEGRA210_MIXER_CTRL 0x43c42 43#define TEGRA210_MIXER_TX2_ADDER_CONFIG (TEGRA210_MIXER_TX1_ADDER_CONFIG + TEGRA210_MIXER_REG_STRIDE)44#define TEGRA210_MIXER_TX3_ADDER_CONFIG (TEGRA210_MIXER_TX2_ADDER_CONFIG + TEGRA210_MIXER_REG_STRIDE)45#define TEGRA210_MIXER_TX4_ADDER_CONFIG (TEGRA210_MIXER_TX3_ADDER_CONFIG + TEGRA210_MIXER_REG_STRIDE)46#define TEGRA210_MIXER_TX5_ADDER_CONFIG (TEGRA210_MIXER_TX4_ADDER_CONFIG + TEGRA210_MIXER_REG_STRIDE)47 48#define TEGRA210_MIXER_TX2_ENABLE (TEGRA210_MIXER_TX1_ENABLE + TEGRA210_MIXER_REG_STRIDE)49#define TEGRA210_MIXER_TX3_ENABLE (TEGRA210_MIXER_TX2_ENABLE + TEGRA210_MIXER_REG_STRIDE)50#define TEGRA210_MIXER_TX4_ENABLE (TEGRA210_MIXER_TX3_ENABLE + TEGRA210_MIXER_REG_STRIDE)51#define TEGRA210_MIXER_TX5_ENABLE (TEGRA210_MIXER_TX4_ENABLE + TEGRA210_MIXER_REG_STRIDE)52 53/* Fields in TEGRA210_MIXER_ENABLE */54#define TEGRA210_MIXER_ENABLE_SHIFT 055#define TEGRA210_MIXER_ENABLE_MASK (1 << TEGRA210_MIXER_ENABLE_SHIFT)56#define TEGRA210_MIXER_EN (1 << TEGRA210_MIXER_ENABLE_SHIFT)57 58/* Fields in TEGRA210_MIXER_GAIN_CFG_RAM_CTRL */59#define TEGRA210_MIXER_GAIN_CFG_RAM_ADDR_0 0x060#define TEGRA210_MIXER_GAIN_CFG_RAM_ADDR_STRIDE 0x1061 62#define TEGRA210_MIXER_GAIN_CFG_RAM_RW_SHIFT 1463#define TEGRA210_MIXER_GAIN_CFG_RAM_RW_MASK (1 << TEGRA210_MIXER_GAIN_CFG_RAM_RW_SHIFT)64#define TEGRA210_MIXER_GAIN_CFG_RAM_RW_WRITE (1 << TEGRA210_MIXER_GAIN_CFG_RAM_RW_SHIFT)65 66#define TEGRA210_MIXER_GAIN_CFG_RAM_ADDR_INIT_EN_SHIFT 1367#define TEGRA210_MIXER_GAIN_CFG_RAM_ADDR_INIT_EN_MASK (1 << TEGRA210_MIXER_GAIN_CFG_RAM_ADDR_INIT_EN_SHIFT)68#define TEGRA210_MIXER_GAIN_CFG_RAM_ADDR_INIT_EN (1 << TEGRA210_MIXER_GAIN_CFG_RAM_ADDR_INIT_EN_SHIFT)69 70#define TEGRA210_MIXER_GAIN_CFG_RAM_SEQ_ACCESS_EN_SHIFT 1271#define TEGRA210_MIXER_GAIN_CFG_RAM_SEQ_ACCESS_EN_MASK (1 << TEGRA210_MIXER_GAIN_CFG_RAM_SEQ_ACCESS_EN_SHIFT)72#define TEGRA210_MIXER_GAIN_CFG_RAM_SEQ_ACCESS_EN (1 << TEGRA210_MIXER_GAIN_CFG_RAM_SEQ_ACCESS_EN_SHIFT)73 74#define TEGRA210_MIXER_GAIN_CFG_RAM_ADDR_SHIFT 075#define TEGRA210_MIXER_GAIN_CFG_RAM_ADDR_MASK (0x1ff << TEGRA210_MIXER_GAIN_CFG_RAM_ADDR_SHIFT)76 77#define TEGRA210_MIXER_REG_STRIDE 0x4078#define TEGRA210_MIXER_RX_MAX 1079#define TEGRA210_MIXER_RX_LIMIT (TEGRA210_MIXER_RX_MAX * TEGRA210_MIXER_REG_STRIDE)80#define TEGRA210_MIXER_TX_MAX 581#define TEGRA210_MIXER_TX_LIMIT (TEGRA210_MIXER_RX_LIMIT + (TEGRA210_MIXER_TX_MAX * TEGRA210_MIXER_REG_STRIDE))82 83#define REG_CFG_DONE_TRIGGER 0xf84#define VAL_CFG_DONE_TRIGGER 0x185 86#define NUM_GAIN_POLY_COEFFS 987#define NUM_DURATION_PARMS 488 89struct tegra210_mixer_gain_params {90 int poly_coeff[NUM_GAIN_POLY_COEFFS];91 int gain_value;92 int duration[NUM_DURATION_PARMS];93};94 95struct tegra210_mixer {96 int gain_value[TEGRA210_MIXER_RX_MAX];97 struct regmap *regmap;98};99 100#endif101