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1// SPDX-License-Identifier: GPL-2.02/*3 * Copyright(C) 2015 Linaro Limited. All rights reserved.4 * Author: Mathieu Poirier <mathieu.poirier@linaro.org>5 */6 7#include <string.h>8#include <linux/coresight-pmu.h>9#include <linux/perf_event.h>10#include <linux/string.h>11 12#include "arm-spe.h"13#include "hisi-ptt.h"14#include "../../../util/cpumap.h"15#include "../../../util/pmu.h"16#include "../../../util/cs-etm.h"17#include "../../arm64/util/mem-events.h"18 19void perf_pmu__arch_init(struct perf_pmu *pmu)20{21 struct perf_cpu_map *intersect;22 23#ifdef HAVE_AUXTRACE_SUPPORT24 if (!strcmp(pmu->name, CORESIGHT_ETM_PMU_NAME)) {25 /* add ETM default config here */26 pmu->auxtrace = true;27 pmu->selectable = true;28 pmu->perf_event_attr_init_default = cs_etm_get_default_config;29#if defined(__aarch64__)30 } else if (strstarts(pmu->name, ARM_SPE_PMU_NAME)) {31 pmu->auxtrace = true;32 pmu->selectable = true;33 pmu->is_uncore = false;34 pmu->perf_event_attr_init_default = arm_spe_pmu_default_config;35 if (strstarts(pmu->name, "arm_spe_"))36 pmu->mem_events = perf_mem_events_arm;37 } else if (strstarts(pmu->name, HISI_PTT_PMU_NAME)) {38 pmu->auxtrace = true;39 pmu->selectable = true;40#endif41 }42#endif43 /* Workaround some ARM PMU's failing to correctly set CPU maps for online processors. */44 intersect = perf_cpu_map__intersect(cpu_map__online(), pmu->cpus);45 perf_cpu_map__put(pmu->cpus);46 pmu->cpus = intersect;47}48