92 lines · json
1[2 {3 "BriefDescription": "BACLEARS asserted.",4 "Counter": "0,1",5 "EventCode": "0xE6",6 "EventName": "BACLEARS.ANY",7 "SampleAfterValue": "2000000",8 "UMask": "0x1"9 },10 {11 "BriefDescription": "Cycles during which instruction fetches are stalled.",12 "Counter": "0,1",13 "EventCode": "0x86",14 "EventName": "CYCLES_ICACHE_MEM_STALLED.ICACHE_MEM_STALLED",15 "SampleAfterValue": "2000000",16 "UMask": "0x1"17 },18 {19 "BriefDescription": "Decode stall due to IQ full",20 "Counter": "0,1",21 "EventCode": "0x87",22 "EventName": "DECODE_STALL.IQ_FULL",23 "SampleAfterValue": "2000000",24 "UMask": "0x2"25 },26 {27 "BriefDescription": "Decode stall due to PFB empty",28 "Counter": "0,1",29 "EventCode": "0x87",30 "EventName": "DECODE_STALL.PFB_EMPTY",31 "SampleAfterValue": "2000000",32 "UMask": "0x1"33 },34 {35 "BriefDescription": "Instruction fetches.",36 "Counter": "0,1",37 "EventCode": "0x80",38 "EventName": "ICACHE.ACCESSES",39 "SampleAfterValue": "200000",40 "UMask": "0x3"41 },42 {43 "BriefDescription": "Icache hit",44 "Counter": "0,1",45 "EventCode": "0x80",46 "EventName": "ICACHE.HIT",47 "SampleAfterValue": "200000",48 "UMask": "0x1"49 },50 {51 "BriefDescription": "Icache miss",52 "Counter": "0,1",53 "EventCode": "0x80",54 "EventName": "ICACHE.MISSES",55 "SampleAfterValue": "200000",56 "UMask": "0x2"57 },58 {59 "BriefDescription": "All Instructions decoded",60 "Counter": "0,1",61 "EventCode": "0xAA",62 "EventName": "MACRO_INSTS.ALL_DECODED",63 "SampleAfterValue": "2000000",64 "UMask": "0x3"65 },66 {67 "BriefDescription": "CISC macro instructions decoded",68 "Counter": "0,1",69 "EventCode": "0xAA",70 "EventName": "MACRO_INSTS.CISC_DECODED",71 "SampleAfterValue": "2000000",72 "UMask": "0x2"73 },74 {75 "BriefDescription": "Non-CISC macro instructions decoded",76 "Counter": "0,1",77 "EventCode": "0xAA",78 "EventName": "MACRO_INSTS.NON_CISC_DECODED",79 "SampleAfterValue": "2000000",80 "UMask": "0x1"81 },82 {83 "BriefDescription": "This event counts the cycles where 1 or more uops are issued by the micro-sequencer (MS), including microcode assists and inserted flows, and written to the IQ.",84 "Counter": "0,1",85 "CounterMask": "1",86 "EventCode": "0xA9",87 "EventName": "UOPS.MS_CYCLES",88 "SampleAfterValue": "2000000",89 "UMask": "0x1"90 }91]92