206 lines · json
1[2 {3 "BriefDescription": "Clockticks of the mesh to memory (B2CMI)",4 "Counter": "0,1,2,3",5 "EventCode": "0x01",6 "EventName": "UNC_B2CMI_CLOCKTICKS",7 "PerPkg": "1",8 "Unit": "B2CMI"9 },10 {11 "BriefDescription": "Counts the number of times B2CMI egress did D2C (direct to core)",12 "Counter": "0,1,2,3",13 "EventCode": "0x16",14 "EventName": "UNC_B2CMI_DIRECT2CORE_TAKEN",15 "PerPkg": "1",16 "UMask": "0x1",17 "Unit": "B2CMI"18 },19 {20 "BriefDescription": "Counts the number of times D2C wasn't honoured even though the incoming request had d2c set for non cisgress txn",21 "Counter": "0,1,2,3",22 "EventCode": "0x18",23 "EventName": "UNC_B2CMI_DIRECT2CORE_TXN_OVERRIDE",24 "PerPkg": "1",25 "UMask": "0x1",26 "Unit": "B2CMI"27 },28 {29 "BriefDescription": "Counts any read",30 "Counter": "0,1,2,3",31 "EventCode": "0x24",32 "EventName": "UNC_B2CMI_IMC_READS.ALL",33 "PerPkg": "1",34 "UMask": "0x104",35 "Unit": "B2CMI"36 },37 {38 "BriefDescription": "Counts normal reads issue to CMI",39 "Counter": "0,1,2,3",40 "EventCode": "0x24",41 "EventName": "UNC_B2CMI_IMC_READS.NORMAL",42 "PerPkg": "1",43 "UMask": "0x101",44 "Unit": "B2CMI"45 },46 {47 "BriefDescription": "Counts reads to 1lm non persistent memory regions",48 "Counter": "0,1,2,3",49 "EventCode": "0x24",50 "EventName": "UNC_B2CMI_IMC_READS.TO_DDR_AS_MEM",51 "Experimental": "1",52 "PerPkg": "1",53 "UMask": "0x108",54 "Unit": "B2CMI"55 },56 {57 "BriefDescription": "All Writes - All Channels",58 "Counter": "0,1,2,3",59 "EventCode": "0x25",60 "EventName": "UNC_B2CMI_IMC_WRITES.ALL",61 "PerPkg": "1",62 "UMask": "0x110",63 "Unit": "B2CMI"64 },65 {66 "BriefDescription": "Full Non-ISOCH - All Channels",67 "Counter": "0,1,2,3",68 "EventCode": "0x25",69 "EventName": "UNC_B2CMI_IMC_WRITES.FULL",70 "PerPkg": "1",71 "UMask": "0x101",72 "Unit": "B2CMI"73 },74 {75 "BriefDescription": "Partial Non-ISOCH - All Channels",76 "Counter": "0,1,2,3",77 "EventCode": "0x25",78 "EventName": "UNC_B2CMI_IMC_WRITES.PARTIAL",79 "PerPkg": "1",80 "UMask": "0x102",81 "Unit": "B2CMI"82 },83 {84 "BriefDescription": "DDR - All Channels",85 "Counter": "0,1,2,3",86 "EventCode": "0x25",87 "EventName": "UNC_B2CMI_IMC_WRITES.TO_DDR_AS_MEM",88 "Experimental": "1",89 "PerPkg": "1",90 "UMask": "0x120",91 "Unit": "B2CMI"92 },93 {94 "BriefDescription": "Prefetch CAM Inserts : XPT - Ch 0",95 "Counter": "0,1,2,3",96 "EventCode": "0x56",97 "EventName": "UNC_B2CMI_PREFCAM_INSERTS.CH0_XPT",98 "Experimental": "1",99 "PerPkg": "1",100 "UMask": "0x1",101 "Unit": "B2CMI"102 },103 {104 "BriefDescription": "Prefetch CAM Inserts : XPT -All Channels",105 "Counter": "0,1,2,3",106 "EventCode": "0x56",107 "EventName": "UNC_B2CMI_PREFCAM_INSERTS.XPT_ALLCH",108 "PerPkg": "1",109 "PublicDescription": "Prefetch CAM Inserts : XPT - All Channels",110 "UMask": "0x1",111 "Unit": "B2CMI"112 },113 {114 "BriefDescription": "Prefetch CAM Occupancy : Channel 0",115 "Counter": "0,1,2,3",116 "EventCode": "0x54",117 "EventName": "UNC_B2CMI_PREFCAM_OCCUPANCY.CH0",118 "Experimental": "1",119 "PerPkg": "1",120 "UMask": "0x1",121 "Unit": "B2CMI"122 },123 {124 "BriefDescription": "Tracker Inserts : Channel 0",125 "Counter": "0,1,2,3",126 "EventCode": "0x32",127 "EventName": "UNC_B2CMI_TRACKER_INSERTS.CH0",128 "PerPkg": "1",129 "UMask": "0x104",130 "Unit": "B2CMI"131 },132 {133 "BriefDescription": "Tracker Occupancy : Channel 0",134 "Counter": "0,1,2,3",135 "EventCode": "0x33",136 "EventName": "UNC_B2CMI_TRACKER_OCCUPANCY.CH0",137 "PerPkg": "1",138 "UMask": "0x1",139 "Unit": "B2CMI"140 },141 {142 "BriefDescription": "Write Tracker Inserts : Channel 0",143 "Counter": "0,1,2,3",144 "EventCode": "0x40",145 "EventName": "UNC_B2CMI_WR_TRACKER_INSERTS.CH0",146 "Experimental": "1",147 "PerPkg": "1",148 "UMask": "0x1",149 "Unit": "B2CMI"150 },151 {152 "BriefDescription": "Total Write Cache Occupancy : Mem",153 "Counter": "0,1,2,3",154 "EventCode": "0x0F",155 "EventName": "UNC_I_CACHE_TOTAL_OCCUPANCY.MEM",156 "Experimental": "1",157 "PerPkg": "1",158 "UMask": "0x4",159 "Unit": "IRP"160 },161 {162 "BriefDescription": "IRP Clockticks",163 "Counter": "0,1,2,3",164 "EventCode": "0x01",165 "EventName": "UNC_I_CLOCKTICKS",166 "PerPkg": "1",167 "Unit": "IRP"168 },169 {170 "BriefDescription": "Inbound read requests received by the IRP and inserted into the FAF queue",171 "Counter": "0,1,2,3",172 "EventCode": "0x18",173 "EventName": "UNC_I_FAF_INSERTS",174 "PerPkg": "1",175 "Unit": "IRP"176 },177 {178 "BriefDescription": "FAF occupancy",179 "Counter": "0,1,2,3",180 "EventCode": "0x19",181 "EventName": "UNC_I_FAF_OCCUPANCY",182 "Experimental": "1",183 "PerPkg": "1",184 "Unit": "IRP"185 },186 {187 "BriefDescription": "Misc Events - Set 1 : Lost Forward : Snoop pulled away ownership before a write was committed",188 "Counter": "0,1,2,3",189 "EventCode": "0x1F",190 "EventName": "UNC_I_MISC1.LOST_FWD",191 "Experimental": "1",192 "PerPkg": "1",193 "UMask": "0x10",194 "Unit": "IRP"195 },196 {197 "BriefDescription": "Inbound write (fast path) requests to coherent memory, received by the IRP resulting in write ownership requests issued by IRP to the mesh.",198 "Counter": "0,1,2,3",199 "EventCode": "0x11",200 "EventName": "UNC_I_TRANSACTIONS.WR_PREF",201 "PerPkg": "1",202 "UMask": "0x8",203 "Unit": "IRP"204 }205]206