1902 lines · json
1[2 {3 "BriefDescription": "IIO Clockticks",4 "Counter": "0,1,2,3",5 "EventCode": "0x01",6 "EventName": "UNC_IIO_CLOCKTICKS",7 "PerPkg": "1",8 "PortMask": "0x000",9 "Unit": "IIO"10 },11 {12 "BriefDescription": "PCIE Completion Buffer Inserts. Counts once per 64 byte read issued from this PCIE device.",13 "Counter": "0,1,2,3",14 "EventCode": "0xC2",15 "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.ALL_PARTS",16 "Experimental": "1",17 "FCMask": "0x07",18 "PerPkg": "1",19 "PortMask": "0x0FF",20 "UMask": "0x70ff004",21 "Unit": "IIO"22 },23 {24 "BriefDescription": "PCIE Completion Buffer Inserts. Counts once per 64 byte read issued from this PCIE device.",25 "Counter": "0,1,2,3",26 "EventCode": "0xC2",27 "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART0",28 "Experimental": "1",29 "FCMask": "0x07",30 "PerPkg": "1",31 "PortMask": "0x001",32 "UMask": "0x7001004",33 "Unit": "IIO"34 },35 {36 "BriefDescription": "PCIE Completion Buffer Inserts. Counts once per 64 byte read issued from this PCIE device.",37 "Counter": "0,1,2,3",38 "EventCode": "0xC2",39 "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART1",40 "Experimental": "1",41 "FCMask": "0x07",42 "PerPkg": "1",43 "PortMask": "0x002",44 "UMask": "0x7002004",45 "Unit": "IIO"46 },47 {48 "BriefDescription": "PCIE Completion Buffer Inserts. Counts once per 64 byte read issued from this PCIE device.",49 "Counter": "0,1,2,3",50 "EventCode": "0xC2",51 "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART2",52 "Experimental": "1",53 "FCMask": "0x07",54 "PerPkg": "1",55 "PortMask": "0x004",56 "UMask": "0x7004004",57 "Unit": "IIO"58 },59 {60 "BriefDescription": "PCIE Completion Buffer Inserts. Counts once per 64 byte read issued from this PCIE device.",61 "Counter": "0,1,2,3",62 "EventCode": "0xC2",63 "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART3",64 "Experimental": "1",65 "FCMask": "0x07",66 "PerPkg": "1",67 "PortMask": "0x008",68 "UMask": "0x7008004",69 "Unit": "IIO"70 },71 {72 "BriefDescription": "PCIE Completion Buffer Inserts. Counts once per 64 byte read issued from this PCIE device.",73 "Counter": "0,1,2,3",74 "EventCode": "0xC2",75 "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART4",76 "Experimental": "1",77 "FCMask": "0x07",78 "PerPkg": "1",79 "PortMask": "0x010",80 "UMask": "0x7010004",81 "Unit": "IIO"82 },83 {84 "BriefDescription": "PCIE Completion Buffer Inserts. Counts once per 64 byte read issued from this PCIE device.",85 "Counter": "0,1,2,3",86 "EventCode": "0xC2",87 "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART5",88 "Experimental": "1",89 "FCMask": "0x07",90 "PerPkg": "1",91 "PortMask": "0x020",92 "UMask": "0x7020004",93 "Unit": "IIO"94 },95 {96 "BriefDescription": "PCIE Completion Buffer Inserts. Counts once per 64 byte read issued from this PCIE device.",97 "Counter": "0,1,2,3",98 "EventCode": "0xC2",99 "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART6",100 "Experimental": "1",101 "FCMask": "0x07",102 "PerPkg": "1",103 "PortMask": "0x040",104 "UMask": "0x7040004",105 "Unit": "IIO"106 },107 {108 "BriefDescription": "PCIE Completion Buffer Inserts. Counts once per 64 byte read issued from this PCIE device.",109 "Counter": "0,1,2,3",110 "EventCode": "0xC2",111 "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART7",112 "Experimental": "1",113 "FCMask": "0x07",114 "PerPkg": "1",115 "PortMask": "0x080",116 "UMask": "0x7080004",117 "Unit": "IIO"118 },119 {120 "BriefDescription": "Count of allocations in the completion buffer",121 "Counter": "2,3",122 "EventCode": "0xD5",123 "EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.ALL_PARTS",124 "Experimental": "1",125 "FCMask": "0x07",126 "PerPkg": "1",127 "PortMask": "0x0FF",128 "UMask": "0x70ff0ff",129 "Unit": "IIO"130 },131 {132 "BriefDescription": "Count of allocations in the completion buffer",133 "Counter": "2,3",134 "EventCode": "0xD5",135 "EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.PART0",136 "Experimental": "1",137 "FCMask": "0x07",138 "PerPkg": "1",139 "PortMask": "0x001",140 "UMask": "0x7001001",141 "Unit": "IIO"142 },143 {144 "BriefDescription": "Count of allocations in the completion buffer",145 "Counter": "2,3",146 "EventCode": "0xD5",147 "EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.PART1",148 "Experimental": "1",149 "FCMask": "0x07",150 "PerPkg": "1",151 "PortMask": "0x002",152 "UMask": "0x7002002",153 "Unit": "IIO"154 },155 {156 "BriefDescription": "Count of allocations in the completion buffer",157 "Counter": "2,3",158 "EventCode": "0xD5",159 "EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.PART2",160 "Experimental": "1",161 "FCMask": "0x07",162 "PerPkg": "1",163 "PortMask": "0x004",164 "UMask": "0x7004004",165 "Unit": "IIO"166 },167 {168 "BriefDescription": "Count of allocations in the completion buffer",169 "Counter": "2,3",170 "EventCode": "0xD5",171 "EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.PART3",172 "Experimental": "1",173 "FCMask": "0x07",174 "PerPkg": "1",175 "PortMask": "0x008",176 "UMask": "0x7008008",177 "Unit": "IIO"178 },179 {180 "BriefDescription": "Count of allocations in the completion buffer",181 "Counter": "2,3",182 "EventCode": "0xD5",183 "EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.PART4",184 "Experimental": "1",185 "FCMask": "0x07",186 "PerPkg": "1",187 "PortMask": "0x010",188 "UMask": "0x7010010",189 "Unit": "IIO"190 },191 {192 "BriefDescription": "Count of allocations in the completion buffer",193 "Counter": "2,3",194 "EventCode": "0xD5",195 "EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.PART5",196 "Experimental": "1",197 "FCMask": "0x07",198 "PerPkg": "1",199 "PortMask": "0x020",200 "UMask": "0x7020020",201 "Unit": "IIO"202 },203 {204 "BriefDescription": "Count of allocations in the completion buffer",205 "Counter": "2,3",206 "EventCode": "0xD5",207 "EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.PART6",208 "Experimental": "1",209 "FCMask": "0x07",210 "PerPkg": "1",211 "PortMask": "0x040",212 "UMask": "0x7040040",213 "Unit": "IIO"214 },215 {216 "BriefDescription": "Count of allocations in the completion buffer",217 "Counter": "2,3",218 "EventCode": "0xD5",219 "EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.PART7",220 "Experimental": "1",221 "FCMask": "0x07",222 "PerPkg": "1",223 "PortMask": "0x080",224 "UMask": "0x7080080",225 "Unit": "IIO"226 },227 {228 "BriefDescription": "Data requested by the CPU : Core reporting completion of Card read from Core DRAM",229 "Counter": "2,3",230 "EventCode": "0xC0",231 "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.ALL_PARTS",232 "Experimental": "1",233 "FCMask": "0x07",234 "PerPkg": "1",235 "PortMask": "0x0FF",236 "UMask": "0x70ff004",237 "Unit": "IIO"238 },239 {240 "BriefDescription": "Data requested by the CPU : Core reporting completion of Card read from Core DRAM",241 "Counter": "2,3",242 "EventCode": "0xC0",243 "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART0",244 "Experimental": "1",245 "FCMask": "0x07",246 "PerPkg": "1",247 "PortMask": "0x001",248 "UMask": "0x7001004",249 "Unit": "IIO"250 },251 {252 "BriefDescription": "Data requested by the CPU : Core reporting completion of Card read from Core DRAM",253 "Counter": "2,3",254 "EventCode": "0xC0",255 "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART1",256 "Experimental": "1",257 "FCMask": "0x07",258 "PerPkg": "1",259 "PortMask": "0x002",260 "UMask": "0x7002004",261 "Unit": "IIO"262 },263 {264 "BriefDescription": "Data requested by the CPU : Core reporting completion of Card read from Core DRAM",265 "Counter": "2,3",266 "EventCode": "0xC0",267 "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART2",268 "Experimental": "1",269 "FCMask": "0x07",270 "PerPkg": "1",271 "PortMask": "0x004",272 "UMask": "0x7004004",273 "Unit": "IIO"274 },275 {276 "BriefDescription": "Data requested by the CPU : Core reporting completion of Card read from Core DRAM",277 "Counter": "2,3",278 "EventCode": "0xC0",279 "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART3",280 "Experimental": "1",281 "FCMask": "0x07",282 "PerPkg": "1",283 "PortMask": "0x008",284 "UMask": "0x7008004",285 "Unit": "IIO"286 },287 {288 "BriefDescription": "Data requested by the CPU : Core reporting completion of Card read from Core DRAM",289 "Counter": "2,3",290 "EventCode": "0xC0",291 "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART4",292 "Experimental": "1",293 "FCMask": "0x07",294 "PerPkg": "1",295 "PortMask": "0x010",296 "UMask": "0x7010004",297 "Unit": "IIO"298 },299 {300 "BriefDescription": "Data requested by the CPU : Core reporting completion of Card read from Core DRAM",301 "Counter": "2,3",302 "EventCode": "0xC0",303 "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART5",304 "Experimental": "1",305 "FCMask": "0x07",306 "PerPkg": "1",307 "PortMask": "0x020",308 "UMask": "0x7020004",309 "Unit": "IIO"310 },311 {312 "BriefDescription": "Data requested by the CPU : Core reporting completion of Card read from Core DRAM",313 "Counter": "2,3",314 "EventCode": "0xC0",315 "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART6",316 "Experimental": "1",317 "FCMask": "0x07",318 "PerPkg": "1",319 "PortMask": "0x040",320 "UMask": "0x7040004",321 "Unit": "IIO"322 },323 {324 "BriefDescription": "Data requested by the CPU : Core reporting completion of Card read from Core DRAM",325 "Counter": "2,3",326 "EventCode": "0xC0",327 "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART7",328 "Experimental": "1",329 "FCMask": "0x07",330 "PerPkg": "1",331 "PortMask": "0x080",332 "UMask": "0x7080004",333 "Unit": "IIO"334 },335 {336 "BriefDescription": "Data requested by the CPU : Core writing to Cards MMIO space",337 "Counter": "2,3",338 "EventCode": "0xC0",339 "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.ALL_PARTS",340 "Experimental": "1",341 "FCMask": "0x07",342 "PerPkg": "1",343 "PortMask": "0x0FF",344 "UMask": "0x70ff001",345 "Unit": "IIO"346 },347 {348 "BriefDescription": "Data requested by the CPU : Core writing to Cards MMIO space",349 "Counter": "2,3",350 "EventCode": "0xC0",351 "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART0",352 "FCMask": "0x07",353 "PerPkg": "1",354 "PortMask": "0x001",355 "UMask": "0x7001001",356 "Unit": "IIO"357 },358 {359 "BriefDescription": "Data requested by the CPU : Core writing to Cards MMIO space",360 "Counter": "2,3",361 "EventCode": "0xC0",362 "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART1",363 "FCMask": "0x07",364 "PerPkg": "1",365 "PortMask": "0x002",366 "UMask": "0x7002001",367 "Unit": "IIO"368 },369 {370 "BriefDescription": "Data requested by the CPU : Core writing to Cards MMIO space",371 "Counter": "2,3",372 "EventCode": "0xC0",373 "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART2",374 "FCMask": "0x07",375 "PerPkg": "1",376 "PortMask": "0x004",377 "UMask": "0x7004001",378 "Unit": "IIO"379 },380 {381 "BriefDescription": "Data requested by the CPU : Core writing to Cards MMIO space",382 "Counter": "2,3",383 "EventCode": "0xC0",384 "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART3",385 "FCMask": "0x07",386 "PerPkg": "1",387 "PortMask": "0x008",388 "UMask": "0x7008001",389 "Unit": "IIO"390 },391 {392 "BriefDescription": "Data requested by the CPU : Core writing to Cards MMIO space",393 "Counter": "2,3",394 "EventCode": "0xC0",395 "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART4",396 "FCMask": "0x07",397 "PerPkg": "1",398 "PortMask": "0x010",399 "UMask": "0x7010001",400 "Unit": "IIO"401 },402 {403 "BriefDescription": "Data requested by the CPU : Core writing to Cards MMIO space",404 "Counter": "2,3",405 "EventCode": "0xC0",406 "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART5",407 "FCMask": "0x07",408 "PerPkg": "1",409 "PortMask": "0x020",410 "UMask": "0x7020001",411 "Unit": "IIO"412 },413 {414 "BriefDescription": "Data requested by the CPU : Core writing to Cards MMIO space",415 "Counter": "2,3",416 "EventCode": "0xC0",417 "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART6",418 "FCMask": "0x07",419 "PerPkg": "1",420 "PortMask": "0x040",421 "UMask": "0x7040001",422 "Unit": "IIO"423 },424 {425 "BriefDescription": "Data requested by the CPU : Core writing to Cards MMIO space",426 "Counter": "2,3",427 "EventCode": "0xC0",428 "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART7",429 "FCMask": "0x07",430 "PerPkg": "1",431 "PortMask": "0x080",432 "UMask": "0x7080001",433 "Unit": "IIO"434 },435 {436 "BriefDescription": "Data requested by the CPU : Another card (different IIO stack) reading from this card.",437 "Counter": "2,3",438 "EventCode": "0xC0",439 "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.ALL_PARTS",440 "FCMask": "0x07",441 "PerPkg": "1",442 "PortMask": "0x0FF",443 "UMask": "0x70ff008",444 "Unit": "IIO"445 },446 {447 "BriefDescription": "Data requested by the CPU : Another card (different IIO stack) writing to this card.",448 "Counter": "2,3",449 "EventCode": "0xC0",450 "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.ALL_PARTS",451 "FCMask": "0x07",452 "PerPkg": "1",453 "PortMask": "0x0FF",454 "UMask": "0x70ff002",455 "Unit": "IIO"456 },457 {458 "BriefDescription": "Counts once for every 4 bytes read from this card to memory. This event does include reads to IO.",459 "Counter": "0,1",460 "EventCode": "0x83",461 "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.ALL_PARTS",462 "FCMask": "0x07",463 "PerPkg": "1",464 "PortMask": "0x0FF",465 "UMask": "0x70ff004",466 "Unit": "IIO"467 },468 {469 "BriefDescription": "Four byte data request of the CPU : Card reading from DRAM",470 "Counter": "0,1",471 "EventCode": "0x83",472 "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART0",473 "FCMask": "0x07",474 "PerPkg": "1",475 "PortMask": "0x001",476 "UMask": "0x7001004",477 "Unit": "IIO"478 },479 {480 "BriefDescription": "Four byte data request of the CPU : Card reading from DRAM",481 "Counter": "0,1",482 "EventCode": "0x83",483 "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART1",484 "FCMask": "0x07",485 "PerPkg": "1",486 "PortMask": "0x02",487 "UMask": "0x7002004",488 "Unit": "IIO"489 },490 {491 "BriefDescription": "Four byte data request of the CPU : Card reading from DRAM",492 "Counter": "0,1",493 "EventCode": "0x83",494 "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART2",495 "FCMask": "0x07",496 "PerPkg": "1",497 "PortMask": "0x04",498 "UMask": "0x7004004",499 "Unit": "IIO"500 },501 {502 "BriefDescription": "Four byte data request of the CPU : Card reading from DRAM",503 "Counter": "0,1",504 "EventCode": "0x83",505 "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART3",506 "FCMask": "0x07",507 "PerPkg": "1",508 "PortMask": "0x08",509 "UMask": "0x7008004",510 "Unit": "IIO"511 },512 {513 "BriefDescription": "Four byte data request of the CPU : Card reading from DRAM",514 "Counter": "0,1",515 "EventCode": "0x83",516 "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART4",517 "FCMask": "0x07",518 "PerPkg": "1",519 "PortMask": "0x10",520 "UMask": "0x7010004",521 "Unit": "IIO"522 },523 {524 "BriefDescription": "Four byte data request of the CPU : Card reading from DRAM",525 "Counter": "0,1",526 "EventCode": "0x83",527 "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART5",528 "FCMask": "0x07",529 "PerPkg": "1",530 "PortMask": "0x20",531 "UMask": "0x7020004",532 "Unit": "IIO"533 },534 {535 "BriefDescription": "Four byte data request of the CPU : Card reading from DRAM",536 "Counter": "0,1",537 "EventCode": "0x83",538 "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART6",539 "FCMask": "0x07",540 "PerPkg": "1",541 "PortMask": "0x40",542 "UMask": "0x7040004",543 "Unit": "IIO"544 },545 {546 "BriefDescription": "Four byte data request of the CPU : Card reading from DRAM",547 "Counter": "0,1",548 "EventCode": "0x83",549 "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART7",550 "FCMask": "0x07",551 "PerPkg": "1",552 "PortMask": "0x80",553 "UMask": "0x7080004",554 "Unit": "IIO"555 },556 {557 "BriefDescription": "Counts once for every 4 bytes written from this card to memory. This event does include writes to IO.",558 "Counter": "0,1",559 "EventCode": "0x83",560 "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.ALL_PARTS",561 "FCMask": "0x07",562 "PerPkg": "1",563 "PortMask": "0x0FF",564 "UMask": "0x70ff001",565 "Unit": "IIO"566 },567 {568 "BriefDescription": "Four byte data request of the CPU : Card writing to DRAM",569 "Counter": "0,1",570 "EventCode": "0x83",571 "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART0",572 "FCMask": "0x07",573 "PerPkg": "1",574 "PortMask": "0x001",575 "UMask": "0x7001001",576 "Unit": "IIO"577 },578 {579 "BriefDescription": "Four byte data request of the CPU : Card writing to DRAM",580 "Counter": "0,1",581 "EventCode": "0x83",582 "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART1",583 "FCMask": "0x07",584 "PerPkg": "1",585 "PortMask": "0x02",586 "UMask": "0x7002001",587 "Unit": "IIO"588 },589 {590 "BriefDescription": "Four byte data request of the CPU : Card writing to DRAM",591 "Counter": "0,1",592 "EventCode": "0x83",593 "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART2",594 "FCMask": "0x07",595 "PerPkg": "1",596 "PortMask": "0x04",597 "UMask": "0x7004001",598 "Unit": "IIO"599 },600 {601 "BriefDescription": "Four byte data request of the CPU : Card writing to DRAM",602 "Counter": "0,1",603 "EventCode": "0x83",604 "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART3",605 "FCMask": "0x07",606 "PerPkg": "1",607 "PortMask": "0x08",608 "UMask": "0x7008001",609 "Unit": "IIO"610 },611 {612 "BriefDescription": "Four byte data request of the CPU : Card writing to DRAM",613 "Counter": "0,1",614 "EventCode": "0x83",615 "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART4",616 "FCMask": "0x07",617 "PerPkg": "1",618 "PortMask": "0x10",619 "UMask": "0x7010001",620 "Unit": "IIO"621 },622 {623 "BriefDescription": "Four byte data request of the CPU : Card writing to DRAM",624 "Counter": "0,1",625 "EventCode": "0x83",626 "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART5",627 "FCMask": "0x07",628 "PerPkg": "1",629 "PortMask": "0x20",630 "UMask": "0x7020001",631 "Unit": "IIO"632 },633 {634 "BriefDescription": "Four byte data request of the CPU : Card writing to DRAM",635 "Counter": "0,1",636 "EventCode": "0x83",637 "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART6",638 "FCMask": "0x07",639 "PerPkg": "1",640 "PortMask": "0x40",641 "UMask": "0x7040001",642 "Unit": "IIO"643 },644 {645 "BriefDescription": "Four byte data request of the CPU : Card writing to DRAM",646 "Counter": "0,1",647 "EventCode": "0x83",648 "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART7",649 "FCMask": "0x07",650 "PerPkg": "1",651 "PortMask": "0x80",652 "UMask": "0x7080001",653 "Unit": "IIO"654 },655 {656 "BriefDescription": "Data requested of the CPU : Card reading from another Card (same or different stack)",657 "Counter": "0,1",658 "EventCode": "0x83",659 "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.PART0",660 "Experimental": "1",661 "FCMask": "0x07",662 "PerPkg": "1",663 "PortMask": "0x001",664 "UMask": "0x7001008",665 "Unit": "IIO"666 },667 {668 "BriefDescription": "Data requested of the CPU : Card reading from another Card (same or different stack)",669 "Counter": "0,1",670 "EventCode": "0x83",671 "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.PART1",672 "Experimental": "1",673 "FCMask": "0x07",674 "PerPkg": "1",675 "PortMask": "0x002",676 "UMask": "0x7002008",677 "Unit": "IIO"678 },679 {680 "BriefDescription": "Data requested of the CPU : Card reading from another Card (same or different stack)",681 "Counter": "0,1",682 "EventCode": "0x83",683 "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.PART2",684 "Experimental": "1",685 "FCMask": "0x07",686 "PerPkg": "1",687 "PortMask": "0x004",688 "UMask": "0x7004008",689 "Unit": "IIO"690 },691 {692 "BriefDescription": "Data requested of the CPU : Card reading from another Card (same or different stack)",693 "Counter": "0,1",694 "EventCode": "0x83",695 "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.PART3",696 "Experimental": "1",697 "FCMask": "0x07",698 "PerPkg": "1",699 "PortMask": "0x008",700 "UMask": "0x7008008",701 "Unit": "IIO"702 },703 {704 "BriefDescription": "Data requested of the CPU : Card reading from another Card (same or different stack)",705 "Counter": "0,1",706 "EventCode": "0x83",707 "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.PART4",708 "Experimental": "1",709 "FCMask": "0x07",710 "PerPkg": "1",711 "PortMask": "0x010",712 "UMask": "0x7010008",713 "Unit": "IIO"714 },715 {716 "BriefDescription": "Data requested of the CPU : Card reading from another Card (same or different stack)",717 "Counter": "0,1",718 "EventCode": "0x83",719 "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.PART5",720 "Experimental": "1",721 "FCMask": "0x07",722 "PerPkg": "1",723 "PortMask": "0x020",724 "UMask": "0x7020008",725 "Unit": "IIO"726 },727 {728 "BriefDescription": "Data requested of the CPU : Card reading from another Card (same or different stack)",729 "Counter": "0,1",730 "EventCode": "0x83",731 "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.PART6",732 "Experimental": "1",733 "FCMask": "0x07",734 "PerPkg": "1",735 "PortMask": "0x040",736 "UMask": "0x7040008",737 "Unit": "IIO"738 },739 {740 "BriefDescription": "Data requested of the CPU : Card reading from another Card (same or different stack)",741 "Counter": "0,1",742 "EventCode": "0x83",743 "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.PART7",744 "Experimental": "1",745 "FCMask": "0x07",746 "PerPkg": "1",747 "PortMask": "0x080",748 "UMask": "0x7080008",749 "Unit": "IIO"750 },751 {752 "BriefDescription": "Counts once for every 4 bytes written from this card to a peer device's IO space.",753 "Counter": "0,1",754 "EventCode": "0x83",755 "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.ALL_PARTS",756 "Experimental": "1",757 "FCMask": "0x07",758 "PerPkg": "1",759 "PortMask": "0x0FF",760 "UMask": "0x70ff002",761 "Unit": "IIO"762 },763 {764 "BriefDescription": "Data requested of the CPU : Card writing to another Card (same or different stack)",765 "Counter": "0,1",766 "EventCode": "0x83",767 "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART0",768 "Experimental": "1",769 "FCMask": "0x07",770 "PerPkg": "1",771 "PortMask": "0x001",772 "UMask": "0x7001002",773 "Unit": "IIO"774 },775 {776 "BriefDescription": "Data requested of the CPU : Card writing to another Card (same or different stack)",777 "Counter": "0,1",778 "EventCode": "0x83",779 "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART1",780 "Experimental": "1",781 "FCMask": "0x07",782 "PerPkg": "1",783 "PortMask": "0x002",784 "UMask": "0x7002002",785 "Unit": "IIO"786 },787 {788 "BriefDescription": "Data requested of the CPU : Card writing to another Card (same or different stack)",789 "Counter": "0,1",790 "EventCode": "0x83",791 "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART2",792 "Experimental": "1",793 "FCMask": "0x07",794 "PerPkg": "1",795 "PortMask": "0x004",796 "UMask": "0x7004002",797 "Unit": "IIO"798 },799 {800 "BriefDescription": "Data requested of the CPU : Card writing to another Card (same or different stack)",801 "Counter": "0,1",802 "EventCode": "0x83",803 "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART3",804 "Experimental": "1",805 "FCMask": "0x07",806 "PerPkg": "1",807 "PortMask": "0x008",808 "UMask": "0x7008002",809 "Unit": "IIO"810 },811 {812 "BriefDescription": "Data requested of the CPU : Card writing to another Card (same or different stack)",813 "Counter": "0,1",814 "EventCode": "0x83",815 "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART4",816 "Experimental": "1",817 "FCMask": "0x07",818 "PerPkg": "1",819 "PortMask": "0x010",820 "UMask": "0x7010002",821 "Unit": "IIO"822 },823 {824 "BriefDescription": "Data requested of the CPU : Card writing to another Card (same or different stack)",825 "Counter": "0,1",826 "EventCode": "0x83",827 "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART5",828 "Experimental": "1",829 "FCMask": "0x07",830 "PerPkg": "1",831 "PortMask": "0x020",832 "UMask": "0x7020002",833 "Unit": "IIO"834 },835 {836 "BriefDescription": "Data requested of the CPU : Card writing to another Card (same or different stack)",837 "Counter": "0,1",838 "EventCode": "0x83",839 "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART6",840 "Experimental": "1",841 "FCMask": "0x07",842 "PerPkg": "1",843 "PortMask": "0x040",844 "UMask": "0x7040002",845 "Unit": "IIO"846 },847 {848 "BriefDescription": "Data requested of the CPU : Card writing to another Card (same or different stack)",849 "Counter": "0,1",850 "EventCode": "0x83",851 "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART7",852 "Experimental": "1",853 "FCMask": "0x07",854 "PerPkg": "1",855 "PortMask": "0x080",856 "UMask": "0x7080002",857 "Unit": "IIO"858 },859 {860 "BriefDescription": "IOTLB Hits to a 1G Page",861 "Counter": "0,1,2,3",862 "EventCode": "0x40",863 "EventName": "UNC_IIO_IOMMU0.1G_HITS",864 "Experimental": "1",865 "PerPkg": "1",866 "PortMask": "0x000",867 "UMask": "0x10",868 "Unit": "IIO"869 },870 {871 "BriefDescription": "IOTLB Hits to a 2M Page",872 "Counter": "0,1,2,3",873 "EventCode": "0x40",874 "EventName": "UNC_IIO_IOMMU0.2M_HITS",875 "Experimental": "1",876 "PerPkg": "1",877 "PortMask": "0x000",878 "UMask": "0x8",879 "Unit": "IIO"880 },881 {882 "BriefDescription": "IOTLB Hits to a 4K Page",883 "Counter": "0,1,2,3",884 "EventCode": "0x40",885 "EventName": "UNC_IIO_IOMMU0.4K_HITS",886 "Experimental": "1",887 "PerPkg": "1",888 "PortMask": "0x000",889 "UMask": "0x4",890 "Unit": "IIO"891 },892 {893 "BriefDescription": "IOTLB lookups all",894 "Counter": "0,1,2,3",895 "EventCode": "0x40",896 "EventName": "UNC_IIO_IOMMU0.ALL_LOOKUPS",897 "Experimental": "1",898 "PerPkg": "1",899 "PortMask": "0x000",900 "UMask": "0x2",901 "Unit": "IIO"902 },903 {904 "BriefDescription": "Context cache hits",905 "Counter": "0,1,2,3",906 "EventCode": "0x40",907 "EventName": "UNC_IIO_IOMMU0.CTXT_CACHE_HITS",908 "Experimental": "1",909 "PerPkg": "1",910 "PortMask": "0x000",911 "UMask": "0x80",912 "Unit": "IIO"913 },914 {915 "BriefDescription": "Context cache lookups",916 "Counter": "0,1,2,3",917 "EventCode": "0x40",918 "EventName": "UNC_IIO_IOMMU0.CTXT_CACHE_LOOKUPS",919 "Experimental": "1",920 "PerPkg": "1",921 "PortMask": "0x000",922 "UMask": "0x40",923 "Unit": "IIO"924 },925 {926 "BriefDescription": "IOTLB lookups first",927 "Counter": "0,1,2,3",928 "EventCode": "0x40",929 "EventName": "UNC_IIO_IOMMU0.FIRST_LOOKUPS",930 "Experimental": "1",931 "PerPkg": "1",932 "PortMask": "0x000",933 "UMask": "0x1",934 "Unit": "IIO"935 },936 {937 "BriefDescription": "IOTLB Fills (same as IOTLB miss)",938 "Counter": "0,1,2,3",939 "EventCode": "0x40",940 "EventName": "UNC_IIO_IOMMU0.MISSES",941 "Experimental": "1",942 "PerPkg": "1",943 "PortMask": "0x000",944 "UMask": "0x20",945 "Unit": "IIO"946 },947 {948 "BriefDescription": "IOMMU memory access (both low and high priority)",949 "Counter": "0,1,2,3",950 "EventCode": "0x41",951 "EventName": "UNC_IIO_IOMMU1.NUM_MEM_ACCESSES",952 "Experimental": "1",953 "PerPkg": "1",954 "PortMask": "0x000",955 "UMask": "0xc0",956 "Unit": "IIO"957 },958 {959 "BriefDescription": "IOMMU high priority memory access",960 "Counter": "0,1,2,3",961 "EventCode": "0x41",962 "EventName": "UNC_IIO_IOMMU1.NUM_MEM_ACCESSES_HIGH",963 "Experimental": "1",964 "PerPkg": "1",965 "PortMask": "0x000",966 "UMask": "0x80",967 "Unit": "IIO"968 },969 {970 "BriefDescription": "IOMMU low priority memory access",971 "Counter": "0,1,2,3",972 "EventCode": "0x41",973 "EventName": "UNC_IIO_IOMMU1.NUM_MEM_ACCESSES_LOW",974 "Experimental": "1",975 "PerPkg": "1",976 "PortMask": "0x000",977 "UMask": "0x40",978 "Unit": "IIO"979 },980 {981 "BriefDescription": "Second Level Page Walk Cache Hit to a 1G page",982 "Counter": "0,1,2,3",983 "EventCode": "0x41",984 "EventName": "UNC_IIO_IOMMU1.SLPWC_1G_HITS",985 "Experimental": "1",986 "PerPkg": "1",987 "PortMask": "0x000",988 "UMask": "0x4",989 "Unit": "IIO"990 },991 {992 "BriefDescription": "Second Level Page Walk Cache Hit to a 256T page",993 "Counter": "0,1,2,3",994 "EventCode": "0x41",995 "EventName": "UNC_IIO_IOMMU1.SLPWC_256T_HITS",996 "Experimental": "1",997 "PerPkg": "1",998 "PortMask": "0x000",999 "UMask": "0x10",1000 "Unit": "IIO"1001 },1002 {1003 "BriefDescription": "Second Level Page Walk Cache Hit to a 2M page",1004 "Counter": "0,1,2,3",1005 "EventCode": "0x41",1006 "EventName": "UNC_IIO_IOMMU1.SLPWC_2M_HITS",1007 "Experimental": "1",1008 "PerPkg": "1",1009 "PortMask": "0x000",1010 "UMask": "0x2",1011 "Unit": "IIO"1012 },1013 {1014 "BriefDescription": "Second Level Page Walk Cache Hit to a 512G page",1015 "Counter": "0,1,2,3",1016 "EventCode": "0x41",1017 "EventName": "UNC_IIO_IOMMU1.SLPWC_512G_HITS",1018 "Experimental": "1",1019 "PerPkg": "1",1020 "PortMask": "0x000",1021 "UMask": "0x8",1022 "Unit": "IIO"1023 },1024 {1025 "BriefDescription": "Second Level Page Walk Cache fill",1026 "Counter": "0,1,2,3",1027 "EventCode": "0x41",1028 "EventName": "UNC_IIO_IOMMU1.SLPWC_CACHE_FILLS",1029 "Experimental": "1",1030 "PerPkg": "1",1031 "PortMask": "0x000",1032 "UMask": "0x20",1033 "Unit": "IIO"1034 },1035 {1036 "BriefDescription": "Second Level Page Walk Cache lookup",1037 "Counter": "0,1,2,3",1038 "EventCode": "0x41",1039 "EventName": "UNC_IIO_IOMMU1.SLPWC_CACHE_LOOKUPS",1040 "Experimental": "1",1041 "PerPkg": "1",1042 "PortMask": "0x000",1043 "UMask": "0x1",1044 "Unit": "IIO"1045 },1046 {1047 "BriefDescription": "Cycles PWT full",1048 "Counter": "0,1,2,3",1049 "EventCode": "0x43",1050 "EventName": "UNC_IIO_IOMMU3.CYC_PWT_FULL",1051 "Experimental": "1",1052 "PerPkg": "1",1053 "PortMask": "0x000",1054 "UMask": "0x2",1055 "Unit": "IIO"1056 },1057 {1058 "BriefDescription": "Interrupt Entry cache hit",1059 "Counter": "0,1,2,3",1060 "EventCode": "0x43",1061 "EventName": "UNC_IIO_IOMMU3.INT_CACHE_HITS",1062 "Experimental": "1",1063 "PerPkg": "1",1064 "PortMask": "0x000",1065 "UMask": "0x80",1066 "Unit": "IIO"1067 },1068 {1069 "BriefDescription": "Interrupt Entry cache lookup",1070 "Counter": "0,1,2,3",1071 "EventCode": "0x43",1072 "EventName": "UNC_IIO_IOMMU3.INT_CACHE_LOOKUPS",1073 "Experimental": "1",1074 "PerPkg": "1",1075 "PortMask": "0x000",1076 "UMask": "0x40",1077 "Unit": "IIO"1078 },1079 {1080 "BriefDescription": "Context Cache invalidation events",1081 "Counter": "0,1,2,3",1082 "EventCode": "0x43",1083 "EventName": "UNC_IIO_IOMMU3.NUM_INVAL_CTXT_CACHE",1084 "Experimental": "1",1085 "PerPkg": "1",1086 "PortMask": "0x000",1087 "UMask": "0x8",1088 "Unit": "IIO"1089 },1090 {1091 "BriefDescription": "Interrupt Entry Cache invalidation events",1092 "Counter": "0,1,2,3",1093 "EventCode": "0x43",1094 "EventName": "UNC_IIO_IOMMU3.NUM_INVAL_INT_CACHE",1095 "Experimental": "1",1096 "PerPkg": "1",1097 "PortMask": "0x000",1098 "UMask": "0x20",1099 "Unit": "IIO"1100 },1101 {1102 "BriefDescription": "IOTLB invalidation events",1103 "Counter": "0,1,2,3",1104 "EventCode": "0x43",1105 "EventName": "UNC_IIO_IOMMU3.NUM_INVAL_IOTLB",1106 "Experimental": "1",1107 "PerPkg": "1",1108 "PortMask": "0x000",1109 "UMask": "0x4",1110 "Unit": "IIO"1111 },1112 {1113 "BriefDescription": "PASID Cache invalidation events",1114 "Counter": "0,1,2,3",1115 "EventCode": "0x43",1116 "EventName": "UNC_IIO_IOMMU3.NUM_INVAL_PASID_CACHE",1117 "Experimental": "1",1118 "PerPkg": "1",1119 "PortMask": "0x000",1120 "UMask": "0x10",1121 "Unit": "IIO"1122 },1123 {1124 "BriefDescription": "Occupancy of outbound request queue : To device : Counts number of outbound requests/completions IIO is currently processing",1125 "Counter": "2,3",1126 "EventCode": "0xc5",1127 "EventName": "UNC_IIO_NUM_OUSTANDING_REQ_FROM_CPU.TO_IO",1128 "Experimental": "1",1129 "FCMask": "0x07",1130 "PerPkg": "1",1131 "PortMask": "0x0FF",1132 "UMask": "0x70ff008",1133 "Unit": "IIO"1134 },1135 {1136 "BriefDescription": "Passing data to be written",1137 "Counter": "0,1,2,3",1138 "EventCode": "0x88",1139 "EventName": "UNC_IIO_NUM_OUTSTANDING_REQ_OF_CPU.DATA",1140 "Experimental": "1",1141 "FCMask": "0x07",1142 "PerPkg": "1",1143 "PortMask": "0x0FF",1144 "UMask": "0x700f020",1145 "Unit": "IIO"1146 },1147 {1148 "BriefDescription": "Issuing final read or write of line",1149 "Counter": "0,1,2,3",1150 "EventCode": "0x88",1151 "EventName": "UNC_IIO_NUM_OUTSTANDING_REQ_OF_CPU.FINAL_RD_WR",1152 "Experimental": "1",1153 "FCMask": "0x07",1154 "PerPkg": "1",1155 "PortMask": "0x0FF",1156 "UMask": "0x700f008",1157 "Unit": "IIO"1158 },1159 {1160 "BriefDescription": "Processing response from IOMMU",1161 "Counter": "0,1,2,3",1162 "EventCode": "0x88",1163 "EventName": "UNC_IIO_NUM_OUTSTANDING_REQ_OF_CPU.IOMMU_HIT",1164 "Experimental": "1",1165 "FCMask": "0x07",1166 "PerPkg": "1",1167 "PortMask": "0x0FF",1168 "UMask": "0x700f002",1169 "Unit": "IIO"1170 },1171 {1172 "BriefDescription": "Issuing to IOMMU",1173 "Counter": "0,1,2,3",1174 "EventCode": "0x88",1175 "EventName": "UNC_IIO_NUM_OUTSTANDING_REQ_OF_CPU.IOMMU_REQ",1176 "Experimental": "1",1177 "FCMask": "0x07",1178 "PerPkg": "1",1179 "PortMask": "0x0FF",1180 "UMask": "0x700f001",1181 "Unit": "IIO"1182 },1183 {1184 "BriefDescription": "Request Ownership",1185 "Counter": "0,1,2,3",1186 "EventCode": "0x88",1187 "EventName": "UNC_IIO_NUM_OUTSTANDING_REQ_OF_CPU.REQ_OWN",1188 "Experimental": "1",1189 "FCMask": "0x07",1190 "PerPkg": "1",1191 "PortMask": "0x0FF",1192 "UMask": "0x700f004",1193 "Unit": "IIO"1194 },1195 {1196 "BriefDescription": "Writing line",1197 "Counter": "0,1,2,3",1198 "EventCode": "0x88",1199 "EventName": "UNC_IIO_NUM_OUTSTANDING_REQ_OF_CPU.WR",1200 "Experimental": "1",1201 "FCMask": "0x07",1202 "PerPkg": "1",1203 "PortMask": "0x0FF",1204 "UMask": "0x700f010",1205 "Unit": "IIO"1206 },1207 {1208 "BriefDescription": "-",1209 "Counter": "0,1,2,3",1210 "EventCode": "0x8e",1211 "EventName": "UNC_IIO_NUM_REQ_OF_CPU_BY_TGT.ABORT",1212 "Experimental": "1",1213 "FCMask": "0x07",1214 "PerPkg": "1",1215 "PortMask": "0x0FF",1216 "UMask": "0x70ff080",1217 "Unit": "IIO"1218 },1219 {1220 "BriefDescription": "-",1221 "Counter": "0,1,2,3",1222 "EventCode": "0x8e",1223 "EventName": "UNC_IIO_NUM_REQ_OF_CPU_BY_TGT.CONFINED_P2P",1224 "Experimental": "1",1225 "FCMask": "0x07",1226 "PerPkg": "1",1227 "PortMask": "0x0FF",1228 "UMask": "0x70ff040",1229 "Unit": "IIO"1230 },1231 {1232 "BriefDescription": "-",1233 "Counter": "0,1,2,3",1234 "EventCode": "0x8e",1235 "EventName": "UNC_IIO_NUM_REQ_OF_CPU_BY_TGT.LOC_P2P",1236 "Experimental": "1",1237 "FCMask": "0x07",1238 "PerPkg": "1",1239 "PortMask": "0x0FF",1240 "UMask": "0x70ff020",1241 "Unit": "IIO"1242 },1243 {1244 "BriefDescription": "-",1245 "Counter": "0,1,2,3",1246 "EventCode": "0x8e",1247 "EventName": "UNC_IIO_NUM_REQ_OF_CPU_BY_TGT.MCAST",1248 "Experimental": "1",1249 "FCMask": "0x07",1250 "PerPkg": "1",1251 "PortMask": "0x0FF",1252 "UMask": "0x70ff002",1253 "Unit": "IIO"1254 },1255 {1256 "BriefDescription": "-",1257 "Counter": "0,1,2,3",1258 "EventCode": "0x8e",1259 "EventName": "UNC_IIO_NUM_REQ_OF_CPU_BY_TGT.MEM",1260 "Experimental": "1",1261 "FCMask": "0x07",1262 "PerPkg": "1",1263 "PortMask": "0x0FF",1264 "UMask": "0x70ff008",1265 "Unit": "IIO"1266 },1267 {1268 "BriefDescription": "-",1269 "Counter": "0,1,2,3",1270 "EventCode": "0x8e",1271 "EventName": "UNC_IIO_NUM_REQ_OF_CPU_BY_TGT.MSGB",1272 "Experimental": "1",1273 "FCMask": "0x07",1274 "PerPkg": "1",1275 "PortMask": "0x0FF",1276 "UMask": "0x70ff001",1277 "Unit": "IIO"1278 },1279 {1280 "BriefDescription": "-",1281 "Counter": "0,1,2,3",1282 "EventCode": "0x8e",1283 "EventName": "UNC_IIO_NUM_REQ_OF_CPU_BY_TGT.REM_P2P",1284 "Experimental": "1",1285 "FCMask": "0x07",1286 "PerPkg": "1",1287 "PortMask": "0x0FF",1288 "UMask": "0x70ff010",1289 "Unit": "IIO"1290 },1291 {1292 "BriefDescription": "-",1293 "Counter": "0,1,2,3",1294 "EventCode": "0x8e",1295 "EventName": "UNC_IIO_NUM_REQ_OF_CPU_BY_TGT.UBOX",1296 "Experimental": "1",1297 "FCMask": "0x07",1298 "PerPkg": "1",1299 "PortMask": "0x0FF",1300 "UMask": "0x70ff004",1301 "Unit": "IIO"1302 },1303 {1304 "BriefDescription": "All 9 bits of Page Walk Tracker Occupancy",1305 "Counter": "0,1,2,3",1306 "EventCode": "0x42",1307 "EventName": "UNC_IIO_PWT_OCCUPANCY",1308 "Experimental": "1",1309 "PerPkg": "1",1310 "PortMask": "0x000",1311 "Unit": "IIO"1312 },1313 {1314 "BriefDescription": "Number Transactions requested by the CPU : Core reading from Cards MMIO space",1315 "Counter": "2,3",1316 "EventCode": "0xC1",1317 "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.ALL_PARTS",1318 "FCMask": "0x07",1319 "PerPkg": "1",1320 "PortMask": "0x0FF",1321 "UMask": "0x70ff004",1322 "Unit": "IIO"1323 },1324 {1325 "BriefDescription": "Number Transactions requested by the CPU : Core reading from Cards MMIO space",1326 "Counter": "2,3",1327 "EventCode": "0xC1",1328 "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART0",1329 "FCMask": "0x07",1330 "PerPkg": "1",1331 "PortMask": "0x001",1332 "UMask": "0x7001004",1333 "Unit": "IIO"1334 },1335 {1336 "BriefDescription": "Number Transactions requested by the CPU : Core reading from Cards MMIO space",1337 "Counter": "2,3",1338 "EventCode": "0xC1",1339 "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART1",1340 "FCMask": "0x07",1341 "PerPkg": "1",1342 "PortMask": "0x002",1343 "UMask": "0x7002004",1344 "Unit": "IIO"1345 },1346 {1347 "BriefDescription": "Number Transactions requested by the CPU : Core reading from Cards MMIO space",1348 "Counter": "2,3",1349 "EventCode": "0xC1",1350 "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART2",1351 "FCMask": "0x07",1352 "PerPkg": "1",1353 "PortMask": "0x004",1354 "UMask": "0x7004004",1355 "Unit": "IIO"1356 },1357 {1358 "BriefDescription": "Number Transactions requested by the CPU : Core reading from Cards MMIO space",1359 "Counter": "2,3",1360 "EventCode": "0xC1",1361 "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART3",1362 "FCMask": "0x07",1363 "PerPkg": "1",1364 "PortMask": "0x008",1365 "UMask": "0x7008004",1366 "Unit": "IIO"1367 },1368 {1369 "BriefDescription": "Number Transactions requested by the CPU : Core reading from Cards MMIO space",1370 "Counter": "2,3",1371 "EventCode": "0xC1",1372 "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART4",1373 "FCMask": "0x07",1374 "PerPkg": "1",1375 "PortMask": "0x010",1376 "UMask": "0x7010004",1377 "Unit": "IIO"1378 },1379 {1380 "BriefDescription": "Number Transactions requested by the CPU : Core reading from Cards MMIO space",1381 "Counter": "2,3",1382 "EventCode": "0xC1",1383 "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART5",1384 "FCMask": "0x07",1385 "PerPkg": "1",1386 "PortMask": "0x020",1387 "UMask": "0x7020004",1388 "Unit": "IIO"1389 },1390 {1391 "BriefDescription": "Number Transactions requested by the CPU : Core reading from Cards MMIO space",1392 "Counter": "2,3",1393 "EventCode": "0xC1",1394 "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART6",1395 "FCMask": "0x07",1396 "PerPkg": "1",1397 "PortMask": "0x040",1398 "UMask": "0x7040004",1399 "Unit": "IIO"1400 },1401 {1402 "BriefDescription": "Number Transactions requested by the CPU : Core reading from Cards MMIO space",1403 "Counter": "2,3",1404 "EventCode": "0xC1",1405 "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART7",1406 "FCMask": "0x07",1407 "PerPkg": "1",1408 "PortMask": "0x080",1409 "UMask": "0x7080004",1410 "Unit": "IIO"1411 },1412 {1413 "BriefDescription": "Number Transactions requested by the CPU : Core writing to Cards MMIO space",1414 "Counter": "2,3",1415 "EventCode": "0xC1",1416 "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.ALL_PARTS",1417 "FCMask": "0x07",1418 "PerPkg": "1",1419 "PortMask": "0x0FF",1420 "UMask": "0x70ff001",1421 "Unit": "IIO"1422 },1423 {1424 "BriefDescription": "Number Transactions requested by the CPU : Core writing to Cards MMIO space",1425 "Counter": "2,3",1426 "EventCode": "0xC1",1427 "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART0",1428 "FCMask": "0x07",1429 "PerPkg": "1",1430 "PortMask": "0x001",1431 "UMask": "0x7001001",1432 "Unit": "IIO"1433 },1434 {1435 "BriefDescription": "Number Transactions requested by the CPU : Core writing to Cards MMIO space",1436 "Counter": "2,3",1437 "EventCode": "0xC1",1438 "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART1",1439 "FCMask": "0x07",1440 "PerPkg": "1",1441 "PortMask": "0x002",1442 "UMask": "0x7002001",1443 "Unit": "IIO"1444 },1445 {1446 "BriefDescription": "Number Transactions requested by the CPU : Core writing to Cards MMIO space",1447 "Counter": "2,3",1448 "EventCode": "0xC1",1449 "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART2",1450 "FCMask": "0x07",1451 "PerPkg": "1",1452 "PortMask": "0x004",1453 "UMask": "0x7004001",1454 "Unit": "IIO"1455 },1456 {1457 "BriefDescription": "Number Transactions requested by the CPU : Core writing to Cards MMIO space",1458 "Counter": "2,3",1459 "EventCode": "0xC1",1460 "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART3",1461 "FCMask": "0x07",1462 "PerPkg": "1",1463 "PortMask": "0x008",1464 "UMask": "0x7008001",1465 "Unit": "IIO"1466 },1467 {1468 "BriefDescription": "Number Transactions requested by the CPU : Core writing to Cards MMIO space",1469 "Counter": "2,3",1470 "EventCode": "0xC1",1471 "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART4",1472 "FCMask": "0x07",1473 "PerPkg": "1",1474 "PortMask": "0x010",1475 "UMask": "0x7010001",1476 "Unit": "IIO"1477 },1478 {1479 "BriefDescription": "Number Transactions requested by the CPU : Core writing to Cards MMIO space",1480 "Counter": "2,3",1481 "EventCode": "0xC1",1482 "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART5",1483 "FCMask": "0x07",1484 "PerPkg": "1",1485 "PortMask": "0x020",1486 "UMask": "0x7020001",1487 "Unit": "IIO"1488 },1489 {1490 "BriefDescription": "Number Transactions requested by the CPU : Core writing to Cards MMIO space",1491 "Counter": "2,3",1492 "EventCode": "0xC1",1493 "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART6",1494 "FCMask": "0x07",1495 "PerPkg": "1",1496 "PortMask": "0x040",1497 "UMask": "0x7040001",1498 "Unit": "IIO"1499 },1500 {1501 "BriefDescription": "Number Transactions requested by the CPU : Core writing to Cards MMIO space",1502 "Counter": "2,3",1503 "EventCode": "0xC1",1504 "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART7",1505 "FCMask": "0x07",1506 "PerPkg": "1",1507 "PortMask": "0x080",1508 "UMask": "0x7080001",1509 "Unit": "IIO"1510 },1511 {1512 "BriefDescription": "Number Transactions requested by the CPU : Another card (different IIO stack) reading from this card.",1513 "Counter": "2,3",1514 "EventCode": "0xC1",1515 "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.ALL_PARTS",1516 "FCMask": "0x07",1517 "PerPkg": "1",1518 "PortMask": "0x0FF",1519 "UMask": "0x70ff008",1520 "Unit": "IIO"1521 },1522 {1523 "BriefDescription": "Number Transactions requested by the CPU : Another card (different IIO stack) writing to this card.",1524 "Counter": "2,3",1525 "EventCode": "0xC1",1526 "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.ALL_PARTS",1527 "FCMask": "0x07",1528 "PerPkg": "1",1529 "PortMask": "0x0FF",1530 "UMask": "0x70ff002",1531 "Unit": "IIO"1532 },1533 {1534 "BriefDescription": "Number Transactions requested of the CPU : Card reading from DRAM",1535 "Counter": "0,1",1536 "EventCode": "0x84",1537 "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART0",1538 "FCMask": "0x07",1539 "PerPkg": "1",1540 "PortMask": "0x001",1541 "UMask": "0x7001004",1542 "Unit": "IIO"1543 },1544 {1545 "BriefDescription": "Number Transactions requested of the CPU : Card reading from DRAM",1546 "Counter": "0,1",1547 "EventCode": "0x84",1548 "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART1",1549 "FCMask": "0x07",1550 "PerPkg": "1",1551 "PortMask": "0x002",1552 "UMask": "0x7002004",1553 "Unit": "IIO"1554 },1555 {1556 "BriefDescription": "Number Transactions requested of the CPU : Card reading from DRAM",1557 "Counter": "0,1",1558 "EventCode": "0x84",1559 "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART2",1560 "FCMask": "0x07",1561 "PerPkg": "1",1562 "PortMask": "0x004",1563 "UMask": "0x7004004",1564 "Unit": "IIO"1565 },1566 {1567 "BriefDescription": "Number Transactions requested of the CPU : Card reading from DRAM",1568 "Counter": "0,1",1569 "EventCode": "0x84",1570 "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART3",1571 "FCMask": "0x07",1572 "PerPkg": "1",1573 "PortMask": "0x008",1574 "UMask": "0x7008004",1575 "Unit": "IIO"1576 },1577 {1578 "BriefDescription": "Number Transactions requested of the CPU : Card reading from DRAM",1579 "Counter": "0,1",1580 "EventCode": "0x84",1581 "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART4",1582 "FCMask": "0x07",1583 "PerPkg": "1",1584 "PortMask": "0x010",1585 "UMask": "0x7010004",1586 "Unit": "IIO"1587 },1588 {1589 "BriefDescription": "Number Transactions requested of the CPU : Card reading from DRAM",1590 "Counter": "0,1",1591 "EventCode": "0x84",1592 "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART5",1593 "FCMask": "0x07",1594 "PerPkg": "1",1595 "PortMask": "0x020",1596 "UMask": "0x7020004",1597 "Unit": "IIO"1598 },1599 {1600 "BriefDescription": "Number Transactions requested of the CPU : Card reading from DRAM",1601 "Counter": "0,1",1602 "EventCode": "0x84",1603 "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART6",1604 "FCMask": "0x07",1605 "PerPkg": "1",1606 "PortMask": "0x040",1607 "UMask": "0x7040004",1608 "Unit": "IIO"1609 },1610 {1611 "BriefDescription": "Number Transactions requested of the CPU : Card reading from DRAM",1612 "Counter": "0,1",1613 "EventCode": "0x84",1614 "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART7",1615 "FCMask": "0x07",1616 "PerPkg": "1",1617 "PortMask": "0x080",1618 "UMask": "0x7080004",1619 "Unit": "IIO"1620 },1621 {1622 "BriefDescription": "Number Transactions requested of the CPU : Card writing to DRAM",1623 "Counter": "0,1",1624 "EventCode": "0x84",1625 "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART0",1626 "FCMask": "0x07",1627 "PerPkg": "1",1628 "PortMask": "0x001",1629 "UMask": "0x7001001",1630 "Unit": "IIO"1631 },1632 {1633 "BriefDescription": "Number Transactions requested of the CPU : Card writing to DRAM",1634 "Counter": "0,1",1635 "EventCode": "0x84",1636 "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART1",1637 "FCMask": "0x07",1638 "PerPkg": "1",1639 "PortMask": "0x002",1640 "UMask": "0x7002001",1641 "Unit": "IIO"1642 },1643 {1644 "BriefDescription": "Number Transactions requested of the CPU : Card writing to DRAM",1645 "Counter": "0,1",1646 "EventCode": "0x84",1647 "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART2",1648 "FCMask": "0x07",1649 "PerPkg": "1",1650 "PortMask": "0x004",1651 "UMask": "0x7004001",1652 "Unit": "IIO"1653 },1654 {1655 "BriefDescription": "Number Transactions requested of the CPU : Card writing to DRAM",1656 "Counter": "0,1",1657 "EventCode": "0x84",1658 "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART3",1659 "FCMask": "0x07",1660 "PerPkg": "1",1661 "PortMask": "0x008",1662 "UMask": "0x7008001",1663 "Unit": "IIO"1664 },1665 {1666 "BriefDescription": "Number Transactions requested of the CPU : Card writing to DRAM",1667 "Counter": "0,1",1668 "EventCode": "0x84",1669 "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART4",1670 "FCMask": "0x07",1671 "PerPkg": "1",1672 "PortMask": "0x010",1673 "UMask": "0x7010001",1674 "Unit": "IIO"1675 },1676 {1677 "BriefDescription": "Number Transactions requested of the CPU : Card writing to DRAM",1678 "Counter": "0,1",1679 "EventCode": "0x84",1680 "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART5",1681 "FCMask": "0x07",1682 "PerPkg": "1",1683 "PortMask": "0x020",1684 "UMask": "0x7020001",1685 "Unit": "IIO"1686 },1687 {1688 "BriefDescription": "Number Transactions requested of the CPU : Card writing to DRAM",1689 "Counter": "0,1",1690 "EventCode": "0x84",1691 "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART6",1692 "FCMask": "0x07",1693 "PerPkg": "1",1694 "PortMask": "0x040",1695 "UMask": "0x7040001",1696 "Unit": "IIO"1697 },1698 {1699 "BriefDescription": "Number Transactions requested of the CPU : Card writing to DRAM",1700 "Counter": "0,1",1701 "EventCode": "0x84",1702 "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART7",1703 "FCMask": "0x07",1704 "PerPkg": "1",1705 "PortMask": "0x080",1706 "UMask": "0x7080001",1707 "Unit": "IIO"1708 },1709 {1710 "BriefDescription": "Number Transactions requested of the CPU : Card reading from another Card (same or different stack)",1711 "Counter": "0,1",1712 "EventCode": "0x84",1713 "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_READ.PART0",1714 "Experimental": "1",1715 "FCMask": "0x07",1716 "PerPkg": "1",1717 "PortMask": "0x001",1718 "UMask": "0x7001008",1719 "Unit": "IIO"1720 },1721 {1722 "BriefDescription": "Number Transactions requested of the CPU : Card reading from another Card (same or different stack)",1723 "Counter": "0,1",1724 "EventCode": "0x84",1725 "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_READ.PART1",1726 "Experimental": "1",1727 "FCMask": "0x07",1728 "PerPkg": "1",1729 "PortMask": "0x002",1730 "UMask": "0x7002008",1731 "Unit": "IIO"1732 },1733 {1734 "BriefDescription": "Number Transactions requested of the CPU : Card reading from another Card (same or different stack)",1735 "Counter": "0,1",1736 "EventCode": "0x84",1737 "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_READ.PART2",1738 "Experimental": "1",1739 "FCMask": "0x07",1740 "PerPkg": "1",1741 "PortMask": "0x004",1742 "UMask": "0x7004008",1743 "Unit": "IIO"1744 },1745 {1746 "BriefDescription": "Number Transactions requested of the CPU : Card reading from another Card (same or different stack)",1747 "Counter": "0,1",1748 "EventCode": "0x84",1749 "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_READ.PART3",1750 "Experimental": "1",1751 "FCMask": "0x07",1752 "PerPkg": "1",1753 "PortMask": "0x008",1754 "UMask": "0x7008008",1755 "Unit": "IIO"1756 },1757 {1758 "BriefDescription": "Number Transactions requested of the CPU : Card reading from another Card (same or different stack)",1759 "Counter": "0,1",1760 "EventCode": "0x84",1761 "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_READ.PART4",1762 "Experimental": "1",1763 "FCMask": "0x07",1764 "PerPkg": "1",1765 "PortMask": "0x010",1766 "UMask": "0x7010008",1767 "Unit": "IIO"1768 },1769 {1770 "BriefDescription": "Number Transactions requested of the CPU : Card reading from another Card (same or different stack)",1771 "Counter": "0,1",1772 "EventCode": "0x84",1773 "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_READ.PART5",1774 "Experimental": "1",1775 "FCMask": "0x07",1776 "PerPkg": "1",1777 "PortMask": "0x020",1778 "UMask": "0x7020008",1779 "Unit": "IIO"1780 },1781 {1782 "BriefDescription": "Number Transactions requested of the CPU : Card reading from another Card (same or different stack)",1783 "Counter": "0,1",1784 "EventCode": "0x84",1785 "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_READ.PART6",1786 "Experimental": "1",1787 "FCMask": "0x07",1788 "PerPkg": "1",1789 "PortMask": "0x040",1790 "UMask": "0x7040008",1791 "Unit": "IIO"1792 },1793 {1794 "BriefDescription": "Number Transactions requested of the CPU : Card reading from another Card (same or different stack)",1795 "Counter": "0,1",1796 "EventCode": "0x84",1797 "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_READ.PART7",1798 "Experimental": "1",1799 "FCMask": "0x07",1800 "PerPkg": "1",1801 "PortMask": "0x080",1802 "UMask": "0x7080008",1803 "Unit": "IIO"1804 },1805 {1806 "BriefDescription": "Number Transactions requested of the CPU : Card writing to another Card (same or different stack)",1807 "Counter": "0,1",1808 "EventCode": "0x84",1809 "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.PART0",1810 "Experimental": "1",1811 "FCMask": "0x07",1812 "PerPkg": "1",1813 "PortMask": "0x001",1814 "UMask": "0x7001002",1815 "Unit": "IIO"1816 },1817 {1818 "BriefDescription": "Number Transactions requested of the CPU : Card writing to another Card (same or different stack)",1819 "Counter": "0,1",1820 "EventCode": "0x84",1821 "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.PART1",1822 "Experimental": "1",1823 "FCMask": "0x07",1824 "PerPkg": "1",1825 "PortMask": "0x002",1826 "UMask": "0x7002002",1827 "Unit": "IIO"1828 },1829 {1830 "BriefDescription": "Number Transactions requested of the CPU : Card writing to another Card (same or different stack)",1831 "Counter": "0,1",1832 "EventCode": "0x84",1833 "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.PART2",1834 "Experimental": "1",1835 "FCMask": "0x07",1836 "PerPkg": "1",1837 "PortMask": "0x004",1838 "UMask": "0x7004002",1839 "Unit": "IIO"1840 },1841 {1842 "BriefDescription": "Number Transactions requested of the CPU : Card writing to another Card (same or different stack)",1843 "Counter": "0,1",1844 "EventCode": "0x84",1845 "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.PART3",1846 "Experimental": "1",1847 "FCMask": "0x07",1848 "PerPkg": "1",1849 "PortMask": "0x008",1850 "UMask": "0x7008002",1851 "Unit": "IIO"1852 },1853 {1854 "BriefDescription": "Number Transactions requested of the CPU : Card writing to another Card (same or different stack)",1855 "Counter": "0,1",1856 "EventCode": "0x84",1857 "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.PART4",1858 "Experimental": "1",1859 "FCMask": "0x07",1860 "PerPkg": "1",1861 "PortMask": "0x010",1862 "UMask": "0x7010002",1863 "Unit": "IIO"1864 },1865 {1866 "BriefDescription": "Number Transactions requested of the CPU : Card writing to another Card (same or different stack)",1867 "Counter": "0,1",1868 "EventCode": "0x84",1869 "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.PART5",1870 "Experimental": "1",1871 "FCMask": "0x07",1872 "PerPkg": "1",1873 "PortMask": "0x020",1874 "UMask": "0x7020002",1875 "Unit": "IIO"1876 },1877 {1878 "BriefDescription": "Number Transactions requested of the CPU : Card writing to another Card (same or different stack)",1879 "Counter": "0,1",1880 "EventCode": "0x84",1881 "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.PART6",1882 "Experimental": "1",1883 "FCMask": "0x07",1884 "PerPkg": "1",1885 "PortMask": "0x040",1886 "UMask": "0x7040002",1887 "Unit": "IIO"1888 },1889 {1890 "BriefDescription": "Number Transactions requested of the CPU : Card writing to another Card (same or different stack)",1891 "Counter": "0,1",1892 "EventCode": "0x84",1893 "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.PART7",1894 "Experimental": "1",1895 "FCMask": "0x07",1896 "PerPkg": "1",1897 "PortMask": "0x080",1898 "UMask": "0x7080002",1899 "Unit": "IIO"1900 }1901]1902