94 lines · json
1[2 {3 "BriefDescription": "Approximate counts of AVX & AVX2 256-bit instructions, including non-arithmetic instructions, loads, and stores. May count non-AVX instructions that employ 256-bit operations, including (but not necessarily limited to) rep string instructions that use 256-bit loads and stores for optimized performance, XSAVE* and XRSTOR*, and operations that transition the x87 FPU data registers between x87 and MMX.",4 "Counter": "0,1,2,3",5 "EventCode": "0xC6",6 "EventName": "AVX_INSTS.ALL",7 "PublicDescription": "Note that a whole rep string only counts AVX_INST.ALL once.",8 "SampleAfterValue": "2000003",9 "UMask": "0x7"10 },11 {12 "BriefDescription": "Cycles with any input/output SSE or FP assist",13 "Counter": "0,1,2,3",14 "CounterMask": "1",15 "EventCode": "0xCA",16 "EventName": "FP_ASSIST.ANY",17 "PublicDescription": "Cycles with any input/output SSE* or FP assists.",18 "SampleAfterValue": "100003",19 "UMask": "0x1e"20 },21 {22 "BriefDescription": "Number of SIMD FP assists due to input values",23 "Counter": "0,1,2,3",24 "EventCode": "0xCA",25 "EventName": "FP_ASSIST.SIMD_INPUT",26 "PublicDescription": "Number of SIMD FP assists due to input values.",27 "SampleAfterValue": "100003",28 "UMask": "0x10"29 },30 {31 "BriefDescription": "Number of SIMD FP assists due to Output values",32 "Counter": "0,1,2,3",33 "EventCode": "0xCA",34 "EventName": "FP_ASSIST.SIMD_OUTPUT",35 "PublicDescription": "Number of SIMD FP assists due to output values.",36 "SampleAfterValue": "100003",37 "UMask": "0x8"38 },39 {40 "BriefDescription": "Number of X87 assists due to input value.",41 "Counter": "0,1,2,3",42 "EventCode": "0xCA",43 "EventName": "FP_ASSIST.X87_INPUT",44 "PublicDescription": "Number of X87 FP assists due to input values.",45 "SampleAfterValue": "100003",46 "UMask": "0x4"47 },48 {49 "BriefDescription": "Number of X87 assists due to output value.",50 "Counter": "0,1,2,3",51 "EventCode": "0xCA",52 "EventName": "FP_ASSIST.X87_OUTPUT",53 "PublicDescription": "Number of X87 FP assists due to output values.",54 "SampleAfterValue": "100003",55 "UMask": "0x2"56 },57 {58 "BriefDescription": "Number of SIMD Move Elimination candidate uops that were eliminated.",59 "Counter": "0,1,2,3",60 "EventCode": "0x58",61 "EventName": "MOVE_ELIMINATION.SIMD_ELIMINATED",62 "PublicDescription": "Number of SIMD move elimination candidate uops that were eliminated.",63 "SampleAfterValue": "1000003",64 "UMask": "0x2"65 },66 {67 "BriefDescription": "Number of SIMD Move Elimination candidate uops that were not eliminated.",68 "Counter": "0,1,2,3",69 "EventCode": "0x58",70 "EventName": "MOVE_ELIMINATION.SIMD_NOT_ELIMINATED",71 "PublicDescription": "Number of SIMD move elimination candidate uops that were not eliminated.",72 "SampleAfterValue": "1000003",73 "UMask": "0x8"74 },75 {76 "BriefDescription": "Number of transitions from AVX-256 to legacy SSE when penalty applicable.",77 "Counter": "0,1,2,3",78 "Errata": "HSD56, HSM57",79 "EventCode": "0xC1",80 "EventName": "OTHER_ASSISTS.AVX_TO_SSE",81 "SampleAfterValue": "100003",82 "UMask": "0x8"83 },84 {85 "BriefDescription": "Number of transitions from SSE to AVX-256 when penalty applicable.",86 "Counter": "0,1,2,3",87 "Errata": "HSD56, HSM57",88 "EventCode": "0xC1",89 "EventName": "OTHER_ASSISTS.SSE_TO_AVX",90 "SampleAfterValue": "100003",91 "UMask": "0x10"92 }93]94