brintos

brintos / linux-shallow public Read only

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1[2    {3        "BriefDescription": "Number of entries allocated. Account for Any type: e.g. Snoop, Core aperture, etc.",4        "Counter": "0,1",5        "EventCode": "0x84",6        "EventName": "UNC_ARB_COH_TRK_REQUESTS.ALL",7        "PerPkg": "1",8        "UMask": "0x1",9        "Unit": "ARB"10    },11    {12        "BriefDescription": "Number of all Core entries outstanding for the memory controller. The outstanding interval starts after LLC miss till return of first data chunk. Accounts for Coherent and non-coherent traffic.",13        "Counter": "0",14        "EventCode": "0x80",15        "EventName": "UNC_ARB_TRK_OCCUPANCY.ALL",16        "PerPkg": "1",17        "UMask": "0x1",18        "Unit": "ARB"19    },20    {21        "BriefDescription": "Cycles with at least one request outstanding is waiting for data return from memory controller. Account for coherent and non-coherent requests initiated by IA Cores, Processor Graphics Unit, or LLC.",22        "Counter": "0",23        "CounterMask": "1",24        "EventCode": "0x80",25        "EventName": "UNC_ARB_TRK_OCCUPANCY.CYCLES_WITH_ANY_REQUEST",26        "PerPkg": "1",27        "UMask": "0x1",28        "Unit": "ARB"29    },30    {31        "BriefDescription": "Number of Core Data Read entries outstanding for the memory controller. The outstanding interval starts after LLC miss till return of first data chunk.",32        "Counter": "0",33        "EventCode": "0x80",34        "EventName": "UNC_ARB_TRK_OCCUPANCY.DATA_READ",35        "PerPkg": "1",36        "UMask": "0x2",37        "Unit": "ARB"38    },39    {40        "BriefDescription": "UNC_ARB_TRK_REQUESTS.ALL",41        "Counter": "0,1",42        "EventCode": "0x81",43        "EventName": "UNC_ARB_TRK_REQUESTS.ALL",44        "PerPkg": "1",45        "UMask": "0x1",46        "Unit": "ARB"47    },48    {49        "BriefDescription": "Number of Core coherent Data Read requests sent to memory controller whose data is returned directly to requesting agent.",50        "Counter": "0,1",51        "EventCode": "0x81",52        "EventName": "UNC_ARB_TRK_REQUESTS.DATA_READ",53        "PerPkg": "1",54        "UMask": "0x2",55        "Unit": "ARB"56    },57    {58        "BriefDescription": "Number of Core coherent Data Read requests sent to memory controller whose data is returned directly to requesting agent.",59        "Counter": "0,1",60        "EventCode": "0x81",61        "EventName": "UNC_ARB_TRK_REQUESTS.DRD_DIRECT",62        "PerPkg": "1",63        "UMask": "0x2",64        "Unit": "ARB"65    },66    {67        "BriefDescription": "Number of Writes allocated - any write transactions: full/partials writes and evictions.",68        "Counter": "0,1",69        "EventCode": "0x81",70        "EventName": "UNC_ARB_TRK_REQUESTS.WRITES",71        "PerPkg": "1",72        "UMask": "0x20",73        "Unit": "ARB"74    }75]76